arch/arm64/kernel/ptrace.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Based on arch/arm/kernel/ptrace.c
   4  *
   5  * By Ross Biro 1/23/92
   6  * edited by Linus Torvalds
   7  * ARM modifications Copyright (C) 2000 Russell King
   8  * Copyright (C) 2012 ARM Ltd.
   9  */
  10
  11 #include <linux/audit.h>
  12 #include <linux/compat.h>
  13 #include <linux/kernel.h>
  14 #include <linux/sched/signal.h>
  15 #include <linux/sched/task_stack.h>
  16 #include <linux/mm.h>
  17 #include <linux/nospec.h>
  18 #include <linux/smp.h>
  19 #include <linux/ptrace.h>
  20 #include <linux/user.h>
  21 #include <linux/seccomp.h>
  22 #include <linux/security.h>
  23 #include <linux/init.h>
  24 #include <linux/signal.h>
  25 #include <linux/string.h>
  26 #include <linux/uaccess.h>
  27 #include <linux/perf_event.h>
  28 #include <linux/hw_breakpoint.h>
  29 #include <linux/regset.h>
  30 #include <linux/elf.h>
  31
  32 #include <asm/compat.h>
  33 #include <asm/cpufeature.h>
  34 #include <asm/debug-monitors.h>
  35 #include <asm/fpsimd.h>
  36 #include <asm/mte.h>
  37 #include <asm/pointer_auth.h>
  38 #include <asm/stacktrace.h>
  39 #include <asm/syscall.h>
  40 #include <asm/traps.h>
  41 #include <asm/system_misc.h>
  42
  43 #define CREATE_TRACE_POINTS
  44 #include <trace/events/syscalls.h>
  45
  46 struct pt_regs_offset {
  47         const char *name;
  48         int offset;
  49 };
  50
  51 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
  52 #define REG_OFFSET_END {.name = NULL, .offset = 0}
  53 #define GPR_OFFSET_NAME(r) \
  54         {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
  55
  56 static const struct pt_regs_offset regoffset_table[] = {
  57         GPR_OFFSET_NAME(0),
  58         GPR_OFFSET_NAME(1),
  59         GPR_OFFSET_NAME(2),
  60         GPR_OFFSET_NAME(3),
  61         GPR_OFFSET_NAME(4),
  62         GPR_OFFSET_NAME(5),
  63         GPR_OFFSET_NAME(6),
  64         GPR_OFFSET_NAME(7),
  65         GPR_OFFSET_NAME(8),
  66         GPR_OFFSET_NAME(9),
  67         GPR_OFFSET_NAME(10),
  68         GPR_OFFSET_NAME(11),
  69         GPR_OFFSET_NAME(12),
  70         GPR_OFFSET_NAME(13),
  71         GPR_OFFSET_NAME(14),
  72         GPR_OFFSET_NAME(15),
  73         GPR_OFFSET_NAME(16),
  74         GPR_OFFSET_NAME(17),
  75         GPR_OFFSET_NAME(18),
  76         GPR_OFFSET_NAME(19),
  77         GPR_OFFSET_NAME(20),
  78         GPR_OFFSET_NAME(21),
  79         GPR_OFFSET_NAME(22),
  80         GPR_OFFSET_NAME(23),
  81         GPR_OFFSET_NAME(24),
  82         GPR_OFFSET_NAME(25),
  83         GPR_OFFSET_NAME(26),
  84         GPR_OFFSET_NAME(27),
  85         GPR_OFFSET_NAME(28),
  86         GPR_OFFSET_NAME(29),
  87         GPR_OFFSET_NAME(30),
  88         {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
  89         REG_OFFSET_NAME(sp),
  90         REG_OFFSET_NAME(pc),
  91         REG_OFFSET_NAME(pstate),
  92         REG_OFFSET_END,
  93 };
  94
  95 /**
  96  * regs_query_register_offset() - query register offset from its name
  97  * @name:       the name of a register
  98  *
  99  * regs_query_register_offset() returns the offset of a register in struct
 100  * pt_regs from its name. If the name is invalid, this returns -EINVAL;
 101  */
 102 int regs_query_register_offset(const char *name)
 103 {
 104         const struct pt_regs_offset *roff;
 105
 106         for (roff = regoffset_table; roff->name != NULL; roff++)
 107                 if (!strcmp(roff->name, name))
 108                         return roff->offset;
 109         return -EINVAL;
 110 }
 111
 112 /**
 113  * regs_within_kernel_stack() - check the address in the stack
 114  * @regs:      pt_regs which contains kernel stack pointer.
 115  * @addr:      address which is checked.
 116  *
 117  * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
 118  * If @addr is within the kernel stack, it returns true. If not, returns false.
 119  */
 120 static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
 121 {
 122         return ((addr & ~(THREAD_SIZE - 1))  ==
 123                 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
 124                 on_irq_stack(addr, sizeof(unsigned long));
 125 }
 126
 127 /**
 128  * regs_get_kernel_stack_nth() - get Nth entry of the stack
 129  * @regs:       pt_regs which contains kernel stack pointer.
 130  * @n:          stack entry number.
 131  *
 132  * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
 133  * is specified by @regs. If the @n th entry is NOT in the kernel stack,
 134  * this returns 0.
 135  */
 136 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
 137 {
 138         unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
 139
 140         addr += n;
 141         if (regs_within_kernel_stack(regs, (unsigned long)addr))
 142                 return *addr;
 143         else
 144                 return 0;
 145 }
 146
 147 /*
 148  * TODO: does not yet catch signals sent when the child dies.
 149  * in exit.c or in signal.c.
 150  */
 151
 152 /*
 153  * Called by kernel/ptrace.c when detaching..
 154  */
 155 void ptrace_disable(struct task_struct *child)
 156 {
 157         /*
 158          * This would be better off in core code, but PTRACE_DETACH has
 159          * grown its fair share of arch-specific worts and changing it
 160          * is likely to cause regressions on obscure architectures.
 161          */
 162         user_disable_single_step(child);
 163 }
 164
 165 #ifdef CONFIG_HAVE_HW_BREAKPOINT
 166 /*
 167  * Handle hitting a HW-breakpoint.
 168  */
 169 static void ptrace_hbptriggered(struct perf_event *bp,
 170                                 struct perf_sample_data *data,
 171                                 struct pt_regs *regs)
 172 {
 173         struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
 174         const char *desc = "Hardware breakpoint trap (ptrace)";
 175
 176 #ifdef CONFIG_COMPAT
 177         if (is_compat_task()) {
 178                 int si_errno = 0;
 179                 int i;
 180
 181                 for (i = 0; i < ARM_MAX_BRP; ++i) {
 182                         if (current->thread.debug.hbp_break[i] == bp) {
 183                                 si_errno = (i << 1) + 1;
 184                                 break;
 185                         }
 186                 }
 187
 188                 for (i = 0; i < ARM_MAX_WRP; ++i) {
 189                         if (current->thread.debug.hbp_watch[i] == bp) {
 190                                 si_errno = -((i << 1) + 1);
 191                                 break;
 192                         }
 193                 }
 194                 arm64_force_sig_ptrace_errno_trap(si_errno, bkpt->trigger,
 195                                                   desc);
 196                 return;
 197         }
 198 #endif
 199         arm64_force_sig_fault(SIGTRAP, TRAP_HWBKPT, bkpt->trigger, desc);
 200 }
 201
 202 /*
 203  * Unregister breakpoints from this task and reset the pointers in
 204  * the thread_struct.
 205  */
 206 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
 207 {
 208         int i;
 209         struct thread_struct *t = &tsk->thread;
 210
 211         for (i = 0; i < ARM_MAX_BRP; i++) {
 212                 if (t->debug.hbp_break[i]) {
 213                         unregister_hw_breakpoint(t->debug.hbp_break[i]);
 214                         t->debug.hbp_break[i] = NULL;
 215                 }
 216         }
 217
 218         for (i = 0; i < ARM_MAX_WRP; i++) {
 219                 if (t->debug.hbp_watch[i]) {
 220                         unregister_hw_breakpoint(t->debug.hbp_watch[i]);
 221                         t->debug.hbp_watch[i] = NULL;
 222                 }
 223         }
 224 }
 225
 226 void ptrace_hw_copy_thread(struct task_struct *tsk)
 227 {
 228         memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
 229 }
 230
 231 static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
 232                                                struct task_struct *tsk,
 233                                                unsigned long idx)
 234 {
 235         struct perf_event *bp = ERR_PTR(-EINVAL);
 236
 237         switch (note_type) {
 238         case NT_ARM_HW_BREAK:
 239                 if (idx >= ARM_MAX_BRP)
 240                         goto out;
 241                 idx = array_index_nospec(idx, ARM_MAX_BRP);
 242                 bp = tsk->thread.debug.hbp_break[idx];
 243                 break;
 244         case NT_ARM_HW_WATCH:
 245                 if (idx >= ARM_MAX_WRP)
 246                         goto out;
 247                 idx = array_index_nospec(idx, ARM_MAX_WRP);
 248                 bp = tsk->thread.debug.hbp_watch[idx];
 249                 break;
 250         }
 251
 252 out:
 253         return bp;
 254 }
 255
 256 static int ptrace_hbp_set_event(unsigned int note_type,
 257                                 struct task_struct *tsk,
 258                                 unsigned long idx,
 259                                 struct perf_event *bp)
 260 {
 261         int err = -EINVAL;
 262
 263         switch (note_type) {
 264         case NT_ARM_HW_BREAK:
 265                 if (idx >= ARM_MAX_BRP)
 266                         goto out;
 267                 idx = array_index_nospec(idx, ARM_MAX_BRP);
 268                 tsk->thread.debug.hbp_break[idx] = bp;
 269                 err = 0;
 270                 break;
 271         case NT_ARM_HW_WATCH:
 272                 if (idx >= ARM_MAX_WRP)
 273                         goto out;
 274                 idx = array_index_nospec(idx, ARM_MAX_WRP);
 275                 tsk->thread.debug.hbp_watch[idx] = bp;
 276                 err = 0;
 277                 break;
 278         }
 279
 280 out:
 281         return err;
 282 }
 283
 284 static struct perf_event *ptrace_hbp_create(unsigned int note_type,
 285                                             struct task_struct *tsk,
 286                                             unsigned long idx)
 287 {
 288         struct perf_event *bp;
 289         struct perf_event_attr attr;
 290         int err, type;
 291
 292         switch (note_type) {
 293         case NT_ARM_HW_BREAK:
 294                 type = HW_BREAKPOINT_X;
 295                 break;
 296         case NT_ARM_HW_WATCH:
 297                 type = HW_BREAKPOINT_RW;
 298                 break;
 299         default:
 300                 return ERR_PTR(-EINVAL);
 301         }
 302
 303         ptrace_breakpoint_init(&attr);
 304
 305         /*
 306          * Initialise fields to sane defaults
 307          * (i.e. values that will pass validation).
 308          */
 309         attr.bp_addr    = 0;
 310         attr.bp_len     = HW_BREAKPOINT_LEN_4;
 311         attr.bp_type    = type;
 312         attr.disabled   = 1;
 313
 314         bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
 315         if (IS_ERR(bp))
 316                 return bp;
 317
 318         err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
 319         if (err)
 320                 return ERR_PTR(err);
 321
 322         return bp;
 323 }
 324
 325 static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
 326                                      struct arch_hw_breakpoint_ctrl ctrl,
 327                                      struct perf_event_attr *attr)
 328 {
 329         int err, len, type, offset, disabled = !ctrl.enabled;
 330
 331         attr->disabled = disabled;
 332         if (disabled)
 333                 return 0;
 334
 335         err = arch_bp_generic_fields(ctrl, &len, &type, &offset);
 336         if (err)
 337                 return err;
 338
 339         switch (note_type) {
 340         case NT_ARM_HW_BREAK:
 341                 if ((type & HW_BREAKPOINT_X) != type)
 342                         return -EINVAL;
 343                 break;
 344         case NT_ARM_HW_WATCH:
 345                 if ((type & HW_BREAKPOINT_RW) != type)
 346                         return -EINVAL;
 347                 break;
 348         default:
 349                 return -EINVAL;
 350         }
 351
 352         attr->bp_len    = len;
 353         attr->bp_type   = type;
 354         attr->bp_addr   += offset;
 355
 356         return 0;
 357 }
 358
 359 static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
 360 {
 361         u8 num;
 362         u32 reg = 0;
 363
 364         switch (note_type) {
 365         case NT_ARM_HW_BREAK:
 366                 num = hw_breakpoint_slots(TYPE_INST);
 367                 break;
 368         case NT_ARM_HW_WATCH:
 369                 num = hw_breakpoint_slots(TYPE_DATA);
 370                 break;
 371         default:
 372                 return -EINVAL;
 373         }
 374
 375         reg |= debug_monitors_arch();
 376         reg <<= 8;
 377         reg |= num;
 378
 379         *info = reg;
 380         return 0;
 381 }
 382
 383 static int ptrace_hbp_get_ctrl(unsigned int note_type,
 384                                struct task_struct *tsk,
 385                                unsigned long idx,
 386                                u32 *ctrl)
 387 {
 388         struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
 389
 390         if (IS_ERR(bp))
 391                 return PTR_ERR(bp);
 392
 393         *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
 394         return 0;
 395 }
 396
 397 static int ptrace_hbp_get_addr(unsigned int note_type,
 398                                struct task_struct *tsk,
 399                                unsigned long idx,
 400                                u64 *addr)
 401 {
 402         struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
 403
 404         if (IS_ERR(bp))
 405                 return PTR_ERR(bp);
 406
 407         *addr = bp ? counter_arch_bp(bp)->address : 0;
 408         return 0;
 409 }
 410
 411 static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
 412                                                         struct task_struct *tsk,
 413                                                         unsigned long idx)
 414 {
 415         struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
 416
 417         if (!bp)
 418                 bp = ptrace_hbp_create(note_type, tsk, idx);
 419
 420         return bp;
 421 }
 422
 423 static int ptrace_hbp_set_ctrl(unsigned int note_type,
 424                                struct task_struct *tsk,
 425                                unsigned long idx,
 426                                u32 uctrl)
 427 {
 428         int err;
 429         struct perf_event *bp;
 430         struct perf_event_attr attr;
 431         struct arch_hw_breakpoint_ctrl ctrl;
 432
 433         bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
 434         if (IS_ERR(bp)) {
 435                 err = PTR_ERR(bp);
 436                 return err;
 437         }
 438
 439         attr = bp->attr;
 440         decode_ctrl_reg(uctrl, &ctrl);
 441         err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
 442         if (err)
 443                 return err;
 444
 445         return modify_user_hw_breakpoint(bp, &attr);
 446 }
 447
 448 static int ptrace_hbp_set_addr(unsigned int note_type,
 449                                struct task_struct *tsk,
 450                                unsigned long idx,
 451                                u64 addr)
 452 {
 453         int err;
 454         struct perf_event *bp;
 455         struct perf_event_attr attr;
 456
 457         bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
 458         if (IS_ERR(bp)) {
 459                 err = PTR_ERR(bp);
 460                 return err;
 461         }
 462
 463         attr = bp->attr;
 464         attr.bp_addr = addr;
 465         err = modify_user_hw_breakpoint(bp, &attr);
 466         return err;
 467 }
 468
 469 #define PTRACE_HBP_ADDR_SZ      sizeof(u64)
 470 #define PTRACE_HBP_CTRL_SZ      sizeof(u32)
 471 #define PTRACE_HBP_PAD_SZ       sizeof(u32)
 472
 473 static int hw_break_get(struct task_struct *target,
 474                         const struct user_regset *regset,
 475                         struct membuf to)
 476 {
 477         unsigned int note_type = regset->core_note_type;
 478         int ret, idx = 0;
 479         u32 info, ctrl;
 480         u64 addr;
 481
 482         /* Resource info */
 483         ret = ptrace_hbp_get_resource_info(note_type, &info);
 484         if (ret)
 485                 return ret;
 486
 487         membuf_write(&to, &info, sizeof(info));
 488         membuf_zero(&to, sizeof(u32));
 489         /* (address, ctrl) registers */
 490         while (to.left) {
 491                 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
 492                 if (ret)
 493                         return ret;
 494                 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
 495                 if (ret)
 496                         return ret;
 497                 membuf_store(&to, addr);
 498                 membuf_store(&to, ctrl);
 499                 membuf_zero(&to, sizeof(u32));
 500                 idx++;
 501         }
 502         return 0;
 503 }
 504
 505 static int hw_break_set(struct task_struct *target,
 506                         const struct user_regset *regset,
 507                         unsigned int pos, unsigned int count,
 508                         const void *kbuf, const void __user *ubuf)
 509 {
 510         unsigned int note_type = regset->core_note_type;
 511         int ret, idx = 0, offset, limit;
 512         u32 ctrl;
 513         u64 addr;
 514
 515         /* Resource info and pad */
 516         offset = offsetof(struct user_hwdebug_state, dbg_regs);
 517         ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
 518         if (ret)
 519                 return ret;
 520
 521         /* (address, ctrl) registers */
 522         limit = regset->n * regset->size;
 523         while (count && offset < limit) {
 524                 if (count < PTRACE_HBP_ADDR_SZ)
 525                         return -EINVAL;
 526                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
 527                                          offset, offset + PTRACE_HBP_ADDR_SZ);
 528                 if (ret)
 529                         return ret;
 530                 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
 531                 if (ret)
 532                         return ret;
 533                 offset += PTRACE_HBP_ADDR_SZ;
 534
 535                 if (!count)
 536                         break;
 537                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
 538                                          offset, offset + PTRACE_HBP_CTRL_SZ);
 539                 if (ret)
 540                         return ret;
 541                 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
 542                 if (ret)
 543                         return ret;
 544                 offset += PTRACE_HBP_CTRL_SZ;
 545
 546                 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
 547                                                 offset,
 548                                                 offset + PTRACE_HBP_PAD_SZ);
 549                 if (ret)
 550                         return ret;
 551                 offset += PTRACE_HBP_PAD_SZ;
 552                 idx++;
 553         }
 554
 555         return 0;
 556 }
 557 #endif  /* CONFIG_HAVE_HW_BREAKPOINT */
 558
 559 static int gpr_get(struct task_struct *target,
 560                    const struct user_regset *regset,
 561                    struct membuf to)
 562 {
 563         struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
 564         return membuf_write(&to, uregs, sizeof(*uregs));
 565 }
 566
 567 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
 568                    unsigned int pos, unsigned int count,
 569                    const void *kbuf, const void __user *ubuf)
 570 {
 571         int ret;
 572         struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
 573
 574         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
 575         if (ret)
 576                 return ret;
 577
 578         if (!valid_user_regs(&newregs, target))
 579                 return -EINVAL;
 580
 581         task_pt_regs(target)->user_regs = newregs;
 582         return 0;
 583 }
 584
 585 static int fpr_active(struct task_struct *target, const struct user_regset *regset)
 586 {
 587         if (!system_supports_fpsimd())
 588                 return -ENODEV;
 589         return regset->n;
 590 }
 591
 592 /*
 593  * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
 594  */
 595 static int __fpr_get(struct task_struct *target,
 596                      const struct user_regset *regset,
 597                      struct membuf to)
 598 {
 599         struct user_fpsimd_state *uregs;
 600
 601         sve_sync_to_fpsimd(target);
 602
 603         uregs = &target->thread.uw.fpsimd_state;
 604
 605         return membuf_write(&to, uregs, sizeof(*uregs));
 606 }
 607
 608 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
 609                    struct membuf to)
 610 {
 611         if (!system_supports_fpsimd())
 612                 return -EINVAL;
 613
 614         if (target == current)
 615                 fpsimd_preserve_current_state();
 616
 617         return __fpr_get(target, regset, to);
 618 }
 619
 620 static int __fpr_set(struct task_struct *target,
 621                      const struct user_regset *regset,
 622                      unsigned int pos, unsigned int count,
 623                      const void *kbuf, const void __user *ubuf,
 624                      unsigned int start_pos)
 625 {
 626         int ret;
 627         struct user_fpsimd_state newstate;
 628
 629         /*
 630          * Ensure target->thread.uw.fpsimd_state is up to date, so that a
 631          * short copyin can't resurrect stale data.
 632          */
 633         sve_sync_to_fpsimd(target);
 634
 635         newstate = target->thread.uw.fpsimd_state;
 636
 637         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate,
 638                                  start_pos, start_pos + sizeof(newstate));
 639         if (ret)
 640                 return ret;
 641
 642         target->thread.uw.fpsimd_state = newstate;
 643
 644         return ret;
 645 }
 646
 647 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
 648                    unsigned int pos, unsigned int count,
 649                    const void *kbuf, const void __user *ubuf)
 650 {
 651         int ret;
 652
 653         if (!system_supports_fpsimd())
 654                 return -EINVAL;
 655
 656         ret = __fpr_set(target, regset, pos, count, kbuf, ubuf, 0);
 657         if (ret)
 658                 return ret;
 659
 660         sve_sync_from_fpsimd_zeropad(target);
 661         fpsimd_flush_task_state(target);
 662
 663         return ret;
 664 }
 665
 666 static int tls_get(struct task_struct *target, const struct user_regset *regset,
 667                    struct membuf to)
 668 {
 669         int ret;
 670
 671         if (target == current)
 672                 tls_preserve_current_state();
 673
 674         ret = membuf_store(&to, target->thread.uw.tp_value);
 675         if (system_supports_tpidr2())
 676                 ret = membuf_store(&to, target->thread.tpidr2_el0);
 677         else
 678                 ret = membuf_zero(&to, sizeof(u64));
 679
 680         return ret;
 681 }
 682
 683 static int tls_set(struct task_struct *target, const struct user_regset *regset,
 684                    unsigned int pos, unsigned int count,
 685                    const void *kbuf, const void __user *ubuf)
 686 {
 687         int ret;
 688         unsigned long tls[2];
 689
 690         tls[0] = target->thread.uw.tp_value;
 691         if (system_supports_sme())
 692                 tls[1] = target->thread.tpidr2_el0;
 693
 694         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, tls, 0, count);
 695         if (ret)
 696                 return ret;
 697
 698         target->thread.uw.tp_value = tls[0];
 699         if (system_supports_sme())
 700                 target->thread.tpidr2_el0 = tls[1];
 701
 702         return ret;
 703 }
 704
 705 static int system_call_get(struct task_struct *target,
 706                            const struct user_regset *regset,
 707                            struct membuf to)
 708 {
 709         return membuf_store(&to, task_pt_regs(target)->syscallno);
 710 }
 711
 712 static int system_call_set(struct task_struct *target,
 713                            const struct user_regset *regset,
 714                            unsigned int pos, unsigned int count,
 715                            const void *kbuf, const void __user *ubuf)
 716 {
 717         int syscallno = task_pt_regs(target)->syscallno;
 718         int ret;
 719
 720         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
 721         if (ret)
 722                 return ret;
 723
 724         task_pt_regs(target)->syscallno = syscallno;
 725         return ret;
 726 }
 727
 728 #ifdef CONFIG_ARM64_SVE
 729
 730 static void sve_init_header_from_task(struct user_sve_header *header,
 731                                       struct task_struct *target,
 732                                       enum vec_type type)
 733 {
 734         unsigned int vq;
 735         bool active;
 736         bool fpsimd_only;
 737         enum vec_type task_type;
 738
 739         memset(header, 0, sizeof(*header));
 740
 741         /* Check if the requested registers are active for the task */
 742         if (thread_sm_enabled(&target->thread))
 743                 task_type = ARM64_VEC_SME;
 744         else
 745                 task_type = ARM64_VEC_SVE;
 746         active = (task_type == type);
 747
 748         switch (type) {
 749         case ARM64_VEC_SVE:
 750                 if (test_tsk_thread_flag(target, TIF_SVE_VL_INHERIT))
 751                         header->flags |= SVE_PT_VL_INHERIT;
 752                 fpsimd_only = !test_tsk_thread_flag(target, TIF_SVE);
 753                 break;
 754         case ARM64_VEC_SME:
 755                 if (test_tsk_thread_flag(target, TIF_SME_VL_INHERIT))
 756                         header->flags |= SVE_PT_VL_INHERIT;
 757                 fpsimd_only = false;
 758                 break;
 759         default:
 760                 WARN_ON_ONCE(1);
 761                 return;
 762         }
 763
 764         if (active) {
 765                 if (fpsimd_only) {
 766                         header->flags |= SVE_PT_REGS_FPSIMD;
 767                 } else {
 768                         header->flags |= SVE_PT_REGS_SVE;
 769                 }
 770         }
 771
 772         header->vl = task_get_vl(target, type);
 773         vq = sve_vq_from_vl(header->vl);
 774
 775         header->max_vl = vec_max_vl(type);
 776         header->size = SVE_PT_SIZE(vq, header->flags);
 777         header->max_size = SVE_PT_SIZE(sve_vq_from_vl(header->max_vl),
 778                                       SVE_PT_REGS_SVE);
 779 }
 780
 781 static unsigned int sve_size_from_header(struct user_sve_header const *header)
 782 {
 783         return ALIGN(header->size, SVE_VQ_BYTES);
 784 }
 785
 786 static int sve_get_common(struct task_struct *target,
 787                           const struct user_regset *regset,
 788                           struct membuf to,
 789                           enum vec_type type)
 790 {
 791         struct user_sve_header header;
 792         unsigned int vq;
 793         unsigned long start, end;
 794
 795         /* Header */
 796         sve_init_header_from_task(&header, target, type);
 797         vq = sve_vq_from_vl(header.vl);
 798
 799         membuf_write(&to, &header, sizeof(header));
 800
 801         if (target == current)
 802                 fpsimd_preserve_current_state();
 803
 804         BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
 805         BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
 806
 807         switch ((header.flags & SVE_PT_REGS_MASK)) {
 808         case SVE_PT_REGS_FPSIMD:
 809                 return __fpr_get(target, regset, to);
 810
 811         case SVE_PT_REGS_SVE:
 812                 start = SVE_PT_SVE_OFFSET;
 813                 end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
 814                 membuf_write(&to, target->thread.sve_state, end - start);
 815
 816                 start = end;
 817                 end = SVE_PT_SVE_FPSR_OFFSET(vq);
 818                 membuf_zero(&to, end - start);
 819
 820                 /*
 821                  * Copy fpsr, and fpcr which must follow contiguously in
 822                  * struct fpsimd_state:
 823                  */
 824                 start = end;
 825                 end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
 826                 membuf_write(&to, &target->thread.uw.fpsimd_state.fpsr,
 827                              end - start);
 828
 829                 start = end;
 830                 end = sve_size_from_header(&header);
 831                 return membuf_zero(&to, end - start);
 832
 833         default:
 834                 return 0;
 835         }
 836 }
 837
 838 static int sve_get(struct task_struct *target,
 839                    const struct user_regset *regset,
 840                    struct membuf to)
 841 {
 842         if (!system_supports_sve())
 843                 return -EINVAL;
 844
 845         return sve_get_common(target, regset, to, ARM64_VEC_SVE);
 846 }
 847
 848 static int sve_set_common(struct task_struct *target,
 849                           const struct user_regset *regset,
 850                           unsigned int pos, unsigned int count,
 851                           const void *kbuf, const void __user *ubuf,
 852                           enum vec_type type)
 853 {
 854         int ret;
 855         struct user_sve_header header;
 856         unsigned int vq;
 857         unsigned long start, end;
 858
 859         /* Header */
 860         if (count < sizeof(header))
 861                 return -EINVAL;
 862         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &header,
 863                                  0, sizeof(header));
 864         if (ret)
 865                 goto out;
 866
 867         /*
 868          * Apart from SVE_PT_REGS_MASK, all SVE_PT_* flags are consumed by
 869          * vec_set_vector_length(), which will also validate them for us:
 870          */
 871         ret = vec_set_vector_length(target, type, header.vl,
 872                 ((unsigned long)header.flags & ~SVE_PT_REGS_MASK) << 16);
 873         if (ret)
 874                 goto out;
 875
 876         /* Actual VL set may be less than the user asked for: */
 877         vq = sve_vq_from_vl(task_get_vl(target, type));
 878
 879         /* Enter/exit streaming mode */
 880         if (system_supports_sme()) {
 881                 u64 old_svcr = target->thread.svcr;
 882
 883                 switch (type) {
 884                 case ARM64_VEC_SVE:
 885                         target->thread.svcr &= ~SVCR_SM_MASK;
 886                         break;
 887                 case ARM64_VEC_SME:
 888                         target->thread.svcr |= SVCR_SM_MASK;
 889
 890                         /*
 891                          * Disable traps and ensure there is SME storage but
 892                          * preserve any currently set values in ZA/ZT.
 893                          */
 894                         sme_alloc(target, false);
 895                         set_tsk_thread_flag(target, TIF_SME);
 896                         break;
 897                 default:
 898                         WARN_ON_ONCE(1);
 899                         ret = -EINVAL;
 900                         goto out;
 901                 }
 902
 903                 /*
 904                  * If we switched then invalidate any existing SVE
 905                  * state and ensure there's storage.
 906                  */
 907                 if (target->thread.svcr != old_svcr)
 908                         sve_alloc(target, true);
 909         }
 910
 911         /* Registers: FPSIMD-only case */
 912
 913         BUILD_BUG_ON(SVE_PT_FPSIMD_OFFSET != sizeof(header));
 914         if ((header.flags & SVE_PT_REGS_MASK) == SVE_PT_REGS_FPSIMD) {
 915                 ret = __fpr_set(target, regset, pos, count, kbuf, ubuf,
 916                                 SVE_PT_FPSIMD_OFFSET);
 917                 clear_tsk_thread_flag(target, TIF_SVE);
 918                 if (type == ARM64_VEC_SME)
 919                         fpsimd_force_sync_to_sve(target);
 920                 goto out;
 921         }
 922
 923         /*
 924          * Otherwise: no registers or full SVE case.  For backwards
 925          * compatibility reasons we treat empty flags as SVE registers.
 926          */
 927
 928         /*
 929          * If setting a different VL from the requested VL and there is
 930          * register data, the data layout will be wrong: don't even
 931          * try to set the registers in this case.
 932          */
 933         if (count && vq != sve_vq_from_vl(header.vl)) {
 934                 ret = -EIO;
 935                 goto out;
 936         }
 937
 938         sve_alloc(target, true);
 939         if (!target->thread.sve_state) {
 940                 ret = -ENOMEM;
 941                 clear_tsk_thread_flag(target, TIF_SVE);
 942                 goto out;
 943         }
 944
 945         /*
 946          * Ensure target->thread.sve_state is up to date with target's
 947          * FPSIMD regs, so that a short copyin leaves trailing
 948          * registers unmodified.  Only enable SVE if we are
 949          * configuring normal SVE, a system with streaming SVE may not
 950          * have normal SVE.
 951          */
 952         fpsimd_sync_to_sve(target);
 953         if (type == ARM64_VEC_SVE)
 954                 set_tsk_thread_flag(target, TIF_SVE);
 955
 956         BUILD_BUG_ON(SVE_PT_SVE_OFFSET != sizeof(header));
 957         start = SVE_PT_SVE_OFFSET;
 958         end = SVE_PT_SVE_FFR_OFFSET(vq) + SVE_PT_SVE_FFR_SIZE(vq);
 959         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 960                                  target->thread.sve_state,
 961                                  start, end);
 962         if (ret)
 963                 goto out;
 964
 965         start = end;
 966         end = SVE_PT_SVE_FPSR_OFFSET(vq);
 967         ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
 968                                         start, end);
 969         if (ret)
 970                 goto out;
 971
 972         /*
 973          * Copy fpsr, and fpcr which must follow contiguously in
 974          * struct fpsimd_state:
 975          */
 976         start = end;
 977         end = SVE_PT_SVE_FPCR_OFFSET(vq) + SVE_PT_SVE_FPCR_SIZE;
 978         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
 979                                  &target->thread.uw.fpsimd_state.fpsr,
 980                                  start, end);
 981
 982 out:
 983         fpsimd_flush_task_state(target);
 984         return ret;
 985 }
 986
 987 static int sve_set(struct task_struct *target,
 988                    const struct user_regset *regset,
 989                    unsigned int pos, unsigned int count,
 990                    const void *kbuf, const void __user *ubuf)
 991 {
 992         if (!system_supports_sve())
 993                 return -EINVAL;
 994
 995         return sve_set_common(target, regset, pos, count, kbuf, ubuf,
 996                               ARM64_VEC_SVE);
 997 }
 998
 999 #endif /* CONFIG_ARM64_SVE */
1000
1001 #ifdef CONFIG_ARM64_SME
1002
1003 static int ssve_get(struct task_struct *target,
1004                    const struct user_regset *regset,
1005                    struct membuf to)
1006 {
1007         if (!system_supports_sme())
1008                 return -EINVAL;
1009
1010         return sve_get_common(target, regset, to, ARM64_VEC_SME);
1011 }
1012
1013 static int ssve_set(struct task_struct *target,
1014                     const struct user_regset *regset,
1015                     unsigned int pos, unsigned int count,
1016                     const void *kbuf, const void __user *ubuf)
1017 {
1018         if (!system_supports_sme())
1019                 return -EINVAL;
1020
1021         return sve_set_common(target, regset, pos, count, kbuf, ubuf,
1022                               ARM64_VEC_SME);
1023 }
1024
1025 static int za_get(struct task_struct *target,
1026                   const struct user_regset *regset,
1027                   struct membuf to)
1028 {
1029         struct user_za_header header;
1030         unsigned int vq;
1031         unsigned long start, end;
1032
1033         if (!system_supports_sme())
1034                 return -EINVAL;
1035
1036         /* Header */
1037         memset(&header, 0, sizeof(header));
1038
1039         if (test_tsk_thread_flag(target, TIF_SME_VL_INHERIT))
1040                 header.flags |= ZA_PT_VL_INHERIT;
1041
1042         header.vl = task_get_sme_vl(target);
1043         vq = sve_vq_from_vl(header.vl);
1044         header.max_vl = sme_max_vl();
1045         header.max_size = ZA_PT_SIZE(vq);
1046
1047         /* If ZA is not active there is only the header */
1048         if (thread_za_enabled(&target->thread))
1049                 header.size = ZA_PT_SIZE(vq);
1050         else
1051                 header.size = ZA_PT_ZA_OFFSET;
1052
1053         membuf_write(&to, &header, sizeof(header));
1054
1055         BUILD_BUG_ON(ZA_PT_ZA_OFFSET != sizeof(header));
1056         end = ZA_PT_ZA_OFFSET;
1057
1058         if (target == current)
1059                 fpsimd_preserve_current_state();
1060
1061         /* Any register data to include? */
1062         if (thread_za_enabled(&target->thread)) {
1063                 start = end;
1064                 end = ZA_PT_SIZE(vq);
1065                 membuf_write(&to, target->thread.za_state, end - start);
1066         }
1067
1068         /* Zero any trailing padding */
1069         start = end;
1070         end = ALIGN(header.size, SVE_VQ_BYTES);
1071         return membuf_zero(&to, end - start);
1072 }
1073
1074 static int za_set(struct task_struct *target,
1075                   const struct user_regset *regset,
1076                   unsigned int pos, unsigned int count,
1077                   const void *kbuf, const void __user *ubuf)
1078 {
1079         int ret;
1080         struct user_za_header header;
1081         unsigned int vq;
1082         unsigned long start, end;
1083
1084         if (!system_supports_sme())
1085                 return -EINVAL;
1086
1087         /* Header */
1088         if (count < sizeof(header))
1089                 return -EINVAL;
1090         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &header,
1091                                  0, sizeof(header));
1092         if (ret)
1093                 goto out;
1094
1095         /*
1096          * All current ZA_PT_* flags are consumed by
1097          * vec_set_vector_length(), which will also validate them for
1098          * us:
1099          */
1100         ret = vec_set_vector_length(target, ARM64_VEC_SME, header.vl,
1101                 ((unsigned long)header.flags) << 16);
1102         if (ret)
1103                 goto out;
1104
1105         /* Actual VL set may be less than the user asked for: */
1106         vq = sve_vq_from_vl(task_get_sme_vl(target));
1107
1108         /* Ensure there is some SVE storage for streaming mode */
1109         if (!target->thread.sve_state) {
1110                 sve_alloc(target, false);
1111                 if (!target->thread.sve_state) {
1112                         ret = -ENOMEM;
1113                         goto out;
1114                 }
1115         }
1116
1117         /* Allocate/reinit ZA storage */
1118         sme_alloc(target, true);
1119         if (!target->thread.za_state) {
1120                 ret = -ENOMEM;
1121                 goto out;
1122         }
1123
1124         /* If there is no data then disable ZA */
1125         if (!count) {
1126                 target->thread.svcr &= ~SVCR_ZA_MASK;
1127                 goto out;
1128         }
1129
1130         /*
1131          * If setting a different VL from the requested VL and there is
1132          * register data, the data layout will be wrong: don't even
1133          * try to set the registers in this case.
1134          */
1135         if (vq != sve_vq_from_vl(header.vl)) {
1136                 ret = -EIO;
1137                 goto out;
1138         }
1139
1140         BUILD_BUG_ON(ZA_PT_ZA_OFFSET != sizeof(header));
1141         start = ZA_PT_ZA_OFFSET;
1142         end = ZA_PT_SIZE(vq);
1143         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1144                                  target->thread.za_state,
1145                                  start, end);
1146         if (ret)
1147                 goto out;
1148
1149         /* Mark ZA as active and let userspace use it */
1150         set_tsk_thread_flag(target, TIF_SME);
1151         target->thread.svcr |= SVCR_ZA_MASK;
1152
1153 out:
1154         fpsimd_flush_task_state(target);
1155         return ret;
1156 }
1157
1158 #endif /* CONFIG_ARM64_SME */
1159
1160 #ifdef CONFIG_ARM64_PTR_AUTH
1161 static int pac_mask_get(struct task_struct *target,
1162                         const struct user_regset *regset,
1163                         struct membuf to)
1164 {
1165         /*
1166          * The PAC bits can differ across data and instruction pointers
1167          * depending on TCR_EL1.TBID*, which we may make use of in future, so
1168          * we expose separate masks.
1169          */
1170         unsigned long mask = ptrauth_user_pac_mask();
1171         struct user_pac_mask uregs = {
1172                 .data_mask = mask,
1173                 .insn_mask = mask,
1174         };
1175
1176         if (!system_supports_address_auth())
1177                 return -EINVAL;
1178
1179         return membuf_write(&to, &uregs, sizeof(uregs));
1180 }
1181
1182 static int pac_enabled_keys_get(struct task_struct *target,
1183                                 const struct user_regset *regset,
1184                                 struct membuf to)
1185 {
1186         long enabled_keys = ptrauth_get_enabled_keys(target);
1187
1188         if (IS_ERR_VALUE(enabled_keys))
1189                 return enabled_keys;
1190
1191         return membuf_write(&to, &enabled_keys, sizeof(enabled_keys));
1192 }
1193
1194 static int pac_enabled_keys_set(struct task_struct *target,
1195                                 const struct user_regset *regset,
1196                                 unsigned int pos, unsigned int count,
1197                                 const void *kbuf, const void __user *ubuf)
1198 {
1199         int ret;
1200         long enabled_keys = ptrauth_get_enabled_keys(target);
1201
1202         if (IS_ERR_VALUE(enabled_keys))
1203                 return enabled_keys;
1204
1205         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &enabled_keys, 0,
1206                                  sizeof(long));
1207         if (ret)
1208                 return ret;
1209
1210         return ptrauth_set_enabled_keys(target, PR_PAC_ENABLED_KEYS_MASK,
1211                                         enabled_keys);
1212 }
1213
1214 #ifdef CONFIG_CHECKPOINT_RESTORE
1215 static __uint128_t pac_key_to_user(const struct ptrauth_key *key)
1216 {
1217         return (__uint128_t)key->hi << 64 | key->lo;
1218 }
1219
1220 static struct ptrauth_key pac_key_from_user(__uint128_t ukey)
1221 {
1222         struct ptrauth_key key = {
1223                 .lo = (unsigned long)ukey,
1224                 .hi = (unsigned long)(ukey >> 64),
1225         };
1226
1227         return key;
1228 }
1229
1230 static void pac_address_keys_to_user(struct user_pac_address_keys *ukeys,
1231                                      const struct ptrauth_keys_user *keys)
1232 {
1233         ukeys->apiakey = pac_key_to_user(&keys->apia);
1234         ukeys->apibkey = pac_key_to_user(&keys->apib);
1235         ukeys->apdakey = pac_key_to_user(&keys->apda);
1236         ukeys->apdbkey = pac_key_to_user(&keys->apdb);
1237 }
1238
1239 static void pac_address_keys_from_user(struct ptrauth_keys_user *keys,
1240                                        const struct user_pac_address_keys *ukeys)
1241 {
1242         keys->apia = pac_key_from_user(ukeys->apiakey);
1243         keys->apib = pac_key_from_user(ukeys->apibkey);
1244         keys->apda = pac_key_from_user(ukeys->apdakey);
1245         keys->apdb = pac_key_from_user(ukeys->apdbkey);
1246 }
1247
1248 static int pac_address_keys_get(struct task_struct *target,
1249                                 const struct user_regset *regset,
1250                                 struct membuf to)
1251 {
1252         struct ptrauth_keys_user *keys = &target->thread.keys_user;
1253         struct user_pac_address_keys user_keys;
1254
1255         if (!system_supports_address_auth())
1256                 return -EINVAL;
1257
1258         pac_address_keys_to_user(&user_keys, keys);
1259
1260         return membuf_write(&to, &user_keys, sizeof(user_keys));
1261 }
1262
1263 static int pac_address_keys_set(struct task_struct *target,
1264                                 const struct user_regset *regset,
1265                                 unsigned int pos, unsigned int count,
1266                                 const void *kbuf, const void __user *ubuf)
1267 {
1268         struct ptrauth_keys_user *keys = &target->thread.keys_user;
1269         struct user_pac_address_keys user_keys;
1270         int ret;
1271
1272         if (!system_supports_address_auth())
1273                 return -EINVAL;
1274
1275         pac_address_keys_to_user(&user_keys, keys);
1276         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1277                                  &user_keys, 0, -1);
1278         if (ret)
1279                 return ret;
1280         pac_address_keys_from_user(keys, &user_keys);
1281
1282         return 0;
1283 }
1284
1285 static void pac_generic_keys_to_user(struct user_pac_generic_keys *ukeys,
1286                                      const struct ptrauth_keys_user *keys)
1287 {
1288         ukeys->apgakey = pac_key_to_user(&keys->apga);
1289 }
1290
1291 static void pac_generic_keys_from_user(struct ptrauth_keys_user *keys,
1292                                        const struct user_pac_generic_keys *ukeys)
1293 {
1294         keys->apga = pac_key_from_user(ukeys->apgakey);
1295 }
1296
1297 static int pac_generic_keys_get(struct task_struct *target,
1298                                 const struct user_regset *regset,
1299                                 struct membuf to)
1300 {
1301         struct ptrauth_keys_user *keys = &target->thread.keys_user;
1302         struct user_pac_generic_keys user_keys;
1303
1304         if (!system_supports_generic_auth())
1305                 return -EINVAL;
1306
1307         pac_generic_keys_to_user(&user_keys, keys);
1308
1309         return membuf_write(&to, &user_keys, sizeof(user_keys));
1310 }
1311
1312 static int pac_generic_keys_set(struct task_struct *target,
1313                                 const struct user_regset *regset,
1314                                 unsigned int pos, unsigned int count,
1315                                 const void *kbuf, const void __user *ubuf)
1316 {
1317         struct ptrauth_keys_user *keys = &target->thread.keys_user;
1318         struct user_pac_generic_keys user_keys;
1319         int ret;
1320
1321         if (!system_supports_generic_auth())
1322                 return -EINVAL;
1323
1324         pac_generic_keys_to_user(&user_keys, keys);
1325         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
1326                                  &user_keys, 0, -1);
1327         if (ret)
1328                 return ret;
1329         pac_generic_keys_from_user(keys, &user_keys);
1330
1331         return 0;
1332 }
1333 #endif /* CONFIG_CHECKPOINT_RESTORE */
1334 #endif /* CONFIG_ARM64_PTR_AUTH */
1335
1336 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
1337 static int tagged_addr_ctrl_get(struct task_struct *target,
1338                                 const struct user_regset *regset,
1339                                 struct membuf to)
1340 {
1341         long ctrl = get_tagged_addr_ctrl(target);
1342
1343         if (IS_ERR_VALUE(ctrl))
1344                 return ctrl;
1345
1346         return membuf_write(&to, &ctrl, sizeof(ctrl));
1347 }
1348
1349 static int tagged_addr_ctrl_set(struct task_struct *target, const struct
1350                                 user_regset *regset, unsigned int pos,
1351                                 unsigned int count, const void *kbuf, const
1352                                 void __user *ubuf)
1353 {
1354         int ret;
1355         long ctrl;
1356
1357         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1);
1358         if (ret)
1359                 return ret;
1360
1361         return set_tagged_addr_ctrl(target, ctrl);
1362 }
1363 #endif
1364
1365 enum aarch64_regset {
1366         REGSET_GPR,
1367         REGSET_FPR,
1368         REGSET_TLS,
1369 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1370         REGSET_HW_BREAK,
1371         REGSET_HW_WATCH,
1372 #endif
1373         REGSET_SYSTEM_CALL,
1374 #ifdef CONFIG_ARM64_SVE
1375         REGSET_SVE,
1376 #endif
1377 #ifdef CONFIG_ARM64_SME
1378         REGSET_SSVE,
1379         REGSET_ZA,
1380 #endif
1381 #ifdef CONFIG_ARM64_PTR_AUTH
1382         REGSET_PAC_MASK,
1383         REGSET_PAC_ENABLED_KEYS,
1384 #ifdef CONFIG_CHECKPOINT_RESTORE
1385         REGSET_PACA_KEYS,
1386         REGSET_PACG_KEYS,
1387 #endif
1388 #endif
1389 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
1390         REGSET_TAGGED_ADDR_CTRL,
1391 #endif
1392 };
1393
1394 static const struct user_regset aarch64_regsets[] = {
1395         [REGSET_GPR] = {
1396                 .core_note_type = NT_PRSTATUS,
1397                 .n = sizeof(struct user_pt_regs) / sizeof(u64),
1398                 .size = sizeof(u64),
1399                 .align = sizeof(u64),
1400                 .regset_get = gpr_get,
1401                 .set = gpr_set
1402         },
1403         [REGSET_FPR] = {
1404                 .core_note_type = NT_PRFPREG,
1405                 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
1406                 /*
1407                  * We pretend we have 32-bit registers because the fpsr and
1408                  * fpcr are 32-bits wide.
1409                  */
1410                 .size = sizeof(u32),
1411                 .align = sizeof(u32),
1412                 .active = fpr_active,
1413                 .regset_get = fpr_get,
1414                 .set = fpr_set
1415         },
1416         [REGSET_TLS] = {
1417                 .core_note_type = NT_ARM_TLS,
1418                 .n = 2,
1419                 .size = sizeof(void *),
1420                 .align = sizeof(void *),
1421                 .regset_get = tls_get,
1422                 .set = tls_set,
1423         },
1424 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1425         [REGSET_HW_BREAK] = {
1426                 .core_note_type = NT_ARM_HW_BREAK,
1427                 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1428                 .size = sizeof(u32),
1429                 .align = sizeof(u32),
1430                 .regset_get = hw_break_get,
1431                 .set = hw_break_set,
1432         },
1433         [REGSET_HW_WATCH] = {
1434                 .core_note_type = NT_ARM_HW_WATCH,
1435                 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1436                 .size = sizeof(u32),
1437                 .align = sizeof(u32),
1438                 .regset_get = hw_break_get,
1439                 .set = hw_break_set,
1440         },
1441 #endif
1442         [REGSET_SYSTEM_CALL] = {
1443                 .core_note_type = NT_ARM_SYSTEM_CALL,
1444                 .n = 1,
1445                 .size = sizeof(int),
1446                 .align = sizeof(int),
1447                 .regset_get = system_call_get,
1448                 .set = system_call_set,
1449         },
1450 #ifdef CONFIG_ARM64_SVE
1451         [REGSET_SVE] = { /* Scalable Vector Extension */
1452                 .core_note_type = NT_ARM_SVE,
1453                 .n = DIV_ROUND_UP(SVE_PT_SIZE(ARCH_SVE_VQ_MAX,
1454                                               SVE_PT_REGS_SVE),
1455                                   SVE_VQ_BYTES),
1456                 .size = SVE_VQ_BYTES,
1457                 .align = SVE_VQ_BYTES,
1458                 .regset_get = sve_get,
1459                 .set = sve_set,
1460         },
1461 #endif
1462 #ifdef CONFIG_ARM64_SME
1463         [REGSET_SSVE] = { /* Streaming mode SVE */
1464                 .core_note_type = NT_ARM_SSVE,
1465                 .n = DIV_ROUND_UP(SVE_PT_SIZE(SME_VQ_MAX, SVE_PT_REGS_SVE),
1466                                   SVE_VQ_BYTES),
1467                 .size = SVE_VQ_BYTES,
1468                 .align = SVE_VQ_BYTES,
1469                 .regset_get = ssve_get,
1470                 .set = ssve_set,
1471         },
1472         [REGSET_ZA] = { /* SME ZA */
1473                 .core_note_type = NT_ARM_ZA,
1474                 /*
1475                  * ZA is a single register but it's variably sized and
1476                  * the ptrace core requires that the size of any data
1477                  * be an exact multiple of the configured register
1478                  * size so report as though we had SVE_VQ_BYTES
1479                  * registers. These values aren't exposed to
1480                  * userspace.
1481                  */
1482                 .n = DIV_ROUND_UP(ZA_PT_SIZE(SME_VQ_MAX), SVE_VQ_BYTES),
1483                 .size = SVE_VQ_BYTES,
1484                 .align = SVE_VQ_BYTES,
1485                 .regset_get = za_get,
1486                 .set = za_set,
1487         },
1488 #endif
1489 #ifdef CONFIG_ARM64_PTR_AUTH
1490         [REGSET_PAC_MASK] = {
1491                 .core_note_type = NT_ARM_PAC_MASK,
1492                 .n = sizeof(struct user_pac_mask) / sizeof(u64),
1493                 .size = sizeof(u64),
1494                 .align = sizeof(u64),
1495                 .regset_get = pac_mask_get,
1496                 /* this cannot be set dynamically */
1497         },
1498         [REGSET_PAC_ENABLED_KEYS] = {
1499                 .core_note_type = NT_ARM_PAC_ENABLED_KEYS,
1500                 .n = 1,
1501                 .size = sizeof(long),
1502                 .align = sizeof(long),
1503                 .regset_get = pac_enabled_keys_get,
1504                 .set = pac_enabled_keys_set,
1505         },
1506 #ifdef CONFIG_CHECKPOINT_RESTORE
1507         [REGSET_PACA_KEYS] = {
1508                 .core_note_type = NT_ARM_PACA_KEYS,
1509                 .n = sizeof(struct user_pac_address_keys) / sizeof(__uint128_t),
1510                 .size = sizeof(__uint128_t),
1511                 .align = sizeof(__uint128_t),
1512                 .regset_get = pac_address_keys_get,
1513                 .set = pac_address_keys_set,
1514         },
1515         [REGSET_PACG_KEYS] = {
1516                 .core_note_type = NT_ARM_PACG_KEYS,
1517                 .n = sizeof(struct user_pac_generic_keys) / sizeof(__uint128_t),
1518                 .size = sizeof(__uint128_t),
1519                 .align = sizeof(__uint128_t),
1520                 .regset_get = pac_generic_keys_get,
1521                 .set = pac_generic_keys_set,
1522         },
1523 #endif
1524 #endif
1525 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
1526         [REGSET_TAGGED_ADDR_CTRL] = {
1527                 .core_note_type = NT_ARM_TAGGED_ADDR_CTRL,
1528                 .n = 1,
1529                 .size = sizeof(long),
1530                 .align = sizeof(long),
1531                 .regset_get = tagged_addr_ctrl_get,
1532                 .set = tagged_addr_ctrl_set,
1533         },
1534 #endif
1535 };
1536
1537 static const struct user_regset_view user_aarch64_view = {
1538         .name = "aarch64", .e_machine = EM_AARCH64,
1539         .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
1540 };
1541
1542 #ifdef CONFIG_COMPAT
1543 enum compat_regset {
1544         REGSET_COMPAT_GPR,
1545         REGSET_COMPAT_VFP,
1546 };
1547
1548 static inline compat_ulong_t compat_get_user_reg(struct task_struct *task, int idx)
1549 {
1550         struct pt_regs *regs = task_pt_regs(task);
1551
1552         switch (idx) {
1553         case 15:
1554                 return regs->pc;
1555         case 16:
1556                 return pstate_to_compat_psr(regs->pstate);
1557         case 17:
1558                 return regs->orig_x0;
1559         default:
1560                 return regs->regs[idx];
1561         }
1562 }
1563
1564 static int compat_gpr_get(struct task_struct *target,
1565                           const struct user_regset *regset,
1566                           struct membuf to)
1567 {
1568         int i = 0;
1569
1570         while (to.left)
1571                 membuf_store(&to, compat_get_user_reg(target, i++));
1572         return 0;
1573 }
1574
1575 static int compat_gpr_set(struct task_struct *target,
1576                           const struct user_regset *regset,
1577                           unsigned int pos, unsigned int count,
1578                           const void *kbuf, const void __user *ubuf)
1579 {
1580         struct pt_regs newregs;
1581         int ret = 0;
1582         unsigned int i, start, num_regs;
1583
1584         /* Calculate the number of AArch32 registers contained in count */
1585         num_regs = count / regset->size;
1586
1587         /* Convert pos into an register number */
1588         start = pos / regset->size;
1589
1590         if (start + num_regs > regset->n)
1591                 return -EIO;
1592
1593         newregs = *task_pt_regs(target);
1594
1595         for (i = 0; i < num_regs; ++i) {
1596                 unsigned int idx = start + i;
1597                 compat_ulong_t reg;
1598
1599                 if (kbuf) {
1600                         memcpy(&reg, kbuf, sizeof(reg));
1601                         kbuf += sizeof(reg);
1602                 } else {
1603                         ret = copy_from_user(&reg, ubuf, sizeof(reg));
1604                         if (ret) {
1605                                 ret = -EFAULT;
1606                                 break;
1607                         }
1608
1609                         ubuf += sizeof(reg);
1610                 }
1611
1612                 switch (idx) {
1613                 case 15:
1614                         newregs.pc = reg;
1615                         break;
1616                 case 16:
1617                         reg = compat_psr_to_pstate(reg);
1618                         newregs.pstate = reg;
1619                         break;
1620                 case 17:
1621                         newregs.orig_x0 = reg;
1622                         break;
1623                 default:
1624                         newregs.regs[idx] = reg;
1625                 }
1626
1627         }
1628
1629         if (valid_user_regs(&newregs.user_regs, target))
1630                 *task_pt_regs(target) = newregs;
1631         else
1632                 ret = -EINVAL;
1633
1634         return ret;
1635 }
1636
1637 static int compat_vfp_get(struct task_struct *target,
1638                           const struct user_regset *regset,
1639                           struct membuf to)
1640 {
1641         struct user_fpsimd_state *uregs;
1642         compat_ulong_t fpscr;
1643
1644         if (!system_supports_fpsimd())
1645                 return -EINVAL;
1646
1647         uregs = &target->thread.uw.fpsimd_state;
1648
1649         if (target == current)
1650                 fpsimd_preserve_current_state();
1651
1652         /*
1653          * The VFP registers are packed into the fpsimd_state, so they all sit
1654          * nicely together for us. We just need to create the fpscr separately.
1655          */
1656         membuf_write(&to, uregs, VFP_STATE_SIZE - sizeof(compat_ulong_t));
1657         fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
1658                 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
1659         return membuf_store(&to, fpscr);
1660 }
1661
1662 static int compat_vfp_set(struct task_struct *target,
1663                           const struct user_regset *regset,
1664                           unsigned int pos, unsigned int count,
1665                           const void *kbuf, const void __user *ubuf)
1666 {
1667         struct user_fpsimd_state *uregs;
1668         compat_ulong_t fpscr;
1669         int ret, vregs_end_pos;
1670
1671         if (!system_supports_fpsimd())
1672                 return -EINVAL;
1673
1674         uregs = &target->thread.uw.fpsimd_state;
1675
1676         vregs_end_pos = VFP_STATE_SIZE - sizeof(compat_ulong_t);
1677         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
1678                                  vregs_end_pos);
1679
1680         if (count && !ret) {
1681                 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &fpscr,
1682                                          vregs_end_pos, VFP_STATE_SIZE);
1683                 if (!ret) {
1684                         uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
1685                         uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
1686                 }
1687         }
1688
1689         fpsimd_flush_task_state(target);
1690         return ret;
1691 }
1692
1693 static int compat_tls_get(struct task_struct *target,
1694                           const struct user_regset *regset,
1695                           struct membuf to)
1696 {
1697         return membuf_store(&to, (compat_ulong_t)target->thread.uw.tp_value);
1698 }
1699
1700 static int compat_tls_set(struct task_struct *target,
1701                           const struct user_regset *regset, unsigned int pos,
1702                           unsigned int count, const void *kbuf,
1703                           const void __user *ubuf)
1704 {
1705         int ret;
1706         compat_ulong_t tls = target->thread.uw.tp_value;
1707
1708         ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
1709         if (ret)
1710                 return ret;
1711
1712         target->thread.uw.tp_value = tls;
1713         return ret;
1714 }
1715
1716 static const struct user_regset aarch32_regsets[] = {
1717         [REGSET_COMPAT_GPR] = {
1718                 .core_note_type = NT_PRSTATUS,
1719                 .n = COMPAT_ELF_NGREG,
1720                 .size = sizeof(compat_elf_greg_t),
1721                 .align = sizeof(compat_elf_greg_t),
1722                 .regset_get = compat_gpr_get,
1723                 .set = compat_gpr_set
1724         },
1725         [REGSET_COMPAT_VFP] = {
1726                 .core_note_type = NT_ARM_VFP,
1727                 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1728                 .size = sizeof(compat_ulong_t),
1729                 .align = sizeof(compat_ulong_t),
1730                 .active = fpr_active,
1731                 .regset_get = compat_vfp_get,
1732                 .set = compat_vfp_set
1733         },
1734 };
1735
1736 static const struct user_regset_view user_aarch32_view = {
1737         .name = "aarch32", .e_machine = EM_ARM,
1738         .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
1739 };
1740
1741 static const struct user_regset aarch32_ptrace_regsets[] = {
1742         [REGSET_GPR] = {
1743                 .core_note_type = NT_PRSTATUS,
1744                 .n = COMPAT_ELF_NGREG,
1745                 .size = sizeof(compat_elf_greg_t),
1746                 .align = sizeof(compat_elf_greg_t),
1747                 .regset_get = compat_gpr_get,
1748                 .set = compat_gpr_set
1749         },
1750         [REGSET_FPR] = {
1751                 .core_note_type = NT_ARM_VFP,
1752                 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1753                 .size = sizeof(compat_ulong_t),
1754                 .align = sizeof(compat_ulong_t),
1755                 .regset_get = compat_vfp_get,
1756                 .set = compat_vfp_set
1757         },
1758         [REGSET_TLS] = {
1759                 .core_note_type = NT_ARM_TLS,
1760                 .n = 1,
1761                 .size = sizeof(compat_ulong_t),
1762                 .align = sizeof(compat_ulong_t),
1763                 .regset_get = compat_tls_get,
1764                 .set = compat_tls_set,
1765         },
1766 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1767         [REGSET_HW_BREAK] = {
1768                 .core_note_type = NT_ARM_HW_BREAK,
1769                 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1770                 .size = sizeof(u32),
1771                 .align = sizeof(u32),
1772                 .regset_get = hw_break_get,
1773                 .set = hw_break_set,
1774         },
1775         [REGSET_HW_WATCH] = {
1776                 .core_note_type = NT_ARM_HW_WATCH,
1777                 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1778                 .size = sizeof(u32),
1779                 .align = sizeof(u32),
1780                 .regset_get = hw_break_get,
1781                 .set = hw_break_set,
1782         },
1783 #endif
1784         [REGSET_SYSTEM_CALL] = {
1785                 .core_note_type = NT_ARM_SYSTEM_CALL,
1786                 .n = 1,
1787                 .size = sizeof(int),
1788                 .align = sizeof(int),
1789                 .regset_get = system_call_get,
1790                 .set = system_call_set,
1791         },
1792 };
1793
1794 static const struct user_regset_view user_aarch32_ptrace_view = {
1795         .name = "aarch32", .e_machine = EM_ARM,
1796         .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
1797 };
1798
1799 static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
1800                                    compat_ulong_t __user *ret)
1801 {
1802         compat_ulong_t tmp;
1803
1804         if (off & 3)
1805                 return -EIO;
1806
1807         if (off == COMPAT_PT_TEXT_ADDR)
1808                 tmp = tsk->mm->start_code;
1809         else if (off == COMPAT_PT_DATA_ADDR)
1810                 tmp = tsk->mm->start_data;
1811         else if (off == COMPAT_PT_TEXT_END_ADDR)
1812                 tmp = tsk->mm->end_code;
1813         else if (off < sizeof(compat_elf_gregset_t))
1814                 tmp = compat_get_user_reg(tsk, off >> 2);
1815         else if (off >= COMPAT_USER_SZ)
1816                 return -EIO;
1817         else
1818                 tmp = 0;
1819
1820         return put_user(tmp, ret);
1821 }
1822
1823 static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
1824                                     compat_ulong_t val)
1825 {
1826         struct pt_regs newregs = *task_pt_regs(tsk);
1827         unsigned int idx = off / 4;
1828
1829         if (off & 3 || off >= COMPAT_USER_SZ)
1830                 return -EIO;
1831
1832         if (off >= sizeof(compat_elf_gregset_t))
1833                 return 0;
1834
1835         switch (idx) {
1836         case 15:
1837                 newregs.pc = val;
1838                 break;
1839         case 16:
1840                 newregs.pstate = compat_psr_to_pstate(val);
1841                 break;
1842         case 17:
1843                 newregs.orig_x0 = val;
1844                 break;
1845         default:
1846                 newregs.regs[idx] = val;
1847         }
1848
1849         if (!valid_user_regs(&newregs.user_regs, tsk))
1850                 return -EINVAL;
1851
1852         *task_pt_regs(tsk) = newregs;
1853         return 0;
1854 }
1855
1856 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1857
1858 /*
1859  * Convert a virtual register number into an index for a thread_info
1860  * breakpoint array. Breakpoints are identified using positive numbers
1861  * whilst watchpoints are negative. The registers are laid out as pairs
1862  * of (address, control), each pair mapping to a unique hw_breakpoint struct.
1863  * Register 0 is reserved for describing resource information.
1864  */
1865 static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
1866 {
1867         return (abs(num) - 1) >> 1;
1868 }
1869
1870 static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
1871 {
1872         u8 num_brps, num_wrps, debug_arch, wp_len;
1873         u32 reg = 0;
1874
1875         num_brps        = hw_breakpoint_slots(TYPE_INST);
1876         num_wrps        = hw_breakpoint_slots(TYPE_DATA);
1877
1878         debug_arch      = debug_monitors_arch();
1879         wp_len          = 8;
1880         reg             |= debug_arch;
1881         reg             <<= 8;
1882         reg             |= wp_len;
1883         reg             <<= 8;
1884         reg             |= num_wrps;
1885         reg             <<= 8;
1886         reg             |= num_brps;
1887
1888         *kdata = reg;
1889         return 0;
1890 }
1891
1892 static int compat_ptrace_hbp_get(unsigned int note_type,
1893                                  struct task_struct *tsk,
1894                                  compat_long_t num,
1895                                  u32 *kdata)
1896 {
1897         u64 addr = 0;
1898         u32 ctrl = 0;
1899
1900         int err, idx = compat_ptrace_hbp_num_to_idx(num);
1901
1902         if (num & 1) {
1903                 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
1904                 *kdata = (u32)addr;
1905         } else {
1906                 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
1907                 *kdata = ctrl;
1908         }
1909
1910         return err;
1911 }
1912
1913 static int compat_ptrace_hbp_set(unsigned int note_type,
1914                                  struct task_struct *tsk,
1915                                  compat_long_t num,
1916                                  u32 *kdata)
1917 {
1918         u64 addr;
1919         u32 ctrl;
1920
1921         int err, idx = compat_ptrace_hbp_num_to_idx(num);
1922
1923         if (num & 1) {
1924                 addr = *kdata;
1925                 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
1926         } else {
1927                 ctrl = *kdata;
1928                 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
1929         }
1930
1931         return err;
1932 }
1933
1934 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
1935                                     compat_ulong_t __user *data)
1936 {
1937         int ret;
1938         u32 kdata;
1939
1940         /* Watchpoint */
1941         if (num < 0) {
1942                 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
1943         /* Resource info */
1944         } else if (num == 0) {
1945                 ret = compat_ptrace_hbp_get_resource_info(&kdata);
1946         /* Breakpoint */
1947         } else {
1948                 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
1949         }
1950
1951         if (!ret)
1952                 ret = put_user(kdata, data);
1953
1954         return ret;
1955 }
1956
1957 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
1958                                     compat_ulong_t __user *data)
1959 {
1960         int ret;
1961         u32 kdata = 0;
1962
1963         if (num == 0)
1964                 return 0;
1965
1966         ret = get_user(kdata, data);
1967         if (ret)
1968                 return ret;
1969
1970         if (num < 0)
1971                 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
1972         else
1973                 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
1974
1975         return ret;
1976 }
1977 #endif  /* CONFIG_HAVE_HW_BREAKPOINT */
1978
1979 long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1980                         compat_ulong_t caddr, compat_ulong_t cdata)
1981 {
1982         unsigned long addr = caddr;
1983         unsigned long data = cdata;
1984         void __user *datap = compat_ptr(data);
1985         int ret;
1986
1987         switch (request) {
1988                 case PTRACE_PEEKUSR:
1989                         ret = compat_ptrace_read_user(child, addr, datap);
1990                         break;
1991
1992                 case PTRACE_POKEUSR:
1993                         ret = compat_ptrace_write_user(child, addr, data);
1994                         break;
1995
1996                 case COMPAT_PTRACE_GETREGS:
1997                         ret = copy_regset_to_user(child,
1998                                                   &user_aarch32_view,
1999                                                   REGSET_COMPAT_GPR,
2000                                                   0, sizeof(compat_elf_gregset_t),
2001                                                   datap);
2002                         break;
2003
2004                 case COMPAT_PTRACE_SETREGS:
2005                         ret = copy_regset_from_user(child,
2006                                                     &user_aarch32_view,
2007                                                     REGSET_COMPAT_GPR,
2008                                                     0, sizeof(compat_elf_gregset_t),
2009                                                     datap);
2010                         break;
2011
2012                 case COMPAT_PTRACE_GET_THREAD_AREA:
2013                         ret = put_user((compat_ulong_t)child->thread.uw.tp_value,
2014                                        (compat_ulong_t __user *)datap);
2015                         break;
2016
2017                 case COMPAT_PTRACE_SET_SYSCALL:
2018                         task_pt_regs(child)->syscallno = data;
2019                         ret = 0;
2020                         break;
2021
2022                 case COMPAT_PTRACE_GETVFPREGS:
2023                         ret = copy_regset_to_user(child,
2024                                                   &user_aarch32_view,
2025                                                   REGSET_COMPAT_VFP,
2026                                                   0, VFP_STATE_SIZE,
2027                                                   datap);
2028                         break;
2029
2030                 case COMPAT_PTRACE_SETVFPREGS:
2031                         ret = copy_regset_from_user(child,
2032                                                     &user_aarch32_view,
2033                                                     REGSET_COMPAT_VFP,
2034                                                     0, VFP_STATE_SIZE,
2035                                                     datap);
2036                         break;
2037
2038 #ifdef CONFIG_HAVE_HW_BREAKPOINT
2039                 case COMPAT_PTRACE_GETHBPREGS:
2040                         ret = compat_ptrace_gethbpregs(child, addr, datap);
2041                         break;
2042
2043                 case COMPAT_PTRACE_SETHBPREGS:
2044                         ret = compat_ptrace_sethbpregs(child, addr, datap);
2045                         break;
2046 #endif
2047
2048                 default:
2049                         ret = compat_ptrace_request(child, request, addr,
2050                                                     data);
2051                         break;
2052         }
2053
2054         return ret;
2055 }
2056 #endif /* CONFIG_COMPAT */
2057
2058 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
2059 {
2060 #ifdef CONFIG_COMPAT
2061         /*
2062          * Core dumping of 32-bit tasks or compat ptrace requests must use the
2063          * user_aarch32_view compatible with arm32. Native ptrace requests on
2064          * 32-bit children use an extended user_aarch32_ptrace_view to allow
2065          * access to the TLS register.
2066          */
2067         if (is_compat_task())
2068                 return &user_aarch32_view;
2069         else if (is_compat_thread(task_thread_info(task)))
2070                 return &user_aarch32_ptrace_view;
2071 #endif
2072         return &user_aarch64_view;
2073 }
2074
2075 long arch_ptrace(struct task_struct *child, long request,
2076                  unsigned long addr, unsigned long data)
2077 {
2078         switch (request) {
2079         case PTRACE_PEEKMTETAGS:
2080         case PTRACE_POKEMTETAGS:
2081                 return mte_ptrace_copy_tags(child, request, addr, data);
2082         }
2083
2084         return ptrace_request(child, request, addr, data);
2085 }
2086
2087 enum ptrace_syscall_dir {
2088         PTRACE_SYSCALL_ENTER = 0,
2089         PTRACE_SYSCALL_EXIT,
2090 };
2091
2092 static void report_syscall(struct pt_regs *regs, enum ptrace_syscall_dir dir)
2093 {
2094         int regno;
2095         unsigned long saved_reg;
2096
2097         /*
2098          * We have some ABI weirdness here in the way that we handle syscall
2099          * exit stops because we indicate whether or not the stop has been
2100          * signalled from syscall entry or syscall exit by clobbering a general
2101          * purpose register (ip/r12 for AArch32, x7 for AArch64) in the tracee
2102          * and restoring its old value after the stop. This means that:
2103          *
2104          * - Any writes by the tracer to this register during the stop are
2105          *   ignored/discarded.
2106          *
2107          * - The actual value of the register is not available during the stop,
2108          *   so the tracer cannot save it and restore it later.
2109          *
2110          * - Syscall stops behave differently to seccomp and pseudo-step traps
2111          *   (the latter do not nobble any registers).
2112          */
2113         regno = (is_compat_task() ? 12 : 7);
2114         saved_reg = regs->regs[regno];
2115         regs->regs[regno] = dir;
2116
2117         if (dir == PTRACE_SYSCALL_ENTER) {
2118                 if (ptrace_report_syscall_entry(regs))
2119                         forget_syscall(regs);
2120                 regs->regs[regno] = saved_reg;
2121         } else if (!test_thread_flag(TIF_SINGLESTEP)) {
2122                 ptrace_report_syscall_exit(regs, 0);
2123                 regs->regs[regno] = saved_reg;
2124         } else {
2125                 regs->regs[regno] = saved_reg;
2126
2127                 /*
2128                  * Signal a pseudo-step exception since we are stepping but
2129                  * tracer modifications to the registers may have rewound the
2130                  * state machine.
2131                  */
2132                 ptrace_report_syscall_exit(regs, 1);
2133         }
2134 }
2135
2136 int syscall_trace_enter(struct pt_regs *regs)
2137 {
2138         unsigned long flags = read_thread_flags();
2139
2140         if (flags & (_TIF_SYSCALL_EMU | _TIF_SYSCALL_TRACE)) {
2141                 report_syscall(regs, PTRACE_SYSCALL_ENTER);
2142                 if (flags & _TIF_SYSCALL_EMU)
2143                         return NO_SYSCALL;
2144         }
2145
2146         /* Do the secure computing after ptrace; failures should be fast. */
2147         if (secure_computing() == -1)
2148                 return NO_SYSCALL;
2149
2150         if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
2151                 trace_sys_enter(regs, regs->syscallno);
2152
2153         audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
2154                             regs->regs[2], regs->regs[3]);
2155
2156         return regs->syscallno;
2157 }
2158
2159 void syscall_trace_exit(struct pt_regs *regs)
2160 {
2161         unsigned long flags = read_thread_flags();
2162
2163         audit_syscall_exit(regs);
2164
2165         if (flags & _TIF_SYSCALL_TRACEPOINT)
2166                 trace_sys_exit(regs, syscall_get_return_value(current, regs));
2167
2168         if (flags & (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP))
2169                 report_syscall(regs, PTRACE_SYSCALL_EXIT);
2170
2171         rseq_syscall(regs);
2172 }
2173
2174 /*
2175  * SPSR_ELx bits which are always architecturally RES0 per ARM DDI 0487D.a.
2176  * We permit userspace to set SSBS (AArch64 bit 12, AArch32 bit 23) which is
2177  * not described in ARM DDI 0487D.a.
2178  * We treat PAN and UAO as RES0 bits, as they are meaningless at EL0, and may
2179  * be allocated an EL0 meaning in future.
2180  * Userspace cannot use these until they have an architectural meaning.
2181  * Note that this follows the SPSR_ELx format, not the AArch32 PSR format.
2182  * We also reserve IL for the kernel; SS is handled dynamically.
2183  */
2184 #define SPSR_EL1_AARCH64_RES0_BITS \
2185         (GENMASK_ULL(63, 32) | GENMASK_ULL(27, 26) | GENMASK_ULL(23, 22) | \
2186          GENMASK_ULL(20, 13) | GENMASK_ULL(5, 5))
2187 #define SPSR_EL1_AARCH32_RES0_BITS \
2188         (GENMASK_ULL(63, 32) | GENMASK_ULL(22, 22) | GENMASK_ULL(20, 20))
2189
2190 static int valid_compat_regs(struct user_pt_regs *regs)
2191 {
2192         regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
2193
2194         if (!system_supports_mixed_endian_el0()) {
2195                 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
2196                         regs->pstate |= PSR_AA32_E_BIT;
2197                 else
2198                         regs->pstate &= ~PSR_AA32_E_BIT;
2199         }
2200
2201         if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
2202             (regs->pstate & PSR_AA32_A_BIT) == 0 &&
2203             (regs->pstate & PSR_AA32_I_BIT) == 0 &&
2204             (regs->pstate & PSR_AA32_F_BIT) == 0) {
2205                 return 1;
2206         }
2207
2208         /*
2209          * Force PSR to a valid 32-bit EL0t, preserving the same bits as
2210          * arch/arm.
2211          */
2212         regs->pstate &= PSR_AA32_N_BIT | PSR_AA32_Z_BIT |
2213                         PSR_AA32_C_BIT | PSR_AA32_V_BIT |
2214                         PSR_AA32_Q_BIT | PSR_AA32_IT_MASK |
2215                         PSR_AA32_GE_MASK | PSR_AA32_E_BIT |
2216                         PSR_AA32_T_BIT;
2217         regs->pstate |= PSR_MODE32_BIT;
2218
2219         return 0;
2220 }
2221
2222 static int valid_native_regs(struct user_pt_regs *regs)
2223 {
2224         regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
2225
2226         if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
2227             (regs->pstate & PSR_D_BIT) == 0 &&
2228             (regs->pstate & PSR_A_BIT) == 0 &&
2229             (regs->pstate & PSR_I_BIT) == 0 &&
2230             (regs->pstate & PSR_F_BIT) == 0) {
2231                 return 1;
2232         }
2233
2234         /* Force PSR to a valid 64-bit EL0t */
2235         regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
2236
2237         return 0;
2238 }
2239
2240 /*
2241  * Are the current registers suitable for user mode? (used to maintain
2242  * security in signal handlers)
2243  */
2244 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
2245 {
2246         /* https://lore.kernel.org/lkml/20191118131525.GA4180@willie-the-truck */
2247         user_regs_reset_single_step(regs, task);
2248
2249         if (is_compat_thread(task_thread_info(task)))
2250                 return valid_compat_regs(regs);
2251         else
2252                 return valid_native_regs(regs);
2253 }