2 * Based on arch/arm/kernel/ptrace.c
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
7 * Copyright (C) 2012 ARM Ltd.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/audit.h>
23 #include <linux/compat.h>
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
27 #include <linux/smp.h>
28 #include <linux/ptrace.h>
29 #include <linux/user.h>
30 #include <linux/seccomp.h>
31 #include <linux/security.h>
32 #include <linux/init.h>
33 #include <linux/signal.h>
34 #include <linux/uaccess.h>
35 #include <linux/perf_event.h>
36 #include <linux/hw_breakpoint.h>
37 #include <linux/regset.h>
38 #include <linux/tracehook.h>
39 #include <linux/elf.h>
41 #include <asm/compat.h>
42 #include <asm/debug-monitors.h>
43 #include <asm/pgtable.h>
44 #include <asm/syscall.h>
45 #include <asm/traps.h>
46 #include <asm/system_misc.h>
48 #define CREATE_TRACE_POINTS
49 #include <trace/events/syscalls.h>
51 struct pt_regs_offset {
56 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
57 #define REG_OFFSET_END {.name = NULL, .offset = 0}
58 #define GPR_OFFSET_NAME(r) \
59 {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
61 static const struct pt_regs_offset regoffset_table[] = {
93 {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
96 REG_OFFSET_NAME(pstate),
101 * regs_query_register_offset() - query register offset from its name
102 * @name: the name of a register
104 * regs_query_register_offset() returns the offset of a register in struct
105 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
107 int regs_query_register_offset(const char *name)
109 const struct pt_regs_offset *roff;
111 for (roff = regoffset_table; roff->name != NULL; roff++)
112 if (!strcmp(roff->name, name))
118 * regs_within_kernel_stack() - check the address in the stack
119 * @regs: pt_regs which contains kernel stack pointer.
120 * @addr: address which is checked.
122 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
123 * If @addr is within the kernel stack, it returns true. If not, returns false.
125 static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
127 return ((addr & ~(THREAD_SIZE - 1)) ==
128 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
129 on_irq_stack(addr, raw_smp_processor_id());
133 * regs_get_kernel_stack_nth() - get Nth entry of the stack
134 * @regs: pt_regs which contains kernel stack pointer.
135 * @n: stack entry number.
137 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
138 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
141 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
143 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
146 if (regs_within_kernel_stack(regs, (unsigned long)addr))
153 * TODO: does not yet catch signals sent when the child dies.
154 * in exit.c or in signal.c.
158 * Called by kernel/ptrace.c when detaching..
160 void ptrace_disable(struct task_struct *child)
163 * This would be better off in core code, but PTRACE_DETACH has
164 * grown its fair share of arch-specific worts and changing it
165 * is likely to cause regressions on obscure architectures.
167 user_disable_single_step(child);
170 #ifdef CONFIG_HAVE_HW_BREAKPOINT
172 * Handle hitting a HW-breakpoint.
174 static void ptrace_hbptriggered(struct perf_event *bp,
175 struct perf_sample_data *data,
176 struct pt_regs *regs)
178 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
182 .si_code = TRAP_HWBKPT,
183 .si_addr = (void __user *)(bkpt->trigger),
189 if (!is_compat_task())
192 for (i = 0; i < ARM_MAX_BRP; ++i) {
193 if (current->thread.debug.hbp_break[i] == bp) {
194 info.si_errno = (i << 1) + 1;
199 for (i = 0; i < ARM_MAX_WRP; ++i) {
200 if (current->thread.debug.hbp_watch[i] == bp) {
201 info.si_errno = -((i << 1) + 1);
208 force_sig_info(SIGTRAP, &info, current);
212 * Unregister breakpoints from this task and reset the pointers in
215 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
218 struct thread_struct *t = &tsk->thread;
220 for (i = 0; i < ARM_MAX_BRP; i++) {
221 if (t->debug.hbp_break[i]) {
222 unregister_hw_breakpoint(t->debug.hbp_break[i]);
223 t->debug.hbp_break[i] = NULL;
227 for (i = 0; i < ARM_MAX_WRP; i++) {
228 if (t->debug.hbp_watch[i]) {
229 unregister_hw_breakpoint(t->debug.hbp_watch[i]);
230 t->debug.hbp_watch[i] = NULL;
235 void ptrace_hw_copy_thread(struct task_struct *tsk)
237 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
240 static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
241 struct task_struct *tsk,
244 struct perf_event *bp = ERR_PTR(-EINVAL);
247 case NT_ARM_HW_BREAK:
248 if (idx < ARM_MAX_BRP)
249 bp = tsk->thread.debug.hbp_break[idx];
251 case NT_ARM_HW_WATCH:
252 if (idx < ARM_MAX_WRP)
253 bp = tsk->thread.debug.hbp_watch[idx];
260 static int ptrace_hbp_set_event(unsigned int note_type,
261 struct task_struct *tsk,
263 struct perf_event *bp)
268 case NT_ARM_HW_BREAK:
269 if (idx < ARM_MAX_BRP) {
270 tsk->thread.debug.hbp_break[idx] = bp;
274 case NT_ARM_HW_WATCH:
275 if (idx < ARM_MAX_WRP) {
276 tsk->thread.debug.hbp_watch[idx] = bp;
285 static struct perf_event *ptrace_hbp_create(unsigned int note_type,
286 struct task_struct *tsk,
289 struct perf_event *bp;
290 struct perf_event_attr attr;
294 case NT_ARM_HW_BREAK:
295 type = HW_BREAKPOINT_X;
297 case NT_ARM_HW_WATCH:
298 type = HW_BREAKPOINT_RW;
301 return ERR_PTR(-EINVAL);
304 ptrace_breakpoint_init(&attr);
307 * Initialise fields to sane defaults
308 * (i.e. values that will pass validation).
311 attr.bp_len = HW_BREAKPOINT_LEN_4;
315 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
319 err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
326 static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
327 struct arch_hw_breakpoint_ctrl ctrl,
328 struct perf_event_attr *attr)
330 int err, len, type, disabled = !ctrl.enabled;
332 attr->disabled = disabled;
336 err = arch_bp_generic_fields(ctrl, &len, &type);
341 case NT_ARM_HW_BREAK:
342 if ((type & HW_BREAKPOINT_X) != type)
345 case NT_ARM_HW_WATCH:
346 if ((type & HW_BREAKPOINT_RW) != type)
354 attr->bp_type = type;
359 static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
365 case NT_ARM_HW_BREAK:
366 num = hw_breakpoint_slots(TYPE_INST);
368 case NT_ARM_HW_WATCH:
369 num = hw_breakpoint_slots(TYPE_DATA);
375 reg |= debug_monitors_arch();
383 static int ptrace_hbp_get_ctrl(unsigned int note_type,
384 struct task_struct *tsk,
388 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
393 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
397 static int ptrace_hbp_get_addr(unsigned int note_type,
398 struct task_struct *tsk,
402 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
407 *addr = bp ? bp->attr.bp_addr : 0;
411 static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
412 struct task_struct *tsk,
415 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
418 bp = ptrace_hbp_create(note_type, tsk, idx);
423 static int ptrace_hbp_set_ctrl(unsigned int note_type,
424 struct task_struct *tsk,
429 struct perf_event *bp;
430 struct perf_event_attr attr;
431 struct arch_hw_breakpoint_ctrl ctrl;
433 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
440 decode_ctrl_reg(uctrl, &ctrl);
441 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
445 return modify_user_hw_breakpoint(bp, &attr);
448 static int ptrace_hbp_set_addr(unsigned int note_type,
449 struct task_struct *tsk,
454 struct perf_event *bp;
455 struct perf_event_attr attr;
457 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
465 err = modify_user_hw_breakpoint(bp, &attr);
469 #define PTRACE_HBP_ADDR_SZ sizeof(u64)
470 #define PTRACE_HBP_CTRL_SZ sizeof(u32)
471 #define PTRACE_HBP_PAD_SZ sizeof(u32)
473 static int hw_break_get(struct task_struct *target,
474 const struct user_regset *regset,
475 unsigned int pos, unsigned int count,
476 void *kbuf, void __user *ubuf)
478 unsigned int note_type = regset->core_note_type;
479 int ret, idx = 0, offset, limit;
484 ret = ptrace_hbp_get_resource_info(note_type, &info);
488 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
494 offset = offsetof(struct user_hwdebug_state, pad);
495 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
496 offset + PTRACE_HBP_PAD_SZ);
500 /* (address, ctrl) registers */
501 offset = offsetof(struct user_hwdebug_state, dbg_regs);
502 limit = regset->n * regset->size;
503 while (count && offset < limit) {
504 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
507 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
508 offset, offset + PTRACE_HBP_ADDR_SZ);
511 offset += PTRACE_HBP_ADDR_SZ;
513 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
516 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
517 offset, offset + PTRACE_HBP_CTRL_SZ);
520 offset += PTRACE_HBP_CTRL_SZ;
522 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
524 offset + PTRACE_HBP_PAD_SZ);
527 offset += PTRACE_HBP_PAD_SZ;
534 static int hw_break_set(struct task_struct *target,
535 const struct user_regset *regset,
536 unsigned int pos, unsigned int count,
537 const void *kbuf, const void __user *ubuf)
539 unsigned int note_type = regset->core_note_type;
540 int ret, idx = 0, offset, limit;
544 /* Resource info and pad */
545 offset = offsetof(struct user_hwdebug_state, dbg_regs);
546 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
550 /* (address, ctrl) registers */
551 limit = regset->n * regset->size;
552 while (count && offset < limit) {
553 if (count < PTRACE_HBP_ADDR_SZ)
555 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
556 offset, offset + PTRACE_HBP_ADDR_SZ);
559 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
562 offset += PTRACE_HBP_ADDR_SZ;
566 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
567 offset, offset + PTRACE_HBP_CTRL_SZ);
570 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
573 offset += PTRACE_HBP_CTRL_SZ;
575 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
577 offset + PTRACE_HBP_PAD_SZ);
580 offset += PTRACE_HBP_PAD_SZ;
586 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
588 static int gpr_get(struct task_struct *target,
589 const struct user_regset *regset,
590 unsigned int pos, unsigned int count,
591 void *kbuf, void __user *ubuf)
593 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
594 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
597 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
598 unsigned int pos, unsigned int count,
599 const void *kbuf, const void __user *ubuf)
602 struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
604 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
608 if (!valid_user_regs(&newregs, target))
611 task_pt_regs(target)->user_regs = newregs;
616 * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
618 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
619 unsigned int pos, unsigned int count,
620 void *kbuf, void __user *ubuf)
622 struct user_fpsimd_state *uregs;
623 uregs = &target->thread.fpsimd_state.user_fpsimd;
624 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
627 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
628 unsigned int pos, unsigned int count,
629 const void *kbuf, const void __user *ubuf)
632 struct user_fpsimd_state newstate =
633 target->thread.fpsimd_state.user_fpsimd;
635 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
639 target->thread.fpsimd_state.user_fpsimd = newstate;
640 fpsimd_flush_task_state(target);
644 static int tls_get(struct task_struct *target, const struct user_regset *regset,
645 unsigned int pos, unsigned int count,
646 void *kbuf, void __user *ubuf)
648 unsigned long *tls = &target->thread.tp_value;
649 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
652 static int tls_set(struct task_struct *target, const struct user_regset *regset,
653 unsigned int pos, unsigned int count,
654 const void *kbuf, const void __user *ubuf)
657 unsigned long tls = target->thread.tp_value;
659 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
663 target->thread.tp_value = tls;
667 static int system_call_get(struct task_struct *target,
668 const struct user_regset *regset,
669 unsigned int pos, unsigned int count,
670 void *kbuf, void __user *ubuf)
672 int syscallno = task_pt_regs(target)->syscallno;
674 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
678 static int system_call_set(struct task_struct *target,
679 const struct user_regset *regset,
680 unsigned int pos, unsigned int count,
681 const void *kbuf, const void __user *ubuf)
683 int syscallno = task_pt_regs(target)->syscallno;
686 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
690 task_pt_regs(target)->syscallno = syscallno;
694 enum aarch64_regset {
698 #ifdef CONFIG_HAVE_HW_BREAKPOINT
705 static const struct user_regset aarch64_regsets[] = {
707 .core_note_type = NT_PRSTATUS,
708 .n = sizeof(struct user_pt_regs) / sizeof(u64),
710 .align = sizeof(u64),
715 .core_note_type = NT_PRFPREG,
716 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
718 * We pretend we have 32-bit registers because the fpsr and
719 * fpcr are 32-bits wide.
722 .align = sizeof(u32),
727 .core_note_type = NT_ARM_TLS,
729 .size = sizeof(void *),
730 .align = sizeof(void *),
734 #ifdef CONFIG_HAVE_HW_BREAKPOINT
735 [REGSET_HW_BREAK] = {
736 .core_note_type = NT_ARM_HW_BREAK,
737 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
739 .align = sizeof(u32),
743 [REGSET_HW_WATCH] = {
744 .core_note_type = NT_ARM_HW_WATCH,
745 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
747 .align = sizeof(u32),
752 [REGSET_SYSTEM_CALL] = {
753 .core_note_type = NT_ARM_SYSTEM_CALL,
756 .align = sizeof(int),
757 .get = system_call_get,
758 .set = system_call_set,
762 static const struct user_regset_view user_aarch64_view = {
763 .name = "aarch64", .e_machine = EM_AARCH64,
764 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
768 #include <linux/compat.h>
775 static int compat_gpr_get(struct task_struct *target,
776 const struct user_regset *regset,
777 unsigned int pos, unsigned int count,
778 void *kbuf, void __user *ubuf)
781 unsigned int i, start, num_regs;
783 /* Calculate the number of AArch32 registers contained in count */
784 num_regs = count / regset->size;
786 /* Convert pos into an register number */
787 start = pos / regset->size;
789 if (start + num_regs > regset->n)
792 for (i = 0; i < num_regs; ++i) {
793 unsigned int idx = start + i;
798 reg = task_pt_regs(target)->pc;
801 reg = task_pt_regs(target)->pstate;
804 reg = task_pt_regs(target)->orig_x0;
807 reg = task_pt_regs(target)->regs[idx];
811 memcpy(kbuf, ®, sizeof(reg));
814 ret = copy_to_user(ubuf, ®, sizeof(reg));
827 static int compat_gpr_set(struct task_struct *target,
828 const struct user_regset *regset,
829 unsigned int pos, unsigned int count,
830 const void *kbuf, const void __user *ubuf)
832 struct pt_regs newregs;
834 unsigned int i, start, num_regs;
836 /* Calculate the number of AArch32 registers contained in count */
837 num_regs = count / regset->size;
839 /* Convert pos into an register number */
840 start = pos / regset->size;
842 if (start + num_regs > regset->n)
845 newregs = *task_pt_regs(target);
847 for (i = 0; i < num_regs; ++i) {
848 unsigned int idx = start + i;
852 memcpy(®, kbuf, sizeof(reg));
855 ret = copy_from_user(®, ubuf, sizeof(reg));
869 newregs.pstate = reg;
872 newregs.orig_x0 = reg;
875 newregs.regs[idx] = reg;
880 if (valid_user_regs(&newregs.user_regs, target))
881 *task_pt_regs(target) = newregs;
888 static int compat_vfp_get(struct task_struct *target,
889 const struct user_regset *regset,
890 unsigned int pos, unsigned int count,
891 void *kbuf, void __user *ubuf)
893 struct user_fpsimd_state *uregs;
894 compat_ulong_t fpscr;
897 uregs = &target->thread.fpsimd_state.user_fpsimd;
900 * The VFP registers are packed into the fpsimd_state, so they all sit
901 * nicely together for us. We just need to create the fpscr separately.
903 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
904 VFP_STATE_SIZE - sizeof(compat_ulong_t));
907 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
908 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
909 ret = put_user(fpscr, (compat_ulong_t *)ubuf);
915 static int compat_vfp_set(struct task_struct *target,
916 const struct user_regset *regset,
917 unsigned int pos, unsigned int count,
918 const void *kbuf, const void __user *ubuf)
920 struct user_fpsimd_state *uregs;
921 compat_ulong_t fpscr;
924 if (pos + count > VFP_STATE_SIZE)
927 uregs = &target->thread.fpsimd_state.user_fpsimd;
929 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
930 VFP_STATE_SIZE - sizeof(compat_ulong_t));
933 ret = get_user(fpscr, (compat_ulong_t *)ubuf);
934 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
935 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
938 fpsimd_flush_task_state(target);
942 static int compat_tls_get(struct task_struct *target,
943 const struct user_regset *regset, unsigned int pos,
944 unsigned int count, void *kbuf, void __user *ubuf)
946 compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value;
947 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
950 static int compat_tls_set(struct task_struct *target,
951 const struct user_regset *regset, unsigned int pos,
952 unsigned int count, const void *kbuf,
953 const void __user *ubuf)
956 compat_ulong_t tls = target->thread.tp_value;
958 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
962 target->thread.tp_value = tls;
966 static const struct user_regset aarch32_regsets[] = {
967 [REGSET_COMPAT_GPR] = {
968 .core_note_type = NT_PRSTATUS,
969 .n = COMPAT_ELF_NGREG,
970 .size = sizeof(compat_elf_greg_t),
971 .align = sizeof(compat_elf_greg_t),
972 .get = compat_gpr_get,
973 .set = compat_gpr_set
975 [REGSET_COMPAT_VFP] = {
976 .core_note_type = NT_ARM_VFP,
977 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
978 .size = sizeof(compat_ulong_t),
979 .align = sizeof(compat_ulong_t),
980 .get = compat_vfp_get,
981 .set = compat_vfp_set
985 static const struct user_regset_view user_aarch32_view = {
986 .name = "aarch32", .e_machine = EM_ARM,
987 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
990 static const struct user_regset aarch32_ptrace_regsets[] = {
992 .core_note_type = NT_PRSTATUS,
993 .n = COMPAT_ELF_NGREG,
994 .size = sizeof(compat_elf_greg_t),
995 .align = sizeof(compat_elf_greg_t),
996 .get = compat_gpr_get,
997 .set = compat_gpr_set
1000 .core_note_type = NT_ARM_VFP,
1001 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
1002 .size = sizeof(compat_ulong_t),
1003 .align = sizeof(compat_ulong_t),
1004 .get = compat_vfp_get,
1005 .set = compat_vfp_set
1008 .core_note_type = NT_ARM_TLS,
1010 .size = sizeof(compat_ulong_t),
1011 .align = sizeof(compat_ulong_t),
1012 .get = compat_tls_get,
1013 .set = compat_tls_set,
1015 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1016 [REGSET_HW_BREAK] = {
1017 .core_note_type = NT_ARM_HW_BREAK,
1018 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1019 .size = sizeof(u32),
1020 .align = sizeof(u32),
1021 .get = hw_break_get,
1022 .set = hw_break_set,
1024 [REGSET_HW_WATCH] = {
1025 .core_note_type = NT_ARM_HW_WATCH,
1026 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1027 .size = sizeof(u32),
1028 .align = sizeof(u32),
1029 .get = hw_break_get,
1030 .set = hw_break_set,
1033 [REGSET_SYSTEM_CALL] = {
1034 .core_note_type = NT_ARM_SYSTEM_CALL,
1036 .size = sizeof(int),
1037 .align = sizeof(int),
1038 .get = system_call_get,
1039 .set = system_call_set,
1043 static const struct user_regset_view user_aarch32_ptrace_view = {
1044 .name = "aarch32", .e_machine = EM_ARM,
1045 .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
1048 static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
1049 compat_ulong_t __user *ret)
1056 if (off == COMPAT_PT_TEXT_ADDR)
1057 tmp = tsk->mm->start_code;
1058 else if (off == COMPAT_PT_DATA_ADDR)
1059 tmp = tsk->mm->start_data;
1060 else if (off == COMPAT_PT_TEXT_END_ADDR)
1061 tmp = tsk->mm->end_code;
1062 else if (off < sizeof(compat_elf_gregset_t))
1063 return copy_regset_to_user(tsk, &user_aarch32_view,
1064 REGSET_COMPAT_GPR, off,
1065 sizeof(compat_ulong_t), ret);
1066 else if (off >= COMPAT_USER_SZ)
1071 return put_user(tmp, ret);
1074 static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
1078 mm_segment_t old_fs = get_fs();
1080 if (off & 3 || off >= COMPAT_USER_SZ)
1083 if (off >= sizeof(compat_elf_gregset_t))
1087 ret = copy_regset_from_user(tsk, &user_aarch32_view,
1088 REGSET_COMPAT_GPR, off,
1089 sizeof(compat_ulong_t),
1096 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1099 * Convert a virtual register number into an index for a thread_info
1100 * breakpoint array. Breakpoints are identified using positive numbers
1101 * whilst watchpoints are negative. The registers are laid out as pairs
1102 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
1103 * Register 0 is reserved for describing resource information.
1105 static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
1107 return (abs(num) - 1) >> 1;
1110 static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
1112 u8 num_brps, num_wrps, debug_arch, wp_len;
1115 num_brps = hw_breakpoint_slots(TYPE_INST);
1116 num_wrps = hw_breakpoint_slots(TYPE_DATA);
1118 debug_arch = debug_monitors_arch();
1132 static int compat_ptrace_hbp_get(unsigned int note_type,
1133 struct task_struct *tsk,
1140 int err, idx = compat_ptrace_hbp_num_to_idx(num);;
1143 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
1146 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
1153 static int compat_ptrace_hbp_set(unsigned int note_type,
1154 struct task_struct *tsk,
1161 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1165 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
1168 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
1174 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
1175 compat_ulong_t __user *data)
1179 mm_segment_t old_fs = get_fs();
1184 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
1186 } else if (num == 0) {
1187 ret = compat_ptrace_hbp_get_resource_info(&kdata);
1190 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
1195 ret = put_user(kdata, data);
1200 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
1201 compat_ulong_t __user *data)
1205 mm_segment_t old_fs = get_fs();
1210 ret = get_user(kdata, data);
1216 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
1218 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
1223 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1225 long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1226 compat_ulong_t caddr, compat_ulong_t cdata)
1228 unsigned long addr = caddr;
1229 unsigned long data = cdata;
1230 void __user *datap = compat_ptr(data);
1234 case PTRACE_PEEKUSR:
1235 ret = compat_ptrace_read_user(child, addr, datap);
1238 case PTRACE_POKEUSR:
1239 ret = compat_ptrace_write_user(child, addr, data);
1242 case COMPAT_PTRACE_GETREGS:
1243 ret = copy_regset_to_user(child,
1246 0, sizeof(compat_elf_gregset_t),
1250 case COMPAT_PTRACE_SETREGS:
1251 ret = copy_regset_from_user(child,
1254 0, sizeof(compat_elf_gregset_t),
1258 case COMPAT_PTRACE_GET_THREAD_AREA:
1259 ret = put_user((compat_ulong_t)child->thread.tp_value,
1260 (compat_ulong_t __user *)datap);
1263 case COMPAT_PTRACE_SET_SYSCALL:
1264 task_pt_regs(child)->syscallno = data;
1268 case COMPAT_PTRACE_GETVFPREGS:
1269 ret = copy_regset_to_user(child,
1276 case COMPAT_PTRACE_SETVFPREGS:
1277 ret = copy_regset_from_user(child,
1284 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1285 case COMPAT_PTRACE_GETHBPREGS:
1286 ret = compat_ptrace_gethbpregs(child, addr, datap);
1289 case COMPAT_PTRACE_SETHBPREGS:
1290 ret = compat_ptrace_sethbpregs(child, addr, datap);
1295 ret = compat_ptrace_request(child, request, addr,
1302 #endif /* CONFIG_COMPAT */
1304 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1306 #ifdef CONFIG_COMPAT
1308 * Core dumping of 32-bit tasks or compat ptrace requests must use the
1309 * user_aarch32_view compatible with arm32. Native ptrace requests on
1310 * 32-bit children use an extended user_aarch32_ptrace_view to allow
1311 * access to the TLS register.
1313 if (is_compat_task())
1314 return &user_aarch32_view;
1315 else if (is_compat_thread(task_thread_info(task)))
1316 return &user_aarch32_ptrace_view;
1318 return &user_aarch64_view;
1321 long arch_ptrace(struct task_struct *child, long request,
1322 unsigned long addr, unsigned long data)
1324 return ptrace_request(child, request, addr, data);
1327 enum ptrace_syscall_dir {
1328 PTRACE_SYSCALL_ENTER = 0,
1329 PTRACE_SYSCALL_EXIT,
1332 static void tracehook_report_syscall(struct pt_regs *regs,
1333 enum ptrace_syscall_dir dir)
1336 unsigned long saved_reg;
1339 * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
1340 * used to denote syscall entry/exit:
1342 regno = (is_compat_task() ? 12 : 7);
1343 saved_reg = regs->regs[regno];
1344 regs->regs[regno] = dir;
1346 if (dir == PTRACE_SYSCALL_EXIT)
1347 tracehook_report_syscall_exit(regs, 0);
1348 else if (tracehook_report_syscall_entry(regs))
1349 regs->syscallno = ~0UL;
1351 regs->regs[regno] = saved_reg;
1354 asmlinkage int syscall_trace_enter(struct pt_regs *regs)
1356 if (test_thread_flag(TIF_SYSCALL_TRACE))
1357 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
1359 /* Do the secure computing after ptrace; failures should be fast. */
1360 if (secure_computing(NULL) == -1)
1363 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1364 trace_sys_enter(regs, regs->syscallno);
1366 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
1367 regs->regs[2], regs->regs[3]);
1369 return regs->syscallno;
1372 asmlinkage void syscall_trace_exit(struct pt_regs *regs)
1374 audit_syscall_exit(regs);
1376 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1377 trace_sys_exit(regs, regs_return_value(regs));
1379 if (test_thread_flag(TIF_SYSCALL_TRACE))
1380 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
1384 * Bits which are always architecturally RES0 per ARM DDI 0487A.h
1385 * Userspace cannot use these until they have an architectural meaning.
1386 * We also reserve IL for the kernel; SS is handled dynamically.
1388 #define SPSR_EL1_AARCH64_RES0_BITS \
1389 (GENMASK_ULL(63,32) | GENMASK_ULL(27, 22) | GENMASK_ULL(20, 10) | \
1391 #define SPSR_EL1_AARCH32_RES0_BITS \
1392 (GENMASK_ULL(63,32) | GENMASK_ULL(24, 22) | GENMASK_ULL(20,20))
1394 static int valid_compat_regs(struct user_pt_regs *regs)
1396 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
1398 if (!system_supports_mixed_endian_el0()) {
1399 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1400 regs->pstate |= COMPAT_PSR_E_BIT;
1402 regs->pstate &= ~COMPAT_PSR_E_BIT;
1405 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
1406 (regs->pstate & COMPAT_PSR_A_BIT) == 0 &&
1407 (regs->pstate & COMPAT_PSR_I_BIT) == 0 &&
1408 (regs->pstate & COMPAT_PSR_F_BIT) == 0) {
1413 * Force PSR to a valid 32-bit EL0t, preserving the same bits as
1416 regs->pstate &= COMPAT_PSR_N_BIT | COMPAT_PSR_Z_BIT |
1417 COMPAT_PSR_C_BIT | COMPAT_PSR_V_BIT |
1418 COMPAT_PSR_Q_BIT | COMPAT_PSR_IT_MASK |
1419 COMPAT_PSR_GE_MASK | COMPAT_PSR_E_BIT |
1421 regs->pstate |= PSR_MODE32_BIT;
1426 static int valid_native_regs(struct user_pt_regs *regs)
1428 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
1430 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
1431 (regs->pstate & PSR_D_BIT) == 0 &&
1432 (regs->pstate & PSR_A_BIT) == 0 &&
1433 (regs->pstate & PSR_I_BIT) == 0 &&
1434 (regs->pstate & PSR_F_BIT) == 0) {
1438 /* Force PSR to a valid 64-bit EL0t */
1439 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
1445 * Are the current registers suitable for user mode? (used to maintain
1446 * security in signal handlers)
1448 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
1450 /* https://lore.kernel.org/lkml/20191118131525.GA4180@willie-the-truck */
1451 user_regs_reset_single_step(regs, task);
1453 if (is_compat_thread(task_thread_info(task)))
1454 return valid_compat_regs(regs);
1456 return valid_native_regs(regs);