2 * alternative runtime patching
3 * inspired by the x86 version
5 * Copyright (C) 2014 ARM Ltd.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #define pr_fmt(fmt) "alternatives: " fmt
22 #include <linux/init.h>
23 #include <linux/cpu.h>
24 #include <asm/cacheflush.h>
25 #include <asm/alternative.h>
26 #include <asm/cpufeature.h>
28 #include <asm/sections.h>
29 #include <linux/stop_machine.h>
31 #define __ALT_PTR(a,f) ((void *)&(a)->f + (a)->f)
32 #define ALT_ORIG_PTR(a) __ALT_PTR(a, orig_offset)
33 #define ALT_REPL_PTR(a) __ALT_PTR(a, alt_offset)
35 int alternatives_applied;
38 struct alt_instr *begin;
39 struct alt_instr *end;
43 * Check if the target PC is within an alternative block.
45 static bool branch_insn_requires_update(struct alt_instr *alt, unsigned long pc)
47 unsigned long replptr = (unsigned long)ALT_REPL_PTR(alt);
48 return !(pc >= replptr && pc <= (replptr + alt->alt_len));
51 #define align_down(x, a) ((unsigned long)(x) & ~(((unsigned long)(a)) - 1))
53 static u32 get_alt_insn(struct alt_instr *alt, __le32 *insnptr, __le32 *altinsnptr)
57 insn = le32_to_cpu(*altinsnptr);
59 if (aarch64_insn_is_branch_imm(insn)) {
60 s32 offset = aarch64_get_branch_offset(insn);
63 target = (unsigned long)altinsnptr + offset;
66 * If we're branching inside the alternate sequence,
67 * do not rewrite the instruction, as it is already
68 * correct. Otherwise, generate the new instruction.
70 if (branch_insn_requires_update(alt, target)) {
71 offset = target - (unsigned long)insnptr;
72 insn = aarch64_set_branch_offset(insn, offset);
74 } else if (aarch64_insn_is_adrp(insn)) {
75 s32 orig_offset, new_offset;
79 * If we're replacing an adrp instruction, which uses PC-relative
80 * immediate addressing, adjust the offset to reflect the new
81 * PC. adrp operates on 4K aligned addresses.
83 orig_offset = aarch64_insn_adrp_get_offset(insn);
84 target = align_down(altinsnptr, SZ_4K) + orig_offset;
85 new_offset = target - align_down(insnptr, SZ_4K);
86 insn = aarch64_insn_adrp_set_offset(insn, new_offset);
87 } else if (aarch64_insn_uses_literal(insn)) {
89 * Disallow patching unhandled instructions using PC relative
98 static void patch_alternative(struct alt_instr *alt,
99 __le32 *origptr, __le32 *updptr, int nr_inst)
104 replptr = ALT_REPL_PTR(alt);
105 for (i = 0; i < nr_inst; i++) {
108 insn = get_alt_insn(alt, origptr + i, replptr + i);
109 updptr[i] = cpu_to_le32(insn);
113 static void __apply_alternatives(void *alt_region, bool use_linear_alias)
115 struct alt_instr *alt;
116 struct alt_region *region = alt_region;
117 __le32 *origptr, *updptr;
118 alternative_cb_t alt_cb;
120 for (alt = region->begin; alt < region->end; alt++) {
123 /* Use ARM64_CB_PATCH as an unconditional patch */
124 if (alt->cpufeature < ARM64_CB_PATCH &&
125 !cpus_have_cap(alt->cpufeature))
128 if (alt->cpufeature == ARM64_CB_PATCH)
129 BUG_ON(alt->alt_len != 0);
131 BUG_ON(alt->alt_len != alt->orig_len);
133 pr_info_once("patching kernel code\n");
135 origptr = ALT_ORIG_PTR(alt);
136 updptr = use_linear_alias ? lm_alias(origptr) : origptr;
137 nr_inst = alt->orig_len / AARCH64_INSN_SIZE;
139 if (alt->cpufeature < ARM64_CB_PATCH)
140 alt_cb = patch_alternative;
142 alt_cb = ALT_REPL_PTR(alt);
144 alt_cb(alt, origptr, updptr, nr_inst);
146 flush_icache_range((uintptr_t)origptr,
147 (uintptr_t)(origptr + nr_inst));
152 * We might be patching the stop_machine state machine, so implement a
153 * really simple polling protocol here.
155 static int __apply_alternatives_multi_stop(void *unused)
157 struct alt_region region = {
158 .begin = (struct alt_instr *)__alt_instructions,
159 .end = (struct alt_instr *)__alt_instructions_end,
162 /* We always have a CPU 0 at this point (__init) */
163 if (smp_processor_id()) {
164 while (!READ_ONCE(alternatives_applied))
168 BUG_ON(alternatives_applied);
169 __apply_alternatives(®ion, true);
170 /* Barriers provided by the cache flushing */
171 WRITE_ONCE(alternatives_applied, 1);
177 void __init apply_alternatives_all(void)
179 /* better not try code patching on a live SMP system */
180 stop_machine(__apply_alternatives_multi_stop, NULL, cpu_online_mask);
183 void apply_alternatives(void *start, size_t length)
185 struct alt_region region = {
187 .end = start + length,
190 __apply_alternatives(®ion, false);