1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Based on arch/arm/include/asm/processor.h
5 * Copyright (C) 1995-1999 Russell King
6 * Copyright (C) 2012 ARM Ltd.
8 #ifndef __ASM_PROCESSOR_H
9 #define __ASM_PROCESSOR_H
12 * On arm64 systems, unaligned accesses by the CPU are cheap, and so there is
13 * no point in shifting all network buffers by 2 bytes just to make some IP
14 * header fields appear aligned in memory, potentially sacrificing some DMA
15 * performance on some platforms.
17 #define NET_IP_ALIGN 0
19 #define MTE_CTRL_GCR_USER_EXCL_SHIFT 0
20 #define MTE_CTRL_GCR_USER_EXCL_MASK 0xffff
22 #define MTE_CTRL_TCF_SYNC (1UL << 16)
23 #define MTE_CTRL_TCF_ASYNC (1UL << 17)
24 #define MTE_CTRL_TCF_ASYMM (1UL << 18)
28 #include <linux/build_bug.h>
29 #include <linux/cache.h>
30 #include <linux/init.h>
31 #include <linux/stddef.h>
32 #include <linux/string.h>
33 #include <linux/thread_info.h>
35 #include <vdso/processor.h>
37 #include <asm/alternative.h>
38 #include <asm/cpufeature.h>
39 #include <asm/hw_breakpoint.h>
40 #include <asm/kasan.h>
42 #include <asm/pgtable-hwdef.h>
43 #include <asm/pointer_auth.h>
44 #include <asm/ptrace.h>
45 #include <asm/spectre.h>
46 #include <asm/types.h>
49 * TASK_SIZE - the maximum size of a user space task.
50 * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area.
53 #define DEFAULT_MAP_WINDOW_64 (UL(1) << VA_BITS_MIN)
54 #define TASK_SIZE_64 (UL(1) << vabits_actual)
55 #define TASK_SIZE_MAX (UL(1) << VA_BITS)
58 #if defined(CONFIG_ARM64_64K_PAGES) && defined(CONFIG_KUSER_HELPERS)
60 * With CONFIG_ARM64_64K_PAGES enabled, the last page is occupied
61 * by the compat vectors page.
63 #define TASK_SIZE_32 UL(0x100000000)
65 #define TASK_SIZE_32 (UL(0x100000000) - PAGE_SIZE)
66 #endif /* CONFIG_ARM64_64K_PAGES */
67 #define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \
68 TASK_SIZE_32 : TASK_SIZE_64)
69 #define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk, TIF_32BIT) ? \
70 TASK_SIZE_32 : TASK_SIZE_64)
71 #define DEFAULT_MAP_WINDOW (test_thread_flag(TIF_32BIT) ? \
72 TASK_SIZE_32 : DEFAULT_MAP_WINDOW_64)
74 #define TASK_SIZE TASK_SIZE_64
75 #define DEFAULT_MAP_WINDOW DEFAULT_MAP_WINDOW_64
76 #endif /* CONFIG_COMPAT */
78 #ifdef CONFIG_ARM64_FORCE_52BIT
79 #define STACK_TOP_MAX TASK_SIZE_64
80 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 4))
82 #define STACK_TOP_MAX DEFAULT_MAP_WINDOW_64
83 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(DEFAULT_MAP_WINDOW / 4))
84 #endif /* CONFIG_ARM64_FORCE_52BIT */
87 #define AARCH32_VECTORS_BASE 0xffff0000
88 #define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
89 AARCH32_VECTORS_BASE : STACK_TOP_MAX)
91 #define STACK_TOP STACK_TOP_MAX
92 #endif /* CONFIG_COMPAT */
94 #ifndef CONFIG_ARM64_FORCE_52BIT
95 #define arch_get_mmap_end(addr, len, flags) \
96 (((addr) > DEFAULT_MAP_WINDOW) ? TASK_SIZE : DEFAULT_MAP_WINDOW)
98 #define arch_get_mmap_base(addr, base) ((addr > DEFAULT_MAP_WINDOW) ? \
99 base + TASK_SIZE - DEFAULT_MAP_WINDOW :\
101 #endif /* CONFIG_ARM64_FORCE_52BIT */
103 extern phys_addr_t arm64_dma_phys_limit;
104 #define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
107 #ifdef CONFIG_HAVE_HW_BREAKPOINT
108 /* Have we suspended stepping by a debugger? */
110 /* Allow breakpoints and watchpoints to be disabled for this thread. */
113 /* Hardware breakpoints pinned to this task. */
114 struct perf_event *hbp_break[ARM_MAX_BRP];
115 struct perf_event *hbp_watch[ARM_MAX_WRP];
141 struct thread_struct {
142 struct cpu_context cpu_context; /* cpu context */
145 * Whitelisted fields for hardened usercopy:
146 * Maintainers must ensure manually that this contains no
150 unsigned long tp_value; /* TLS register */
151 unsigned long tp2_value;
152 struct user_fpsimd_state fpsimd_state;
155 unsigned int fpsimd_cpu;
156 void *sve_state; /* SVE registers, if any */
157 void *za_state; /* ZA register, if any */
158 unsigned int vl[ARM64_VEC_MAX]; /* vector length */
159 unsigned int vl_onexec[ARM64_VEC_MAX]; /* vl after next exec */
160 unsigned long fault_address; /* fault info */
161 unsigned long fault_code; /* ESR_EL1 value */
162 struct debug_info debug; /* debugging */
163 #ifdef CONFIG_ARM64_PTR_AUTH
164 struct ptrauth_keys_user keys_user;
165 #ifdef CONFIG_ARM64_PTR_AUTH_KERNEL
166 struct ptrauth_keys_kernel keys_kernel;
169 #ifdef CONFIG_ARM64_MTE
177 static inline unsigned int thread_get_vl(struct thread_struct *thread,
180 return thread->vl[type];
183 static inline unsigned int thread_get_sve_vl(struct thread_struct *thread)
185 return thread_get_vl(thread, ARM64_VEC_SVE);
188 static inline unsigned int thread_get_sme_vl(struct thread_struct *thread)
190 return thread_get_vl(thread, ARM64_VEC_SME);
193 static inline unsigned int thread_get_cur_vl(struct thread_struct *thread)
195 if (system_supports_sme() && (thread->svcr & SVCR_SM_MASK))
196 return thread_get_sme_vl(thread);
198 return thread_get_sve_vl(thread);
201 unsigned int task_get_vl(const struct task_struct *task, enum vec_type type);
202 void task_set_vl(struct task_struct *task, enum vec_type type,
204 void task_set_vl_onexec(struct task_struct *task, enum vec_type type,
206 unsigned int task_get_vl_onexec(const struct task_struct *task,
209 static inline unsigned int task_get_sve_vl(const struct task_struct *task)
211 return task_get_vl(task, ARM64_VEC_SVE);
214 static inline unsigned int task_get_sme_vl(const struct task_struct *task)
216 return task_get_vl(task, ARM64_VEC_SME);
219 static inline void task_set_sve_vl(struct task_struct *task, unsigned long vl)
221 task_set_vl(task, ARM64_VEC_SVE, vl);
224 static inline unsigned int task_get_sve_vl_onexec(const struct task_struct *task)
226 return task_get_vl_onexec(task, ARM64_VEC_SVE);
229 static inline void task_set_sve_vl_onexec(struct task_struct *task,
232 task_set_vl_onexec(task, ARM64_VEC_SVE, vl);
235 #define SCTLR_USER_MASK \
236 (SCTLR_ELx_ENIA | SCTLR_ELx_ENIB | SCTLR_ELx_ENDA | SCTLR_ELx_ENDB | \
239 static inline void arch_thread_struct_whitelist(unsigned long *offset,
242 /* Verify that there is no padding among the whitelisted fields: */
243 BUILD_BUG_ON(sizeof_field(struct thread_struct, uw) !=
244 sizeof_field(struct thread_struct, uw.tp_value) +
245 sizeof_field(struct thread_struct, uw.tp2_value) +
246 sizeof_field(struct thread_struct, uw.fpsimd_state));
248 *offset = offsetof(struct thread_struct, uw);
249 *size = sizeof_field(struct thread_struct, uw);
253 #define task_user_tls(t) \
255 unsigned long *__tls; \
256 if (is_compat_thread(task_thread_info(t))) \
257 __tls = &(t)->thread.uw.tp2_value; \
259 __tls = &(t)->thread.uw.tp_value; \
263 #define task_user_tls(t) (&(t)->thread.uw.tp_value)
266 /* Sync TPIDR_EL0 back to thread_struct for current */
267 void tls_preserve_current_state(void);
269 #define INIT_THREAD { \
270 .fpsimd_cpu = NR_CPUS, \
273 static inline void start_thread_common(struct pt_regs *regs, unsigned long pc)
275 memset(regs, 0, sizeof(*regs));
276 forget_syscall(regs);
279 if (system_uses_irq_prio_masking())
280 regs->pmr_save = GIC_PRIO_IRQON;
283 static inline void start_thread(struct pt_regs *regs, unsigned long pc,
286 start_thread_common(regs, pc);
287 regs->pstate = PSR_MODE_EL0t;
288 spectre_v4_enable_task_mitigation(current);
293 static inline void compat_start_thread(struct pt_regs *regs, unsigned long pc,
296 start_thread_common(regs, pc);
297 regs->pstate = PSR_AA32_MODE_USR;
299 regs->pstate |= PSR_AA32_T_BIT;
302 regs->pstate |= PSR_AA32_E_BIT;
305 spectre_v4_enable_task_mitigation(current);
306 regs->compat_sp = sp;
310 static inline bool is_ttbr0_addr(unsigned long addr)
312 /* entry assembly clears tags for TTBR0 addrs */
313 return addr < TASK_SIZE;
316 static inline bool is_ttbr1_addr(unsigned long addr)
318 /* TTBR1 addresses may have a tag if KASAN_SW_TAGS is in use */
319 return arch_kasan_reset_tag(addr) >= PAGE_OFFSET;
322 /* Forward declaration, a strange C thing */
325 /* Free all resources held by a thread. */
326 extern void release_thread(struct task_struct *);
328 unsigned long __get_wchan(struct task_struct *p);
330 void update_sctlr_el1(u64 sctlr);
332 /* Thread switching */
333 extern struct task_struct *cpu_switch_to(struct task_struct *prev,
334 struct task_struct *next);
336 #define task_pt_regs(p) \
337 ((struct pt_regs *)(THREAD_SIZE + task_stack_page(p)) - 1)
339 #define KSTK_EIP(tsk) ((unsigned long)task_pt_regs(tsk)->pc)
340 #define KSTK_ESP(tsk) user_stack_pointer(task_pt_regs(tsk))
343 * Prefetching support
345 #define ARCH_HAS_PREFETCH
346 static inline void prefetch(const void *ptr)
348 asm volatile("prfm pldl1keep, %a0\n" : : "p" (ptr));
351 #define ARCH_HAS_PREFETCHW
352 static inline void prefetchw(const void *ptr)
354 asm volatile("prfm pstl1keep, %a0\n" : : "p" (ptr));
357 #define ARCH_HAS_SPINLOCK_PREFETCH
358 static inline void spin_lock_prefetch(const void *ptr)
360 asm volatile(ARM64_LSE_ATOMIC_INSN(
361 "prfm pstl1strm, %a0",
362 "nop") : : "p" (ptr));
365 extern unsigned long __ro_after_init signal_minsigstksz; /* sigframe size */
366 extern void __init minsigstksz_setup(void);
369 * Not at the top of the file due to a direct #include cycle between
370 * <asm/fpsimd.h> and <asm/processor.h>. Deferring this #include
371 * ensures that contents of processor.h are visible to fpsimd.h even if
372 * processor.h is included first.
374 * These prctl helpers are the only things in this file that require
375 * fpsimd.h. The core code expects them to be in this header.
377 #include <asm/fpsimd.h>
379 /* Userspace interface for PR_S[MV]E_{SET,GET}_VL prctl()s: */
380 #define SVE_SET_VL(arg) sve_set_current_vl(arg)
381 #define SVE_GET_VL() sve_get_current_vl()
382 #define SME_SET_VL(arg) sme_set_current_vl(arg)
383 #define SME_GET_VL() sme_get_current_vl()
385 /* PR_PAC_RESET_KEYS prctl */
386 #define PAC_RESET_KEYS(tsk, arg) ptrauth_prctl_reset_keys(tsk, arg)
388 /* PR_PAC_{SET,GET}_ENABLED_KEYS prctl */
389 #define PAC_SET_ENABLED_KEYS(tsk, keys, enabled) \
390 ptrauth_set_enabled_keys(tsk, keys, enabled)
391 #define PAC_GET_ENABLED_KEYS(tsk) ptrauth_get_enabled_keys(tsk)
393 #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI
394 /* PR_{SET,GET}_TAGGED_ADDR_CTRL prctl */
395 long set_tagged_addr_ctrl(struct task_struct *task, unsigned long arg);
396 long get_tagged_addr_ctrl(struct task_struct *task);
397 #define SET_TAGGED_ADDR_CTRL(arg) set_tagged_addr_ctrl(current, arg)
398 #define GET_TAGGED_ADDR_CTRL() get_tagged_addr_ctrl(current)
402 * For CONFIG_GCC_PLUGIN_STACKLEAK
404 * These need to be macros because otherwise we get stuck in a nightmare
405 * of header definitions for the use of task_stack_page.
409 * The top of the current task's task stack
411 #define current_top_of_stack() ((unsigned long)current->stack + THREAD_SIZE)
412 #define on_thread_stack() (on_task_stack(current, current_stack_pointer, 1, NULL))
414 #endif /* __ASSEMBLY__ */
415 #endif /* __ASM_PROCESSOR_H */