2 * Copyright (C) 2012 ARM Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 #ifndef __ASM_DEBUG_MONITORS_H
17 #define __ASM_DEBUG_MONITORS_H
21 #include <linux/errno.h>
22 #include <linux/types.h>
23 #include <asm/brk-imm.h>
26 #include <asm/ptrace.h>
28 /* Low-level stepping controls. */
29 #define DBG_MDSCR_SS (1 << 0)
30 #define DBG_SPSR_SS (1 << 21)
32 /* MDSCR_EL1 enabling bits */
33 #define DBG_MDSCR_KDE (1 << 13)
34 #define DBG_MDSCR_MDE (1 << 15)
35 #define DBG_MDSCR_MASK ~(DBG_MDSCR_KDE | DBG_MDSCR_MDE)
37 #define DBG_ESR_EVT(x) (((x) >> 27) & 0x7)
40 #define DBG_ESR_EVT_HWBP 0x0
41 #define DBG_ESR_EVT_HWSS 0x1
42 #define DBG_ESR_EVT_HWWP 0x2
43 #define DBG_ESR_EVT_BRK 0x6
46 * Break point instruction encoding
48 #define BREAK_INSTR_SIZE AARCH64_INSN_SIZE
51 * BRK instruction encoding
52 * The #imm16 value should be placed at bits[20:5] within BRK ins
54 #define AARCH64_BREAK_MON 0xd4200000
57 * BRK instruction for provoking a fault on purpose
58 * Unlike kgdb, #imm16 value with unallocated handler is used for faulting.
60 #define AARCH64_BREAK_FAULT (AARCH64_BREAK_MON | (FAULT_BRK_IMM << 5))
62 #define AARCH64_BREAK_KGDB_DYN_DBG \
63 (AARCH64_BREAK_MON | (KGDB_DYN_DBG_BRK_IMM << 5))
65 #define CACHE_FLUSH_IS_SAFE 1
67 /* kprobes BRK opcodes with ESR encoding */
68 #define BRK64_ESR_MASK 0xFFFF
69 #define BRK64_ESR_KPROBES 0x0004
70 #define BRK64_OPCODE_KPROBES (AARCH64_BREAK_MON | (BRK64_ESR_KPROBES << 5))
73 #define DBG_ESR_EVT_BKPT 0x4
74 #define DBG_ESR_EVT_VECC 0x5
76 #define AARCH32_BREAK_ARM 0x07f001f0
77 #define AARCH32_BREAK_THUMB 0xde01
78 #define AARCH32_BREAK_THUMB2_LO 0xf7f0
79 #define AARCH32_BREAK_THUMB2_HI 0xa000
84 #define DBG_ARCH_ID_RESERVED 0 /* In case of ptrace ABI updates. */
86 #define DBG_HOOK_HANDLED 0
87 #define DBG_HOOK_ERROR 1
90 struct list_head node;
91 int (*fn)(struct pt_regs *regs, unsigned int esr);
94 void register_step_hook(struct step_hook *hook);
95 void unregister_step_hook(struct step_hook *hook);
98 struct list_head node;
101 int (*fn)(struct pt_regs *regs, unsigned int esr);
104 void register_break_hook(struct break_hook *hook);
105 void unregister_break_hook(struct break_hook *hook);
107 u8 debug_monitors_arch(void);
114 void enable_debug_monitors(enum dbg_active_el el);
115 void disable_debug_monitors(enum dbg_active_el el);
117 void user_rewind_single_step(struct task_struct *task);
118 void user_fastforward_single_step(struct task_struct *task);
119 void user_regs_reset_single_step(struct user_pt_regs *regs,
120 struct task_struct *task);
122 void kernel_enable_single_step(struct pt_regs *regs);
123 void kernel_disable_single_step(void);
124 int kernel_active_single_step(void);
126 #ifdef CONFIG_HAVE_HW_BREAKPOINT
127 int reinstall_suspended_bps(struct pt_regs *regs);
129 static inline int reinstall_suspended_bps(struct pt_regs *regs)
135 int aarch32_break_handler(struct pt_regs *regs);
137 #endif /* __ASSEMBLY */
138 #endif /* __KERNEL__ */
139 #endif /* __ASM_DEBUG_MONITORS_H */