arch/arm64/include/asm/cpufeature.h

   1 /*
   2  * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #ifndef __ASM_CPUFEATURE_H
  10 #define __ASM_CPUFEATURE_H
  11
  12 #include <asm/cpucaps.h>
  13 #include <asm/hwcap.h>
  14 #include <asm/sysreg.h>
  15
  16 /*
  17  * In the arm64 world (as in the ARM world), elf_hwcap is used both internally
  18  * in the kernel and for user space to keep track of which optional features
  19  * are supported by the current system. So let's map feature 'x' to HWCAP_x.
  20  * Note that HWCAP_x constants are bit fields so we need to take the log.
  21  */
  22
  23 #define MAX_CPU_FEATURES        (8 * sizeof(elf_hwcap))
  24 #define cpu_feature(x)          ilog2(HWCAP_ ## x)
  25
  26 #ifndef __ASSEMBLY__
  27
  28 #include <linux/bug.h>
  29 #include <linux/jump_label.h>
  30 #include <linux/kernel.h>
  31
  32 /* CPU feature register tracking */
  33 enum ftr_type {
  34         FTR_EXACT,                      /* Use a predefined safe value */
  35         FTR_LOWER_SAFE,                 /* Smaller value is safe */
  36         FTR_HIGHER_SAFE,                /* Bigger value is safe */
  37         FTR_HIGHER_OR_ZERO_SAFE,        /* Bigger value is safe, but 0 is biggest */
  38 };
  39
  40 #define FTR_STRICT      true    /* SANITY check strict matching required */
  41 #define FTR_NONSTRICT   false   /* SANITY check ignored */
  42
  43 #define FTR_SIGNED      true    /* Value should be treated as signed */
  44 #define FTR_UNSIGNED    false   /* Value should be treated as unsigned */
  45
  46 struct arm64_ftr_bits {
  47         bool            sign;   /* Value is signed ? */
  48         bool            strict; /* CPU Sanity check: strict matching required ? */
  49         enum ftr_type   type;
  50         u8              shift;
  51         u8              width;
  52         s64             safe_val; /* safe value for FTR_EXACT features */
  53 };
  54
  55 /*
  56  * @arm64_ftr_reg - Feature register
  57  * @strict_mask         Bits which should match across all CPUs for sanity.
  58  * @sys_val             Safe value across the CPUs (system view)
  59  */
  60 struct arm64_ftr_reg {
  61         const char                      *name;
  62         u64                             strict_mask;
  63         u64                             sys_val;
  64         const struct arm64_ftr_bits     *ftr_bits;
  65 };
  66
  67 extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;
  68
  69 /* scope of capability check */
  70 enum {
  71         SCOPE_SYSTEM,
  72         SCOPE_LOCAL_CPU,
  73 };
  74
  75 struct arm64_cpu_capabilities {
  76         const char *desc;
  77         u16 capability;
  78         int def_scope;                  /* default scope */
  79         bool (*matches)(const struct arm64_cpu_capabilities *caps, int scope);
  80         int (*enable)(void *);          /* Called on all active CPUs */
  81         union {
  82                 struct {        /* To be used for erratum handling only */
  83                         u32 midr_model;
  84                         u32 midr_range_min, midr_range_max;
  85                 };
  86
  87                 struct {        /* Feature register checking */
  88                         u32 sys_reg;
  89                         u8 field_pos;
  90                         u8 min_field_value;
  91                         u8 hwcap_type;
  92                         bool sign;
  93                         unsigned long hwcap;
  94                 };
  95         };
  96 };
  97
  98 extern DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
  99 extern struct static_key_false cpu_hwcap_keys[ARM64_NCAPS];
 100 extern struct static_key_false arm64_const_caps_ready;
 101
 102 bool this_cpu_has_cap(unsigned int cap);
 103
 104 static inline bool cpu_have_feature(unsigned int num)
 105 {
 106         return elf_hwcap & (1UL << num);
 107 }
 108
 109 /* System capability check for constant caps */
 110 static inline bool __cpus_have_const_cap(int num)
 111 {
 112         if (num >= ARM64_NCAPS)
 113                 return false;
 114         return static_branch_unlikely(&cpu_hwcap_keys[num]);
 115 }
 116
 117 static inline bool cpus_have_cap(unsigned int num)
 118 {
 119         if (num >= ARM64_NCAPS)
 120                 return false;
 121         return test_bit(num, cpu_hwcaps);
 122 }
 123
 124 static inline bool cpus_have_const_cap(int num)
 125 {
 126         if (static_branch_likely(&arm64_const_caps_ready))
 127                 return __cpus_have_const_cap(num);
 128         else
 129                 return cpus_have_cap(num);
 130 }
 131
 132 static inline void cpus_set_cap(unsigned int num)
 133 {
 134         if (num >= ARM64_NCAPS) {
 135                 pr_warn("Attempt to set an illegal CPU capability (%d >= %d)\n",
 136                         num, ARM64_NCAPS);
 137         } else {
 138                 __set_bit(num, cpu_hwcaps);
 139         }
 140 }
 141
 142 static inline int __attribute_const__
 143 cpuid_feature_extract_signed_field_width(u64 features, int field, int width)
 144 {
 145         return (s64)(features << (64 - width - field)) >> (64 - width);
 146 }
 147
 148 static inline int __attribute_const__
 149 cpuid_feature_extract_signed_field(u64 features, int field)
 150 {
 151         return cpuid_feature_extract_signed_field_width(features, field, 4);
 152 }
 153
 154 static inline unsigned int __attribute_const__
 155 cpuid_feature_extract_unsigned_field_width(u64 features, int field, int width)
 156 {
 157         return (u64)(features << (64 - width - field)) >> (64 - width);
 158 }
 159
 160 static inline unsigned int __attribute_const__
 161 cpuid_feature_extract_unsigned_field(u64 features, int field)
 162 {
 163         return cpuid_feature_extract_unsigned_field_width(features, field, 4);
 164 }
 165
 166 static inline u64 arm64_ftr_mask(const struct arm64_ftr_bits *ftrp)
 167 {
 168         return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift);
 169 }
 170
 171 static inline int __attribute_const__
 172 cpuid_feature_extract_field(u64 features, int field, bool sign)
 173 {
 174         return (sign) ?
 175                 cpuid_feature_extract_signed_field(features, field) :
 176                 cpuid_feature_extract_unsigned_field(features, field);
 177 }
 178
 179 static inline s64 arm64_ftr_value(const struct arm64_ftr_bits *ftrp, u64 val)
 180 {
 181         return (s64)cpuid_feature_extract_field(val, ftrp->shift, ftrp->sign);
 182 }
 183
 184 static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)
 185 {
 186         return cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL_SHIFT) == 0x1 ||
 187                 cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_BIGENDEL0_SHIFT) == 0x1;
 188 }
 189
 190 static inline bool id_aa64pfr0_32bit_el0(u64 pfr0)
 191 {
 192         u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL0_SHIFT);
 193
 194         return val == ID_AA64PFR0_EL0_32BIT_64BIT;
 195 }
 196
 197 void __init setup_cpu_features(void);
 198
 199 void update_cpu_capabilities(const struct arm64_cpu_capabilities *caps,
 200                             const char *info);
 201 void enable_cpu_capabilities(const struct arm64_cpu_capabilities *caps);
 202 void check_local_cpu_capabilities(void);
 203
 204 void update_cpu_errata_workarounds(void);
 205 void __init enable_errata_workarounds(void);
 206 void verify_local_cpu_errata_workarounds(void);
 207
 208 u64 read_system_reg(u32 id);
 209
 210 static inline bool cpu_supports_mixed_endian_el0(void)
 211 {
 212         return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
 213 }
 214
 215 static inline bool system_supports_32bit_el0(void)
 216 {
 217         return cpus_have_const_cap(ARM64_HAS_32BIT_EL0);
 218 }
 219
 220 static inline bool system_supports_mixed_endian_el0(void)
 221 {
 222         return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
 223 }
 224
 225 #define ARM64_SSBD_UNKNOWN              -1
 226 #define ARM64_SSBD_FORCE_DISABLE        0
 227 #define ARM64_SSBD_KERNEL               1
 228 #define ARM64_SSBD_FORCE_ENABLE         2
 229 #define ARM64_SSBD_MITIGATED            3
 230
 231 static inline int arm64_get_ssbd_state(void)
 232 {
 233 #ifdef CONFIG_ARM64_SSBD
 234         extern int ssbd_state;
 235         return ssbd_state;
 236 #else
 237         return ARM64_SSBD_UNKNOWN;
 238 #endif
 239 }
 240
 241 #ifdef CONFIG_ARM64_SSBD
 242 void arm64_set_ssbd_mitigation(bool state);
 243 #else
 244 static inline void arm64_set_ssbd_mitigation(bool state) {}
 245 #endif
 246
 247 #endif /* __ASSEMBLY__ */
 248
 249 #endif