1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_ARCHRANDOM_H
3 #define _ASM_ARCHRANDOM_H
5 #ifdef CONFIG_ARCH_RANDOM
7 #include <linux/arm-smccc.h>
9 #include <linux/kernel.h>
10 #include <asm/cpufeature.h>
12 #define ARM_SMCCC_TRNG_MIN_VERSION 0x10000UL
14 extern bool smccc_trng_available;
16 static inline bool __init smccc_probe_trng(void)
18 struct arm_smccc_res res;
20 arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_VERSION, &res);
24 return res.a0 >= ARM_SMCCC_TRNG_MIN_VERSION;
27 static inline bool __arm64_rndr(unsigned long *v)
32 * Reads of RNDR set PSTATE.NZCV to 0b0000 on success,
33 * and set PSTATE.NZCV to 0b0100 otherwise.
36 __mrs_s("%0", SYS_RNDR_EL0) "\n"
38 : "=r" (*v), "=r" (ok)
45 static inline bool __arm64_rndrrs(unsigned long *v)
50 * Reads of RNDRRS set PSTATE.NZCV to 0b0000 on success,
51 * and set PSTATE.NZCV to 0b0100 otherwise.
54 __mrs_s("%0", SYS_RNDRRS_EL0) "\n"
56 : "=r" (*v), "=r" (ok)
63 static inline bool __must_check arch_get_random_long(unsigned long *v)
66 * Only support the generic interface after we have detected
67 * the system wide capability, avoiding complexity with the
68 * cpufeature code and with potential scheduling between CPUs
69 * with and without the feature.
71 if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndr(v))
76 static inline bool __must_check arch_get_random_int(unsigned int *v)
78 if (cpus_have_const_cap(ARM64_HAS_RNG)) {
81 if (__arm64_rndr(&val)) {
89 static inline bool __must_check arch_get_random_seed_long(unsigned long *v)
91 struct arm_smccc_res res;
94 * We prefer the SMCCC call, since its semantics (return actual
95 * hardware backed entropy) is closer to the idea behind this
96 * function here than what even the RNDRSS register provides
97 * (the output of a pseudo RNG freshly seeded by a TRNG).
99 if (smccc_trng_available) {
100 arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_RND64, 64, &res);
101 if ((int)res.a0 >= 0) {
108 * RNDRRS is not backed by an entropy source but by a DRBG that is
109 * reseeded after each invocation. This is not a 100% fit but good
110 * enough to implement this API if no other entropy source exists.
112 if (cpus_have_const_cap(ARM64_HAS_RNG) && __arm64_rndrrs(v))
118 static inline bool __must_check arch_get_random_seed_int(unsigned int *v)
120 struct arm_smccc_res res;
123 if (smccc_trng_available) {
124 arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_RND64, 32, &res);
125 if ((int)res.a0 >= 0) {
126 *v = res.a3 & GENMASK(31, 0);
131 if (cpus_have_const_cap(ARM64_HAS_RNG)) {
132 if (__arm64_rndrrs(&val)) {
141 static inline bool __init __early_cpu_has_rndr(void)
143 /* Open code as we run prior to the first call to cpufeature. */
144 unsigned long ftr = read_sysreg_s(SYS_ID_AA64ISAR0_EL1);
145 return (ftr >> ID_AA64ISAR0_EL1_RNDR_SHIFT) & 0xf;
148 static inline bool __init __must_check
149 arch_get_random_seed_long_early(unsigned long *v)
151 WARN_ON(system_state != SYSTEM_BOOTING);
153 if (smccc_trng_available) {
154 struct arm_smccc_res res;
156 arm_smccc_1_1_invoke(ARM_SMCCC_TRNG_RND64, 64, &res);
157 if ((int)res.a0 >= 0) {
163 if (__early_cpu_has_rndr() && __arm64_rndr(v))
168 #define arch_get_random_seed_long_early arch_get_random_seed_long_early
170 #else /* !CONFIG_ARCH_RANDOM */
172 static inline bool __init smccc_probe_trng(void)
177 #endif /* CONFIG_ARCH_RANDOM */
178 #endif /* _ASM_ARCHRANDOM_H */