1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm64/include/asm/arch_timer.h
5 * Copyright (C) 2012 ARM Ltd.
6 * Author: Marc Zyngier <marc.zyngier@arm.com>
8 #ifndef __ASM_ARCH_TIMER_H
9 #define __ASM_ARCH_TIMER_H
11 #include <asm/barrier.h>
12 #include <asm/hwcap.h>
13 #include <asm/sysreg.h>
15 #include <linux/bug.h>
16 #include <linux/init.h>
17 #include <linux/jump_label.h>
18 #include <linux/smp.h>
19 #include <linux/types.h>
21 #include <clocksource/arm_arch_timer.h>
23 #if IS_ENABLED(CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND)
24 #define has_erratum_handler(h) \
26 const struct arch_timer_erratum_workaround *__wa; \
27 __wa = __this_cpu_read(timer_unstable_counter_workaround); \
31 #define erratum_handler(h) \
33 const struct arch_timer_erratum_workaround *__wa; \
34 __wa = __this_cpu_read(timer_unstable_counter_workaround); \
35 (__wa && __wa->h) ? ({ isb(); __wa->h;}) : arch_timer_##h; \
39 #define has_erratum_handler(h) false
40 #define erratum_handler(h) (arch_timer_##h)
43 enum arch_timer_erratum_match_type {
45 ate_match_local_cap_id,
46 ate_match_acpi_oem_info,
49 struct clock_event_device;
51 struct arch_timer_erratum_workaround {
52 enum arch_timer_erratum_match_type match_type;
55 u64 (*read_cntpct_el0)(void);
56 u64 (*read_cntvct_el0)(void);
57 int (*set_next_event_phys)(unsigned long, struct clock_event_device *);
58 int (*set_next_event_virt)(unsigned long, struct clock_event_device *);
59 bool disable_compat_vdso;
62 DECLARE_PER_CPU(const struct arch_timer_erratum_workaround *,
63 timer_unstable_counter_workaround);
65 static inline notrace u64 arch_timer_read_cntpct_el0(void)
69 asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0",
70 "nop\n" __mrs_s("%0", SYS_CNTPCTSS_EL0),
77 static inline notrace u64 arch_timer_read_cntvct_el0(void)
81 asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0",
82 "nop\n" __mrs_s("%0", SYS_CNTVCTSS_EL0),
89 #define arch_timer_reg_read_stable(reg) \
91 erratum_handler(read_ ## reg)(); \
95 * These register accessors are marked inline so the compiler can
96 * nicely work out which register we want, and chuck away the rest of
99 static __always_inline
100 void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u64 val)
102 if (access == ARCH_TIMER_PHYS_ACCESS) {
104 case ARCH_TIMER_REG_CTRL:
105 write_sysreg(val, cntp_ctl_el0);
108 case ARCH_TIMER_REG_CVAL:
109 write_sysreg(val, cntp_cval_el0);
114 } else if (access == ARCH_TIMER_VIRT_ACCESS) {
116 case ARCH_TIMER_REG_CTRL:
117 write_sysreg(val, cntv_ctl_el0);
120 case ARCH_TIMER_REG_CVAL:
121 write_sysreg(val, cntv_cval_el0);
131 static __always_inline
132 u64 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
134 if (access == ARCH_TIMER_PHYS_ACCESS) {
136 case ARCH_TIMER_REG_CTRL:
137 return read_sysreg(cntp_ctl_el0);
141 } else if (access == ARCH_TIMER_VIRT_ACCESS) {
143 case ARCH_TIMER_REG_CTRL:
144 return read_sysreg(cntv_ctl_el0);
154 static inline u32 arch_timer_get_cntfrq(void)
156 return read_sysreg(cntfrq_el0);
159 static inline u32 arch_timer_get_cntkctl(void)
161 return read_sysreg(cntkctl_el1);
164 static inline void arch_timer_set_cntkctl(u32 cntkctl)
166 write_sysreg(cntkctl, cntkctl_el1);
170 static __always_inline u64 __arch_counter_get_cntpct_stable(void)
174 cnt = arch_timer_reg_read_stable(cntpct_el0);
175 arch_counter_enforce_ordering(cnt);
179 static __always_inline u64 __arch_counter_get_cntpct(void)
183 asm volatile(ALTERNATIVE("isb\n mrs %0, cntpct_el0",
184 "nop\n" __mrs_s("%0", SYS_CNTPCTSS_EL0),
187 arch_counter_enforce_ordering(cnt);
191 static __always_inline u64 __arch_counter_get_cntvct_stable(void)
195 cnt = arch_timer_reg_read_stable(cntvct_el0);
196 arch_counter_enforce_ordering(cnt);
200 static __always_inline u64 __arch_counter_get_cntvct(void)
204 asm volatile(ALTERNATIVE("isb\n mrs %0, cntvct_el0",
205 "nop\n" __mrs_s("%0", SYS_CNTVCTSS_EL0),
208 arch_counter_enforce_ordering(cnt);
212 static inline int arch_timer_arch_init(void)
217 static inline void arch_timer_set_evtstrm_feature(void)
219 cpu_set_named_feature(EVTSTRM);
221 compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM;
225 static inline bool arch_timer_have_evtstrm_feature(void)
227 return cpu_have_named_feature(EVTSTRM);