arch/arm64/include/asm/arch_timer.h

   1 /*
   2  * arch/arm64/include/asm/arch_timer.h
   3  *
   4  * Copyright (C) 2012 ARM Ltd.
   5  * Author: Marc Zyngier <marc.zyngier@arm.com>
   6  *
   7  * This program is free software: you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #ifndef __ASM_ARCH_TIMER_H
  20 #define __ASM_ARCH_TIMER_H
  21
  22 #include <asm/barrier.h>
  23 #include <asm/sysreg.h>
  24
  25 #include <linux/bug.h>
  26 #include <linux/init.h>
  27 #include <linux/jump_label.h>
  28 #include <linux/types.h>
  29
  30 #include <clocksource/arm_arch_timer.h>
  31
  32 #if IS_ENABLED(CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND)
  33 extern struct static_key_false arch_timer_read_ool_enabled;
  34 #define needs_unstable_timer_counter_workaround() \
  35         static_branch_unlikely(&arch_timer_read_ool_enabled)
  36 #else
  37 #define needs_unstable_timer_counter_workaround()  false
  38 #endif
  39
  40 enum arch_timer_erratum_match_type {
  41         ate_match_dt,
  42         ate_match_local_cap_id,
  43 };
  44
  45 struct arch_timer_erratum_workaround {
  46         enum arch_timer_erratum_match_type match_type;
  47         const void *id;
  48         const char *desc;
  49         u32 (*read_cntp_tval_el0)(void);
  50         u32 (*read_cntv_tval_el0)(void);
  51         u64 (*read_cntvct_el0)(void);
  52 };
  53
  54 extern const struct arch_timer_erratum_workaround *timer_unstable_counter_workaround;
  55
  56 #define arch_timer_reg_read_stable(reg)                 \
  57 ({                                                      \
  58         u64 _val;                                       \
  59         if (needs_unstable_timer_counter_workaround())          \
  60                 _val = timer_unstable_counter_workaround->read_##reg();\
  61         else                                            \
  62                 _val = read_sysreg(reg);                \
  63         _val;                                           \
  64 })
  65
  66 /*
  67  * These register accessors are marked inline so the compiler can
  68  * nicely work out which register we want, and chuck away the rest of
  69  * the code.
  70  */
  71 static __always_inline
  72 void arch_timer_reg_write_cp15(int access, enum arch_timer_reg reg, u32 val)
  73 {
  74         if (access == ARCH_TIMER_PHYS_ACCESS) {
  75                 switch (reg) {
  76                 case ARCH_TIMER_REG_CTRL:
  77                         write_sysreg(val, cntp_ctl_el0);
  78                         break;
  79                 case ARCH_TIMER_REG_TVAL:
  80                         write_sysreg(val, cntp_tval_el0);
  81                         break;
  82                 }
  83         } else if (access == ARCH_TIMER_VIRT_ACCESS) {
  84                 switch (reg) {
  85                 case ARCH_TIMER_REG_CTRL:
  86                         write_sysreg(val, cntv_ctl_el0);
  87                         break;
  88                 case ARCH_TIMER_REG_TVAL:
  89                         write_sysreg(val, cntv_tval_el0);
  90                         break;
  91                 }
  92         }
  93
  94         isb();
  95 }
  96
  97 static __always_inline
  98 u32 arch_timer_reg_read_cp15(int access, enum arch_timer_reg reg)
  99 {
 100         if (access == ARCH_TIMER_PHYS_ACCESS) {
 101                 switch (reg) {
 102                 case ARCH_TIMER_REG_CTRL:
 103                         return read_sysreg(cntp_ctl_el0);
 104                 case ARCH_TIMER_REG_TVAL:
 105                         return arch_timer_reg_read_stable(cntp_tval_el0);
 106                 }
 107         } else if (access == ARCH_TIMER_VIRT_ACCESS) {
 108                 switch (reg) {
 109                 case ARCH_TIMER_REG_CTRL:
 110                         return read_sysreg(cntv_ctl_el0);
 111                 case ARCH_TIMER_REG_TVAL:
 112                         return arch_timer_reg_read_stable(cntv_tval_el0);
 113                 }
 114         }
 115
 116         BUG();
 117 }
 118
 119 static inline u32 arch_timer_get_cntfrq(void)
 120 {
 121         return read_sysreg(cntfrq_el0);
 122 }
 123
 124 static inline u32 arch_timer_get_cntkctl(void)
 125 {
 126         return read_sysreg(cntkctl_el1);
 127 }
 128
 129 static inline void arch_timer_set_cntkctl(u32 cntkctl)
 130 {
 131         write_sysreg(cntkctl, cntkctl_el1);
 132 }
 133
 134 static inline u64 arch_counter_get_cntpct(void)
 135 {
 136         /*
 137          * AArch64 kernel and user space mandate the use of CNTVCT.
 138          */
 139         BUG();
 140         return 0;
 141 }
 142
 143 static inline u64 arch_counter_get_cntvct(void)
 144 {
 145         isb();
 146         return arch_timer_reg_read_stable(cntvct_el0);
 147 }
 148
 149 static inline int arch_timer_arch_init(void)
 150 {
 151         return 0;
 152 }
 153
 154 #endif