arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * dts file for Xilinx ZynqMP ZCU111
   4  *
   5  * (C) Copyright 2017 - 2018, Xilinx, Inc.
   6  *
   7  * Michal Simek <michal.simek@xilinx.com>
   8  */
   9
  10 /dts-v1/;
  11
  12 #include "zynqmp.dtsi"
  13 #include "zynqmp-clk.dtsi"
  14 #include <dt-bindings/input/input.h>
  15 #include <dt-bindings/gpio/gpio.h>
  16
  17 / {
  18         model = "ZynqMP ZCU111 RevA";
  19         compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
  20
  21         aliases {
  22                 ethernet0 = &gem3;
  23                 i2c0 = &i2c0;
  24                 i2c1 = &i2c1;
  25                 mmc0 = &sdhci1;
  26                 rtc0 = &rtc;
  27                 serial0 = &uart0;
  28                 serial1 = &dcc;
  29         };
  30
  31         chosen {
  32                 bootargs = "earlycon";
  33                 stdout-path = "serial0:115200n8";
  34         };
  35
  36         memory@0 {
  37                 device_type = "memory";
  38                 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
  39                 /* Another 4GB connected to PL */
  40         };
  41
  42         gpio-keys {
  43                 compatible = "gpio-keys";
  44                 autorepeat;
  45                 sw19 {
  46                         label = "sw19";
  47                         gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
  48                         linux,code = <KEY_DOWN>;
  49                         gpio-key,wakeup;
  50                         autorepeat;
  51                 };
  52         };
  53
  54         leds {
  55                 compatible = "gpio-leds";
  56                 heartbeat-led {
  57                         label = "heartbeat";
  58                         gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
  59                         linux,default-trigger = "heartbeat";
  60                 };
  61         };
  62 };
  63
  64 &dcc {
  65         status = "okay";
  66 };
  67
  68 &fpd_dma_chan1 {
  69         status = "okay";
  70 };
  71
  72 &fpd_dma_chan2 {
  73         status = "okay";
  74 };
  75
  76 &fpd_dma_chan3 {
  77         status = "okay";
  78 };
  79
  80 &fpd_dma_chan4 {
  81         status = "okay";
  82 };
  83
  84 &fpd_dma_chan5 {
  85         status = "okay";
  86 };
  87
  88 &fpd_dma_chan6 {
  89         status = "okay";
  90 };
  91
  92 &fpd_dma_chan7 {
  93         status = "okay";
  94 };
  95
  96 &fpd_dma_chan8 {
  97         status = "okay";
  98 };
  99
 100 &gem3 {
 101         status = "okay";
 102         phy-handle = <&phy0>;
 103         phy-mode = "rgmii-id";
 104         phy0: phy@c {
 105                 reg = <0xc>;
 106                 ti,rx-internal-delay = <0x8>;
 107                 ti,tx-internal-delay = <0xa>;
 108                 ti,fifo-depth = <0x1>;
 109         };
 110 };
 111
 112 &gpio {
 113         status = "okay";
 114 };
 115
 116 &i2c0 {
 117         status = "okay";
 118         clock-frequency = <400000>;
 119
 120         tca6416_u22: gpio@20 {
 121                 compatible = "ti,tca6416";
 122                 reg = <0x20>;
 123                 gpio-controller; /* interrupt not connected */
 124                 #gpio-cells = <2>;
 125                 /*
 126                  * IRQ not connected
 127                  * Lines:
 128                  * 0 - MAX6643_OT_B
 129                  * 1 - MAX6643_FANFAIL_B
 130                  * 2 - MIO26_PMU_INPUT_LS
 131                  * 4 - SFP_SI5382_INT_ALM
 132                  * 5 - IIC_MUX_RESET_B
 133                  * 6 - GEM3_EXP_RESET_B
 134                  * 10 - FMCP_HSPC_PRSNT_M2C_B
 135                  * 11 - CLK_SPI_MUX_SEL0
 136                  * 12 - CLK_SPI_MUX_SEL1
 137                  * 16 - IRPS5401_ALERT_B
 138                  * 17 - INA226_PMBUS_ALERT
 139                  * 3, 7, 13-15 - not connected
 140                  */
 141         };
 142
 143         i2c-mux@75 { /* u23 */
 144                 compatible = "nxp,pca9544";
 145                 #address-cells = <1>;
 146                 #size-cells = <0>;
 147                 reg = <0x75>;
 148                 i2c@0 {
 149                         #address-cells = <1>;
 150                         #size-cells = <0>;
 151                         reg = <0>;
 152                         /* PS_PMBUS */
 153                         /* PMBUS_ALERT done via pca9544 */
 154                         ina226@40 { /* u67 */
 155                                 compatible = "ti,ina226";
 156                                 reg = <0x40>;
 157                                 shunt-resistor = <2000>;
 158                         };
 159                         ina226@41 { /* u59 */
 160                                 compatible = "ti,ina226";
 161                                 reg = <0x41>;
 162                                 shunt-resistor = <5000>;
 163                         };
 164                         ina226@42 { /* u61 */
 165                                 compatible = "ti,ina226";
 166                                 reg = <0x42>;
 167                                 shunt-resistor = <5000>;
 168                         };
 169                         ina226@43 { /* u60 */
 170                                 compatible = "ti,ina226";
 171                                 reg = <0x43>;
 172                                 shunt-resistor = <5000>;
 173                         };
 174                         ina226@45 { /* u64 */
 175                                 compatible = "ti,ina226";
 176                                 reg = <0x45>;
 177                                 shunt-resistor = <5000>;
 178                         };
 179                         ina226@46 { /* u69 */
 180                                 compatible = "ti,ina226";
 181                                 reg = <0x46>;
 182                                 shunt-resistor = <2000>;
 183                         };
 184                         ina226@47 { /* u66 */
 185                                 compatible = "ti,ina226";
 186                                 reg = <0x47>;
 187                                 shunt-resistor = <5000>;
 188                         };
 189                         ina226@48 { /* u65 */
 190                                 compatible = "ti,ina226";
 191                                 reg = <0x48>;
 192                                 shunt-resistor = <5000>;
 193                         };
 194                         ina226@49 { /* u63 */
 195                                 compatible = "ti,ina226";
 196                                 reg = <0x49>;
 197                                 shunt-resistor = <5000>;
 198                         };
 199                         ina226@4a { /* u3 */
 200                                 compatible = "ti,ina226";
 201                                 reg = <0x4a>;
 202                                 shunt-resistor = <5000>;
 203                         };
 204                         ina226@4b { /* u71 */
 205                                 compatible = "ti,ina226";
 206                                 reg = <0x4b>;
 207                                 shunt-resistor = <5000>;
 208                         };
 209                         ina226@4c { /* u77 */
 210                                 compatible = "ti,ina226";
 211                                 reg = <0x4c>;
 212                                 shunt-resistor = <5000>;
 213                         };
 214                         ina226@4d { /* u73 */
 215                                 compatible = "ti,ina226";
 216                                 reg = <0x4d>;
 217                                 shunt-resistor = <5000>;
 218                         };
 219                         ina226@4e { /* u79 */
 220                                 compatible = "ti,ina226";
 221                                 reg = <0x4e>;
 222                                 shunt-resistor = <5000>;
 223                         };
 224                 };
 225                 i2c@1 {
 226                         #address-cells = <1>;
 227                         #size-cells = <0>;
 228                         reg = <1>;
 229                         /* NC */
 230                 };
 231                 i2c@2 {
 232                         #address-cells = <1>;
 233                         #size-cells = <0>;
 234                         reg = <2>;
 235                         irps5401_43: irps54012@43 { /* IRPS5401 - u53 check these */
 236                                 reg = <0x43>;
 237                         };
 238                         irps5401_44: irps54012@44 { /* IRPS5401 - u55 */
 239                                 reg = <0x44>;
 240                         };
 241                         irps5401_45: irps54012@45 { /* IRPS5401 - u57 */
 242                                 reg = <0x45>;
 243                         };
 244                         /* u68 IR38064 +0 */
 245                         /* u70 IR38060 +1 */
 246                         /* u74 IR38060 +2 */
 247                         /* u75 IR38060 +6 */
 248                         /* J19 header too */
 249
 250                 };
 251                 i2c@3 {
 252                         #address-cells = <1>;
 253                         #size-cells = <0>;
 254                         reg = <3>;
 255                         /* SYSMON */
 256                 };
 257         };
 258 };
 259
 260 &i2c1 {
 261         status = "okay";
 262         clock-frequency = <400000>;
 263
 264         i2c-mux@74 { /* u26 */
 265                 compatible = "nxp,pca9548";
 266                 #address-cells = <1>;
 267                 #size-cells = <0>;
 268                 reg = <0x74>;
 269                 i2c@0 {
 270                         #address-cells = <1>;
 271                         #size-cells = <0>;
 272                         reg = <0>;
 273                         /*
 274                          * IIC_EEPROM 1kB memory which uses 256B blocks
 275                          * where every block has different address.
 276                          *    0 - 256B address 0x54
 277                          * 256B - 512B address 0x55
 278                          * 512B - 768B address 0x56
 279                          * 768B - 1024B address 0x57
 280                          */
 281                         eeprom: eeprom@54 { /* u88 */
 282                                 compatible = "atmel,24c08";
 283                                 reg = <0x54>;
 284                         };
 285                 };
 286                 i2c@1 {
 287                         #address-cells = <1>;
 288                         #size-cells = <0>;
 289                         reg = <1>;
 290                         si5341: clock-generator@36 { /* SI5341 - u46 */
 291                                 reg = <0x36>;
 292                         };
 293
 294                 };
 295                 i2c@2 {
 296                         #address-cells = <1>;
 297                         #size-cells = <0>;
 298                         reg = <2>;
 299                         si570_1: clock-generator@5d { /* USER SI570 - u47 */
 300                                 #clock-cells = <0>;
 301                                 compatible = "silabs,si570";
 302                                 reg = <0x5d>;
 303                                 temperature-stability = <50>;
 304                                 factory-fout = <300000000>;
 305                                 clock-frequency = <300000000>;
 306                         };
 307                 };
 308                 i2c@3 {
 309                         #address-cells = <1>;
 310                         #size-cells = <0>;
 311                         reg = <3>;
 312                         si570_2: clock-generator@5d { /* USER MGT SI570 - u49 */
 313                                 #clock-cells = <0>;
 314                                 compatible = "silabs,si570";
 315                                 reg = <0x5d>;
 316                                 temperature-stability = <50>;
 317                                 factory-fout = <156250000>;
 318                                 clock-frequency = <148500000>;
 319                         };
 320                 };
 321                 i2c@4 {
 322                         #address-cells = <1>;
 323                         #size-cells = <0>;
 324                         reg = <4>;
 325                         si5328: clock-generator@69 { /* SI5328 - u48 */
 326                                 reg = <0x69>;
 327                         };
 328                 };
 329                 i2c@5 {
 330                         #address-cells = <1>;
 331                         #size-cells = <0>;
 332                         reg = <5>;
 333                                 sc18is603@2f { /* sc18is602 - u93 */
 334                                         compatible = "nxp,sc18is603";
 335                                         reg = <0x2f>;
 336                                         /* 4 gpios for CS not handled by driver */
 337                                         /*
 338                                          * USB2ANY cable or
 339                                          * LMK04208 - u90 or
 340                                          * LMX2594 - u102 or
 341                                          * LMX2594 - u103 or
 342                                          * LMX2594 - u104
 343                                          */
 344                                 };
 345                 };
 346                 i2c@6 {
 347                         #address-cells = <1>;
 348                         #size-cells = <0>;
 349                         reg = <6>;
 350                         /* FMC connector */
 351                 };
 352                 /* 7 NC */
 353         };
 354
 355         i2c-mux@75 {
 356                 compatible = "nxp,pca9548"; /* u27 */
 357                 #address-cells = <1>;
 358                 #size-cells = <0>;
 359                 reg = <0x75>;
 360
 361                 i2c@0 {
 362                         #address-cells = <1>;
 363                         #size-cells = <0>;
 364                         reg = <0>;
 365                         /* FMCP_HSPC_IIC */
 366                 };
 367                 i2c@1 {
 368                         #address-cells = <1>;
 369                         #size-cells = <0>;
 370                         reg = <1>;
 371                         /* NC */
 372                 };
 373                 i2c@2 {
 374                         #address-cells = <1>;
 375                         #size-cells = <0>;
 376                         reg = <2>;
 377                         /* SYSMON */
 378                 };
 379                 i2c@3 {
 380                         #address-cells = <1>;
 381                         #size-cells = <0>;
 382                         reg = <3>;
 383                         /* DDR4 SODIMM */
 384                 };
 385                 i2c@4 {
 386                         #address-cells = <1>;
 387                         #size-cells = <0>;
 388                         reg = <4>;
 389                         /* SFP3 */
 390                 };
 391                 i2c@5 {
 392                         #address-cells = <1>;
 393                         #size-cells = <0>;
 394                         reg = <5>;
 395                         /* SFP2 */
 396                 };
 397                 i2c@6 {
 398                         #address-cells = <1>;
 399                         #size-cells = <0>;
 400                         reg = <6>;
 401                         /* SFP1 */
 402                 };
 403                 i2c@7 {
 404                         #address-cells = <1>;
 405                         #size-cells = <0>;
 406                         reg = <7>;
 407                         /* SFP0 */
 408                 };
 409         };
 410 };
 411
 412 &rtc {
 413         status = "okay";
 414 };
 415
 416 &sata {
 417         status = "okay";
 418         /* SATA OOB timing settings */
 419         ceva,p0-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
 420         ceva,p0-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
 421         ceva,p0-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
 422         ceva,p0-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 423         ceva,p1-cominit-params = /bits/ 8 <0x18 0x40 0x18 0x28>;
 424         ceva,p1-comwake-params = /bits/ 8 <0x06 0x14 0x08 0x0E>;
 425         ceva,p1-burst-params = /bits/ 8 <0x13 0x08 0x4A 0x06>;
 426         ceva,p1-retry-params = /bits/ 16 <0x96A4 0x3FFC>;
 427 };
 428
 429 /* SD1 with level shifter */
 430 &sdhci1 {
 431         status = "okay";
 432         no-1-8-v;
 433 };
 434
 435 &uart0 {
 436         status = "okay";
 437 };
 438
 439 /* ULPI SMSC USB3320 */
 440 &usb0 {
 441         status = "okay";
 442 };