1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP ZCU102 RevB
5 * (C) Copyright 2016 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
8 * Michal Simek <michal.simek@amd.com>
11 #include "zynqmp-zcu102-revA.dts"
14 model = "ZynqMP ZCU102 RevB";
15 compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
21 phyc: ethernet-phy@c {
23 compatible = "ethernet-phy-id2000.a231";
25 ti,rx-internal-delay = <0x8>;
26 ti,tx-internal-delay = <0xa>;
27 ti,fifo-depth = <0x1>;
28 ti,dp83867-rxctrl-strap-quirk;
29 reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
31 /* Cleanup from RevA */
32 /delete-node/ ethernet-phy@21;
36 /* Fix collision with u61 */
40 max15303@1b { /* u8 */
41 compatible = "maxim,max15303";
44 /delete-node/ max15303@20;