arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB.dts

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * dts file for Xilinx ZynqMP ZCU102 RevB
   4  *
   5  * (C) Copyright 2016 - 2022, Xilinx, Inc.
   6  * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
   7  *
   8  * Michal Simek <michal.simek@amd.com>
   9  */
  10
  11 #include "zynqmp-zcu102-revA.dts"
  12
  13 / {
  14         model = "ZynqMP ZCU102 RevB";
  15         compatible = "xlnx,zynqmp-zcu102-revB", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
  16 };
  17
  18 &gem3 {
  19         phy-handle = <&phyc>;
  20         mdio: mdio {
  21                 phyc: ethernet-phy@c {
  22                         #phy-cells = <0x1>;
  23                         compatible = "ethernet-phy-id2000.a231";
  24                         reg = <0xc>;
  25                         ti,rx-internal-delay = <0x8>;
  26                         ti,tx-internal-delay = <0xa>;
  27                         ti,fifo-depth = <0x1>;
  28                         ti,dp83867-rxctrl-strap-quirk;
  29                         reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
  30                 };
  31                 /* Cleanup from RevA */
  32                 /delete-node/ ethernet-phy@21;
  33         };
  34 };
  35
  36 /* Fix collision with u61 */
  37 &i2c0 {
  38         i2c-mux@75 {
  39                 i2c@2 {
  40                         max15303@1b { /* u8 */
  41                                 compatible = "maxim,max15303";
  42                                 reg = <0x1b>;
  43                         };
  44                         /delete-node/ max15303@20;
  45                 };
  46         };
  47 };