1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP ZCU100 revC
5 * (C) Copyright 2016 - 2022, Xilinx, Inc.
6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc.
8 * Michal Simek <michal.simek@amd.com>
9 * Nathalie Chan King Choy
14 #include "zynqmp.dtsi"
15 #include "zynqmp-clk-ccf.dtsi"
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/interrupt-controller/irq.h>
18 #include <dt-bindings/gpio/gpio.h>
19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
20 #include <dt-bindings/phy/phy.h>
23 model = "ZynqMP ZCU100 RevC";
24 compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp";
41 bootargs = "earlycon";
42 stdout-path = "serial0:115200n8";
46 device_type = "memory";
47 reg = <0x0 0x0 0x0 0x80000000>;
51 compatible = "gpio-keys";
55 gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
56 linux,code = <KEY_POWER>;
63 compatible = "iio-hwmon";
64 io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>,
65 <&xilinx_ams 3>, <&xilinx_ams 4>, <&xilinx_ams 5>,
66 <&xilinx_ams 6>, <&xilinx_ams 7>, <&xilinx_ams 8>,
67 <&xilinx_ams 9>, <&xilinx_ams 10>,
68 <&xilinx_ams 11>, <&xilinx_ams 12>;
72 compatible = "gpio-leds";
75 gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
76 linux,default-trigger = "heartbeat";
81 gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
82 linux,default-trigger = "phy0tx"; /* WLAN tx */
83 default-state = "off";
88 gpios = <&gpio 18 GPIO_ACTIVE_HIGH>;
89 linux,default-trigger = "phy0rx"; /* WLAN rx */
90 default-state = "off";
95 gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
96 linux,default-trigger = "bluetooth-power";
99 led-vbus-det { /* U5 USB5744 VBUS detection via MIO25 */
101 gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
102 default-state = "on";
106 wmmcsdio_fixed: fixedregulator-mmcsdio {
107 compatible = "regulator-fixed";
108 regulator-name = "wmmcsdio_fixed";
109 regulator-min-microvolt = <3300000>;
110 regulator-max-microvolt = <3300000>;
115 sdio_pwrseq: sdio-pwrseq {
116 compatible = "mmc-pwrseq-simple";
117 reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>; /* WIFI_EN */
118 post-power-on-delay-ms = <10>;
122 compatible = "iio-hwmon";
123 io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>;
126 si5335_0: si5335_0 { /* clk0_usb - u23 */
127 compatible = "fixed-clock";
129 clock-frequency = <26000000>;
132 si5335_1: si5335_1 { /* clk1_dp - u23 */
133 compatible = "fixed-clock";
135 clock-frequency = <27000000>;
145 gpio-line-names = "UART1_TX", "UART1_RX", "UART0_RX", "UART0_TX", "I2C1_SCL",
146 "I2C1_SDA", "SPI1_SCLK", "WLAN_EN", "BT_EN", "SPI1_CS",
147 "SPI1_MISO", "SPI1_MOSI", "I2C_MUX_RESET", "SD0_DAT0", "SD0_DAT1",
148 "SD0_DAT2", "SD0_DAT3", "PS_LED3", "PS_LED2", "PS_LED1",
149 "PS_LED0", "SD0_CMD", "SD0_CLK", "GPIO_PB", "SD0_DETECT",
150 "VBUS_DET", "POWER_INT", "DP_AUX", "DP_HPD", "DP_OE",
151 "DP_AUX_IN", "INA226_ALERT", "PS_FP_PWR_EN", "PL_PWR_EN", "POWER_KILL",
152 "", "GPIO-A", "GPIO-B", "SPI0_SCLK", "GPIO-C",
153 "GPIO-D", "SPI0_CS", "SPI0_MISO", "SPI_MOSI", "GPIO-E",
154 "GPIO-F", "SD1_D0", "SD1_D1", "SD1_D2", "SD1_D3",
155 "SD1_CMD", "SD1_CLK", "USB0_CLK", "USB0_DIR", "USB0_DATA2",
156 "USB0_NXT", "USB0_DATA0", "USB0_DATA1", "USB0_STP", "USB0_DATA3",
157 "USB0_DATA4", "USB0_DATA5", "USB0_DATA6", "USB0_DATA7", "USB1_CLK",
158 "USB1_DIR", "USB1_DATA2", "USB1_NXT", "USB1_DATA0", "USB1_DATA1",
159 "USB1_STP", "USB1_DATA3", "USB1_DATA4", "USB1_DATA5", "USB1_DATA6",
160 "USB_DATA7", "WLAN_IRQ", "PMIC_IRQ", /* MIO end and EMIO start */
162 "", "", "", "", "", "", "", "", "", "",
163 "", "", "", "", "", "", "", "", "", "",
164 "", "", "", "", "", "", "", "", "", "",
165 "", "", "", "", "", "", "", "", "", "",
166 "", "", "", "", "", "", "", "", "", "",
167 "", "", "", "", "", "", "", "", "", "",
168 "", "", "", "", "", "", "", "", "", "",
169 "", "", "", "", "", "", "", "", "", "",
170 "", "", "", "", "", "", "", "", "", "",
180 pinctrl-names = "default", "gpio";
181 pinctrl-0 = <&pinctrl_i2c1_default>;
182 pinctrl-1 = <&pinctrl_i2c1_gpio>;
183 scl-gpios = <&gpio 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
184 sda-gpios = <&gpio 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
185 clock-frequency = <100000>;
186 i2c-mux@75 { /* u11 */
187 compatible = "nxp,pca9548";
188 #address-cells = <1>;
192 #address-cells = <1>;
198 #address-cells = <1>;
204 #address-cells = <1>;
210 #address-cells = <1>;
216 #address-cells = <1>;
220 pmic: pmic@5e { /* Custom TI PMIC u33 */
221 compatible = "ti,tps65086";
223 interrupt-parent = <&gpio>;
224 interrupts = <77 IRQ_TYPE_LEVEL_LOW>;
230 #address-cells = <1>;
234 u35: ina226@40 { /* u35 */
235 compatible = "ti,ina226";
236 #io-channel-cells = <1>;
238 shunt-resistor = <10000>;
239 /* MIO31 is alert which should be routed to PMUFW */
243 #address-cells = <1>;
251 #address-cells = <1>;
256 * 100kHz - this is default freq for us
264 pinctrl_i2c1_default: i2c1-default {
266 groups = "i2c1_1_grp";
271 groups = "i2c1_1_grp";
273 slew-rate = <SLEW_RATE_SLOW>;
274 power-source = <IO_STANDARD_LVCMOS18>;
278 pinctrl_i2c1_gpio: i2c1-gpio {
280 groups = "gpio0_4_grp", "gpio0_5_grp";
285 groups = "gpio0_4_grp", "gpio0_5_grp";
286 slew-rate = <SLEW_RATE_SLOW>;
287 power-source = <IO_STANDARD_LVCMOS18>;
291 pinctrl_sdhci0_default: sdhci0-default {
293 groups = "sdio0_3_grp";
298 groups = "sdio0_3_grp";
299 slew-rate = <SLEW_RATE_SLOW>;
300 power-source = <IO_STANDARD_LVCMOS18>;
305 groups = "sdio0_cd_0_grp";
306 function = "sdio0_cd";
310 groups = "sdio0_cd_0_grp";
313 slew-rate = <SLEW_RATE_SLOW>;
314 power-source = <IO_STANDARD_LVCMOS18>;
318 pinctrl_sdhci1_default: sdhci1-default {
320 groups = "sdio1_2_grp";
325 groups = "sdio1_2_grp";
326 slew-rate = <SLEW_RATE_SLOW>;
327 power-source = <IO_STANDARD_LVCMOS18>;
332 pinctrl_spi0_default: spi0-default {
334 groups = "spi0_3_grp";
339 groups = "spi0_3_grp";
341 slew-rate = <SLEW_RATE_SLOW>;
342 power-source = <IO_STANDARD_LVCMOS18>;
346 groups = "spi0_ss_9_grp";
347 function = "spi0_ss";
351 groups = "spi0_ss_9_grp";
357 pinctrl_spi1_default: spi1-default {
359 groups = "spi1_0_grp";
364 groups = "spi1_0_grp";
366 slew-rate = <SLEW_RATE_SLOW>;
367 power-source = <IO_STANDARD_LVCMOS18>;
371 groups = "spi1_ss_0_grp";
372 function = "spi1_ss";
376 groups = "spi1_ss_0_grp";
382 pinctrl_uart0_default: uart0-default {
384 groups = "uart0_0_grp";
389 groups = "uart0_0_grp";
390 slew-rate = <SLEW_RATE_SLOW>;
391 power-source = <IO_STANDARD_LVCMOS18>;
405 pinctrl_uart1_default: uart1-default {
407 groups = "uart1_0_grp";
412 groups = "uart1_0_grp";
413 slew-rate = <SLEW_RATE_SLOW>;
414 power-source = <IO_STANDARD_LVCMOS18>;
428 pinctrl_usb0_default: usb0-default {
430 groups = "usb0_0_grp";
435 groups = "usb0_0_grp";
436 power-source = <IO_STANDARD_LVCMOS18>;
440 pins = "MIO52", "MIO53", "MIO55";
442 drive-strength = <12>;
443 slew-rate = <SLEW_RATE_FAST>;
447 pins = "MIO54", "MIO56", "MIO57", "MIO58", "MIO59",
448 "MIO60", "MIO61", "MIO62", "MIO63";
450 drive-strength = <4>;
451 slew-rate = <SLEW_RATE_SLOW>;
455 pinctrl_usb1_default: usb1-default {
457 groups = "usb1_0_grp";
462 groups = "usb1_0_grp";
463 power-source = <IO_STANDARD_LVCMOS18>;
467 pins = "MIO64", "MIO65", "MIO67";
469 drive-strength = <12>;
470 slew-rate = <SLEW_RATE_FAST>;
474 pins = "MIO66", "MIO68", "MIO69", "MIO70", "MIO71",
475 "MIO72", "MIO73", "MIO74", "MIO75";
477 drive-strength = <4>;
478 slew-rate = <SLEW_RATE_SLOW>;
486 clocks = <&si5335_0>, <&si5335_1>;
487 clock-names = "ref0", "ref1";
494 /* SD0 only supports 3.3V, no level shifter */
499 pinctrl-names = "default";
500 pinctrl-0 = <&pinctrl_sdhci0_default>;
507 pinctrl-names = "default";
508 pinctrl-0 = <&pinctrl_sdhci1_default>;
513 mmc-pwrseq = <&sdio_pwrseq>;
514 vqmmc-supply = <&wmmcsdio_fixed>;
515 #address-cells = <1>;
518 compatible = "ti,wl1831";
520 interrupt-parent = <&gpio>;
521 interrupts = <76 IRQ_TYPE_EDGE_RISING>; /* MIO76 WLAN_IRQ 1V8 */
525 &spi0 { /* Low Speed connector */
529 pinctrl-names = "default";
530 pinctrl-0 = <&pinctrl_spi0_default>;
533 &spi1 { /* High Speed connector */
537 pinctrl-names = "default";
538 pinctrl-0 = <&pinctrl_spi1_default>;
543 pinctrl-names = "default";
544 pinctrl-0 = <&pinctrl_uart0_default>;
546 compatible = "ti,wl1831-st";
547 enable-gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
553 pinctrl-names = "default";
554 pinctrl-0 = <&pinctrl_uart1_default>;
557 /* ULPI SMSC USB3320 */
560 pinctrl-names = "default";
561 pinctrl-0 = <&pinctrl_usb0_default>;
562 phy-names = "usb3-phy";
563 phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
564 /delete-property/ reset-gpios;
569 dr_mode = "peripheral";
570 maximum-speed = "super-speed";
573 /* ULPI SMSC USB3320 */
576 pinctrl-names = "default";
577 pinctrl-0 = <&pinctrl_usb1_default>;
578 phy-names = "usb3-phy";
579 phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
580 reset-gpios = <&modepin_gpio 1 GPIO_ACTIVE_LOW>;
586 maximum-speed = "super-speed";
607 phy-names = "dp-phy0", "dp-phy1";
608 phys = <&psgtr 1 PHY_TYPE_DP 0 1>,
609 <&psgtr 0 PHY_TYPE_DP 1 1>;