GNU Linux-libre 4.19.245-gnu1
[releases.git] / arch / arm64 / boot / dts / xilinx / zynqmp-zc1751-xm016-dc2.dts
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * dts file for Xilinx ZynqMP zc1751-xm016-dc2
4  *
5  * (C) Copyright 2015 - 2018, Xilinx, Inc.
6  *
7  * Michal Simek <michal.simek@xilinx.com>
8  */
9
10 /dts-v1/;
11
12 #include "zynqmp.dtsi"
13 #include "zynqmp-clk.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15
16 / {
17         model = "ZynqMP zc1751-xm016-dc2 RevA";
18         compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
19
20         aliases {
21                 can0 = &can0;
22                 can1 = &can1;
23                 ethernet0 = &gem2;
24                 i2c0 = &i2c0;
25                 rtc0 = &rtc;
26                 serial0 = &uart0;
27                 serial1 = &uart1;
28                 spi0 = &spi0;
29                 spi1 = &spi1;
30         };
31
32         chosen {
33                 bootargs = "earlycon";
34                 stdout-path = "serial0:115200n8";
35         };
36
37         memory@0 {
38                 device_type = "memory";
39                 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
40         };
41 };
42
43 &can0 {
44         status = "okay";
45 };
46
47 &can1 {
48         status = "okay";
49 };
50
51 &fpd_dma_chan1 {
52         status = "okay";
53 };
54
55 &fpd_dma_chan2 {
56         status = "okay";
57 };
58
59 &fpd_dma_chan3 {
60         status = "okay";
61 };
62
63 &fpd_dma_chan4 {
64         status = "okay";
65 };
66
67 &fpd_dma_chan5 {
68         status = "okay";
69 };
70
71 &fpd_dma_chan6 {
72         status = "okay";
73 };
74
75 &fpd_dma_chan7 {
76         status = "okay";
77 };
78
79 &fpd_dma_chan8 {
80         status = "okay";
81 };
82
83 &gem2 {
84         status = "okay";
85         phy-handle = <&phy0>;
86         phy-mode = "rgmii-id";
87         phy0: phy@5 {
88                 reg = <5>;
89                 ti,rx-internal-delay = <0x8>;
90                 ti,tx-internal-delay = <0xa>;
91                 ti,fifo-depth = <0x1>;
92         };
93 };
94
95 &gpio {
96         status = "okay";
97 };
98
99 &i2c0 {
100         status = "okay";
101         clock-frequency = <400000>;
102
103         tca6416_u26: gpio@20 {
104                 compatible = "ti,tca6416";
105                 reg = <0x20>;
106                 gpio-controller;
107                 #gpio-cells = <2>;
108                 /* IRQ not connected */
109         };
110
111         rtc@68 {
112                 compatible = "dallas,ds1339";
113                 reg = <0x68>;
114         };
115 };
116
117 &rtc {
118         status = "okay";
119 };
120
121 &spi0 {
122         status = "okay";
123         num-cs = <1>;
124
125         spi0_flash0: flash0@0 {
126                 #address-cells = <1>;
127                 #size-cells = <1>;
128                 compatible = "sst,sst25wf080", "jedec,spi-nor";
129                 spi-max-frequency = <50000000>;
130                 reg = <0>;
131
132                 partition@0 {
133                         label = "spi0-data";
134                         reg = <0x0 0x100000>;
135                 };
136         };
137 };
138
139 &spi1 {
140         status = "okay";
141         num-cs = <1>;
142
143         spi1_flash0: flash0@0 {
144                 #address-cells = <1>;
145                 #size-cells = <1>;
146                 compatible = "atmel,at45db041e", "atmel,at45", "atmel,dataflash";
147                 spi-max-frequency = <20000000>;
148                 reg = <0>;
149
150                 partition@0 {
151                         label = "spi1-data";
152                         reg = <0x0 0x84000>;
153                 };
154         };
155 };
156
157 /* ULPI SMSC USB3320 */
158 &usb1 {
159         status = "okay";
160 };
161
162 &uart0 {
163         status = "okay";
164 };
165
166 &uart1 {
167         status = "okay";
168 };