arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/
   4  *
   5  * Base Board: https://www.ti.com/lit/zip/SPRR463
   6  */
   7
   8 /dts-v1/;
   9
  10 #include "k3-am68-sk-som.dtsi"
  11 #include <dt-bindings/net/ti-dp83867.h>
  12 #include <dt-bindings/phy/phy-cadence.h>
  13 #include <dt-bindings/phy/phy.h>
  14
  15 #include "k3-serdes.h"
  16
  17 / {
  18         compatible = "ti,am68-sk", "ti,j721s2";
  19         model = "Texas Instruments AM68 SK";
  20
  21         chosen {
  22                 stdout-path = "serial2:115200n8";
  23         };
  24
  25         aliases {
  26                 serial0 = &wkup_uart0;
  27                 serial1 = &mcu_uart0;
  28                 serial2 = &main_uart8;
  29                 mmc1 = &main_sdhci1;
  30                 can0 = &mcu_mcan0;
  31                 can1 = &mcu_mcan1;
  32                 can2 = &main_mcan6;
  33                 can3 = &main_mcan7;
  34         };
  35
  36         vusb_main: regulator-vusb-main5v0 {
  37                 /* USB MAIN INPUT 5V DC */
  38                 compatible = "regulator-fixed";
  39                 regulator-name = "vusb-main5v0";
  40                 regulator-min-microvolt = <5000000>;
  41                 regulator-max-microvolt = <5000000>;
  42                 regulator-always-on;
  43                 regulator-boot-on;
  44         };
  45
  46         vsys_3v3: regulator-vsys3v3 {
  47                 /* Output of LM5141 */
  48                 compatible = "regulator-fixed";
  49                 regulator-name = "vsys_3v3";
  50                 regulator-min-microvolt = <3300000>;
  51                 regulator-max-microvolt = <3300000>;
  52                 vin-supply = <&vusb_main>;
  53                 regulator-always-on;
  54                 regulator-boot-on;
  55         };
  56
  57         vdd_mmc1: regulator-sd {
  58                 /* Output of TPS22918 */
  59                 compatible = "regulator-fixed";
  60                 regulator-name = "vdd_mmc1";
  61                 regulator-min-microvolt = <3300000>;
  62                 regulator-max-microvolt = <3300000>;
  63                 regulator-boot-on;
  64                 enable-active-high;
  65                 vin-supply = <&vsys_3v3>;
  66                 gpio = <&exp1 8 GPIO_ACTIVE_HIGH>;
  67         };
  68
  69         vdd_sd_dv: regulator-tlv71033 {
  70                 /* Output of TLV71033 */
  71                 compatible = "regulator-gpio";
  72                 regulator-name = "tlv71033";
  73                 pinctrl-names = "default";
  74                 pinctrl-0 = <&vdd_sd_dv_pins_default>;
  75                 regulator-min-microvolt = <1800000>;
  76                 regulator-max-microvolt = <3300000>;
  77                 regulator-boot-on;
  78                 vin-supply = <&vsys_3v3>;
  79                 gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>;
  80                 states = <1800000 0x0>,
  81                          <3300000 0x1>;
  82         };
  83
  84         vsys_io_1v8: regulator-vsys-io-1v8 {
  85                 compatible = "regulator-fixed";
  86                 regulator-name = "vsys_io_1v8";
  87                 regulator-min-microvolt = <1800000>;
  88                 regulator-max-microvolt = <1800000>;
  89                 regulator-always-on;
  90                 regulator-boot-on;
  91         };
  92
  93         vsys_io_1v2: regulator-vsys-io-1v2 {
  94                 compatible = "regulator-fixed";
  95                 regulator-name = "vsys_io_1v2";
  96                 regulator-min-microvolt = <1200000>;
  97                 regulator-max-microvolt = <1200000>;
  98                 regulator-always-on;
  99                 regulator-boot-on;
 100         };
 101
 102         transceiver1: can-phy0 {
 103                 compatible = "ti,tcan1042";
 104                 #phy-cells = <0>;
 105                 max-bitrate = <5000000>;
 106         };
 107
 108         transceiver2: can-phy1 {
 109                 compatible = "ti,tcan1042";
 110                 #phy-cells = <0>;
 111                 max-bitrate = <5000000>;
 112         };
 113
 114         transceiver3: can-phy2 {
 115                 compatible = "ti,tcan1042";
 116                 #phy-cells = <0>;
 117                 max-bitrate = <5000000>;
 118         };
 119
 120         transceiver4: can-phy3 {
 121                 compatible = "ti,tcan1042";
 122                 #phy-cells = <0>;
 123                 max-bitrate = <5000000>;
 124         };
 125
 126         connector-hdmi {
 127                 compatible = "hdmi-connector";
 128                 label = "hdmi";
 129                 type = "a";
 130                 pinctrl-names = "default";
 131                 pinctrl-0 = <&hdmi_hpd_pins_default>;
 132                 ddc-i2c-bus = <&mcu_i2c1>;
 133                 /* HDMI_HPD */
 134                 hpd-gpios = <&main_gpio0 0 GPIO_ACTIVE_HIGH>;
 135
 136                 port {
 137                         hdmi_connector_in: endpoint {
 138                                 remote-endpoint = <&tfp410_out>;
 139                         };
 140                 };
 141         };
 142
 143         bridge-dvi {
 144                 compatible = "ti,tfp410";
 145                 /* HDMI_PDn */
 146                 powerdown-gpios = <&exp2 0 GPIO_ACTIVE_LOW>;
 147                 ti,deskew = <0>;
 148
 149                 ports {
 150                         #address-cells = <1>;
 151                         #size-cells = <0>;
 152
 153                         port@0 {
 154                                 reg = <0>;
 155
 156                                 tfp410_in: endpoint {
 157                                         remote-endpoint = <&dpi_out0>;
 158                                         pclk-sample = <1>;
 159                                 };
 160                         };
 161
 162                         port@1 {
 163                                 reg = <1>;
 164
 165                                 tfp410_out: endpoint {
 166                                         remote-endpoint = <&hdmi_connector_in>;
 167                                 };
 168                         };
 169                 };
 170         };
 171 };
 172
 173 &main_pmx0 {
 174         main_uart8_pins_default: main-uart8-default-pins {
 175                 pinctrl-single,pins = <
 176                         J721S2_IOPAD(0x0d0, PIN_INPUT, 11) /* (AF26) SPI0_CS1.UART8_RXD */
 177                         J721S2_IOPAD(0x0d4, PIN_OUTPUT, 11) /* (AH27) SPI0_CLK.UART8_TXD */
 178                 >;
 179         };
 180
 181         main_i2c0_pins_default: main-i2c0-default-pins {
 182                 pinctrl-single,pins = <
 183                         J721S2_IOPAD(0x0e0, PIN_INPUT, 0) /* (AH25) I2C0_SCL */
 184                         J721S2_IOPAD(0x0e4, PIN_INPUT, 0) /* (AE24) I2C0_SDA */
 185                 >;
 186         };
 187
 188         main_mmc1_pins_default: main-mmc1-default-pins {
 189                 pinctrl-single,pins = <
 190                         J721S2_IOPAD(0x104, PIN_INPUT, 0) /* (P23) MMC1_CLK */
 191                         J721S2_IOPAD(0x108, PIN_INPUT, 0) /* (N24) MMC1_CMD */
 192                         J721S2_IOPAD(0x0fc, PIN_INPUT, 0) /* (M23) MMC1_DAT0 */
 193                         J721S2_IOPAD(0x0f8, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
 194                         J721S2_IOPAD(0x0f4, PIN_INPUT, 0) /* (R24) MMC1_DAT2 */
 195                         J721S2_IOPAD(0x0f0, PIN_INPUT, 0) /* (R22) MMC1_DAT3 */
 196                         J721S2_IOPAD(0x0e8, PIN_INPUT, 8) /* (AE25) TIMER_IO0.MMC1_SDCD */
 197                 >;
 198         };
 199
 200         vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
 201                 pinctrl-single,pins = <
 202                         J721S2_IOPAD(0x0c4, PIN_INPUT, 7) /* (AB26) ECAP0_IN_APWM_OUT.GPIO0_49 */
 203                 >;
 204         };
 205
 206         main_usbss0_pins_default: main-usbss0-default-pins {
 207                 pinctrl-single,pins = <
 208                         J721S2_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AG25) TIMER_IO1.USB0_DRVVBUS */
 209                 >;
 210         };
 211
 212         main_mcan6_pins_default: main-mcan6-default-pins {
 213                 pinctrl-single,pins = <
 214                         J721S2_IOPAD(0x098, PIN_INPUT, 0) /* (V25) MCASP0_AXR10.MCAN6_RX */
 215                         J721S2_IOPAD(0x094, PIN_INPUT, 0) /* (AA25) MCASP0_AXR9.MCAN6_TX */
 216                 >;
 217         };
 218
 219         main_mcan7_pins_default: main-mcan7-default-pins {
 220                 pinctrl-single,pins = <
 221                         J721S2_IOPAD(0x0a0, PIN_INPUT, 0) /* (AB25) MCASP0_AXR12.MCAN7_RX */
 222                         J721S2_IOPAD(0x09c, PIN_INPUT, 0) /* (T24) MCASP0_AXR11.MCAN7_TX */
 223                 >;
 224         };
 225
 226         main_i2c4_pins_default: main-i2c4-default-pins {
 227                 pinctrl-single,pins = <
 228                         J721S2_IOPAD(0x010, PIN_INPUT_PULLUP, 8) /* (AF28) MCAN13_RX.I2C4_SDA */
 229                         J721S2_IOPAD(0x014, PIN_INPUT_PULLUP, 8) /* (AD25) MCAN14_TX.I2C4_SCL */
 230                 >;
 231         };
 232
 233         rpi_header_gpio0_pins_default: rpi-header-gpio0-default-pins {
 234                 pinctrl-single,pins = <
 235                         J721S2_IOPAD(0x0a8, PIN_INPUT, 7) /* (U24)  MCASP0_AXR14.GPIO0_42 */
 236                         J721S2_IOPAD(0x090, PIN_INPUT, 7) /* (W24) MCASP0_AXR8.GPIO0_36 */
 237                         J721S2_IOPAD(0x0bc, PIN_INPUT, 7) /* (V28) MCASP1_AFSX.GPIO0_47 */
 238                         J721S2_IOPAD(0x06c, PIN_INPUT, 7) /* (V26) MCAN1_TX.GPIO0_27 */
 239                         J721S2_IOPAD(0x004, PIN_INPUT, 7) /* (W25) MCAN12_TX.GPIO0_1 */
 240                         J721S2_IOPAD(0x008, PIN_INPUT, 7) /* (AC24) MCAN12_RX.GPIO0_2 */
 241                         J721S2_IOPAD(0x0b8, PIN_INPUT, 7) /* (AA24) MCASP1_ACLKX.GPIO0_46 */
 242                         J721S2_IOPAD(0x00c, PIN_INPUT, 7) /* (AE28) MCAN13_TX.GPIO0_3 */
 243                         J721S2_IOPAD(0x034, PIN_INPUT, 7) /* (AD24) PMIC_WAKE0.GPIO0_13 */
 244                         J721S2_IOPAD(0x0a4, PIN_INPUT, 7) /* (T23) MCASP0_AXR13.GPIO0_41 */
 245                         J721S2_IOPAD(0x0c0, PIN_INPUT, 7) /* (T28) MCASP1_AXR0.GPIO0_48 */
 246                         J721S2_IOPAD(0x0b4, PIN_INPUT, 7) /* (U25) MCASP1_AXR4.GPIO0_45 */
 247                         J721S2_IOPAD(0x0cc, PIN_INPUT, 7) /* (AE27) SPI0_CS0.GPIO0_51 */
 248                         J721S2_IOPAD(0x08c, PIN_INPUT, 7) /* (T25) MCASP0_AXR7.GPIO0_35 */
 249                 >;
 250         };
 251
 252         dss_vout0_pins_default: dss-vout0-default-pins {
 253                 pinctrl-single,pins = <
 254                         J721S2_IOPAD(0x074, PIN_OUTPUT, 2) /* (R28) MCAN2_TX.VOUT0_DATA0 */
 255                         J721S2_IOPAD(0x070, PIN_OUTPUT, 2) /* (R27) MCAN1_RX.VOUT0_DATA1 */
 256                         J721S2_IOPAD(0x04c, PIN_OUTPUT, 2) /* (V27) MCASP1_AXR1.VOUT0_DATA10 */
 257                         J721S2_IOPAD(0x048, PIN_OUTPUT, 2) /* (AB27) MCASP0_AXR2.VOUT0_DATA11 */
 258                         J721S2_IOPAD(0x044, PIN_OUTPUT, 2) /* (Y26) MCASP0_AXR1.VOUT0_DATA12 */
 259                         J721S2_IOPAD(0x040, PIN_OUTPUT, 2) /* (AC28) MCASP0_AXR0.VOUT0_DATA13 */
 260                         J721S2_IOPAD(0x03c, PIN_OUTPUT, 2) /* (U27) MCASP0_AFSX.VOUT0_DATA14 */
 261                         J721S2_IOPAD(0x038, PIN_OUTPUT, 2) /* (AB28) MCASP0_ACLKX.VOUT0_DATA15 */
 262                         J721S2_IOPAD(0x0c8, PIN_OUTPUT, 2) /* (AD28) EXT_REFCLK1.VOUT0_DATA16 */
 263                         J721S2_IOPAD(0x030, PIN_OUTPUT, 2) /* (T26) GPIO0_12.VOUT0_DATA17 */
 264                         J721S2_IOPAD(0x02c, PIN_OUTPUT, 2) /* (V23) GPIO0_11.VOUT0_DATA18 */
 265                         J721S2_IOPAD(0x028, PIN_OUTPUT, 2) /* (AB24) MCAN16_RX.VOUT0_DATA19 */
 266                         J721S2_IOPAD(0x07c, PIN_OUTPUT, 2) /* (T27) MCASP0_AXR3.VOUT0_DATA2 */
 267                         J721S2_IOPAD(0x024, PIN_OUTPUT, 2) /* (Y28) MCAN16_TX.VOUT0_DATA20 */
 268                         J721S2_IOPAD(0x020, PIN_OUTPUT, 2) /* (AA23) MCAN15_RX.VOUT0_DATA21 */
 269                         J721S2_IOPAD(0x01c, PIN_OUTPUT, 2) /* (Y24) MCAN15_TX.VOUT0_DATA22 */
 270                         J721S2_IOPAD(0x018, PIN_OUTPUT, 2) /* (W23) MCAN14_RX.VOUT0_DATA23 */
 271                         J721S2_IOPAD(0x068, PIN_OUTPUT, 2) /* (U28) MCAN0_RX.VOUT0_DATA3 */
 272                         J721S2_IOPAD(0x064, PIN_OUTPUT, 2) /* (W28) MCAN0_TX.VOUT0_DATA4 */
 273                         J721S2_IOPAD(0x060, PIN_OUTPUT, 2) /* (AC27) MCASP2_AXR1.VOUT0_DATA5 */
 274                         J721S2_IOPAD(0x05c, PIN_OUTPUT, 2) /* (AA26) MCASP2_AXR0.VOUT0_DATA6 */
 275                         J721S2_IOPAD(0x058, PIN_OUTPUT, 2) /* (AA27) MCASP2_AFSX.VOUT0_DATA7 */
 276                         J721S2_IOPAD(0x054, PIN_OUTPUT, 2) /* (Y27) MCASP2_ACLKX.VOUT0_DATA8 */
 277                         J721S2_IOPAD(0x050, PIN_OUTPUT, 2) /* (W27) MCASP1_AXR2.VOUT0_DATA9 */
 278                         J721S2_IOPAD(0x084, PIN_OUTPUT, 2) /* (AA28) MCASP0_AXR5.VOUT0_DE */
 279                         J721S2_IOPAD(0x080, PIN_OUTPUT, 2) /* (U26) MCASP0_AXR4.VOUT0_HSYNC */
 280                         J721S2_IOPAD(0x078, PIN_OUTPUT, 2) /* (Y25) MCAN2_RX.VOUT0_PCLK */
 281                         J721S2_IOPAD(0x088, PIN_OUTPUT, 2) /* (AD27) MCASP0_AXR6.VOUT0_VP0_VSYNC */
 282                 >;
 283         };
 284
 285         hdmi_hpd_pins_default: hdmi-hpd-default-pins {
 286                 pinctrl-single,pins = <
 287                         J721S2_IOPAD(0x000, PIN_INPUT, 7) /* (AG24) EXTINTN.GPIO0_0  */
 288                 >;
 289         };
 290 };
 291
 292 &wkup_pmx2 {
 293         wkup_uart0_pins_default: wkup-uart0-default-pins {
 294                 pinctrl-single,pins = <
 295                         J721S2_WKUP_IOPAD(0x070, PIN_INPUT, 0) /* (E25) WKUP_GPIO0_6.WKUP_UART0_CTSn */
 296                         J721S2_WKUP_IOPAD(0x074, PIN_OUTPUT, 0) /* (F28) WKUP_GPIO0_7.WKUP_UART0_RTSn */
 297                         J721S2_WKUP_IOPAD(0x048, PIN_INPUT, 0) /* (D28) WKUP_UART0_RXD */
 298                         J721S2_WKUP_IOPAD(0x04c, PIN_OUTPUT, 0) /* (D27) WKUP_UART0_TXD */
 299                 >;
 300         };
 301
 302         mcu_cpsw_pins_default: mcu-cpsw-default-pins {
 303                 pinctrl-single,pins = <
 304                         J721S2_WKUP_IOPAD(0x02C, PIN_INPUT, 0) /* (B22) MCU_RGMII1_RD0 */
 305                         J721S2_WKUP_IOPAD(0x028, PIN_INPUT, 0) /* (B21) MCU_RGMII1_RD1 */
 306                         J721S2_WKUP_IOPAD(0x024, PIN_INPUT, 0) /* (C22) MCU_RGMII1_RD2 */
 307                         J721S2_WKUP_IOPAD(0x020, PIN_INPUT, 0) /* (D23) MCU_RGMII1_RD3 */
 308                         J721S2_WKUP_IOPAD(0x01C, PIN_INPUT, 0) /* (D22) MCU_RGMII1_RXC */
 309                         J721S2_WKUP_IOPAD(0x004, PIN_INPUT, 0) /* (E23) MCU_RGMII1_RX_CTL */
 310                         J721S2_WKUP_IOPAD(0x014, PIN_OUTPUT, 0) /* (F23) MCU_RGMII1_TD0 */
 311                         J721S2_WKUP_IOPAD(0x010, PIN_OUTPUT, 0) /* (G22) MCU_RGMII1_TD1 */
 312                         J721S2_WKUP_IOPAD(0x00C, PIN_OUTPUT, 0) /* (E21) MCU_RGMII1_TD2 */
 313                         J721S2_WKUP_IOPAD(0x008, PIN_OUTPUT, 0) /* (E22) MCU_RGMII1_TD3 */
 314                         J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
 315                         J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
 316                 >;
 317         };
 318
 319         mcu_mdio_pins_default: mcu-mdio-default-pins {
 320                 pinctrl-single,pins = <
 321                         J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
 322                         J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
 323                 >;
 324         };
 325
 326         mcu_mcan0_pins_default: mcu-mcan0-default-pins {
 327                 pinctrl-single,pins = <
 328                         J721S2_WKUP_IOPAD(0x054, PIN_INPUT, 0) /* (E28) MCU_MCAN0_RX */
 329                         J721S2_WKUP_IOPAD(0x050, PIN_OUTPUT, 0) /* (E27) MCU_MCAN0_TX */
 330                 >;
 331         };
 332
 333         mcu_mcan1_pins_default: mcu-mcan1-default-pins {
 334                 pinctrl-single,pins = <
 335                         J721S2_WKUP_IOPAD(0x06C, PIN_INPUT, 0) /* (F26) WKUP_GPIO0_5.MCU_MCAN1_RX */
 336                         J721S2_WKUP_IOPAD(0x068, PIN_OUTPUT, 0) /* (C23) WKUP_GPIO0_4.MCU_MCAN1_TX*/
 337                 >;
 338         };
 339
 340         mcu_i2c0_pins_default: mcu-i2c0-default-pins {
 341                 pinctrl-single,pins = <
 342                         J721S2_WKUP_IOPAD(0x0a0, PIN_INPUT, 0) /* (G24) MCU_I2C0_SCL */
 343                         J721S2_WKUP_IOPAD(0x0a4, PIN_INPUT, 0) /* (J25) MCU_I2C0_SDA */
 344                 >;
 345         };
 346
 347         mcu_i2c1_pins_default: mcu-i2c1-default-pins {
 348                 pinctrl-single,pins = <
 349                         J721S2_WKUP_IOPAD(0x078, PIN_INPUT, 0) /* (F24) WKUP_GPIO0_8.MCU_I2C1_SCL */
 350                         J721S2_WKUP_IOPAD(0x07c, PIN_INPUT, 0) /* (H26) WKUP_GPIO0_9.MCU_I2C1_SDA */
 351                 >;
 352         };
 353
 354         mcu_uart0_pins_default: mcu-uart0-default-pins {
 355                 pinctrl-single,pins = <
 356                         J721S2_WKUP_IOPAD(0x08c, PIN_INPUT, 0) /* (C24) WKUP_GPIO0_13.MCU_UART0_RXD */
 357                         J721S2_WKUP_IOPAD(0x088, PIN_OUTPUT, 0) /* (C25) WKUP_GPIO0_12.MCU_UART0_TXD */
 358                 >;
 359         };
 360
 361         mcu_rpi_header_gpio0_pins0_default: mcu-rpi-header-gpio0-default-pins-0 {
 362                 pinctrl-single,pins = <
 363                         J721S2_WKUP_IOPAD(0x118, PIN_INPUT, 7) /* (G25) WKUP_GPIO0_66 */
 364                         J721S2_WKUP_IOPAD(0x05C, PIN_INPUT, 7) /* (E24) MCU_SPI1_D0.WKUP_GPIO0_1 */
 365                         J721S2_WKUP_IOPAD(0x060, PIN_INPUT, 7) /* (C28) MCU_SPI1_D1.WKUP_GPIO0_2 */
 366                         J721S2_WKUP_IOPAD(0x058, PIN_INPUT, 7) /* (D26) MCU_SPI1_CLK.WKUP_GPIO0_0 */
 367                         J721S2_WKUP_IOPAD(0x094, PIN_INPUT, 7) /* (D25) MCU_SPI1_CS2.WKUP_GPIO0_15*/
 368                         J721S2_WKUP_IOPAD(0x0B8, PIN_INPUT, 7) /* (G27) WKUP_GPIO0_56 */
 369                         J721S2_WKUP_IOPAD(0x114, PIN_INPUT, 7) /* (J26) WKUP_GPIO0_57 */
 370                         J721S2_WKUP_IOPAD(0x11C, PIN_INPUT, 7) /* (J27) WKUP_GPIO0_67 */
 371                         J721S2_WKUP_IOPAD(0x064, PIN_INPUT, 7) /* (C27) MCU_SPI1_CS0.WKUP_GPIO0_3 */
 372                 >;
 373         };
 374 };
 375
 376 &wkup_pmx3 {
 377         mcu_rpi_header_gpio0_pins1_default: mcu-rpi-header-gpio0-default-pins-1 {
 378                 pinctrl-single,pins = <
 379                         J721S2_WKUP_IOPAD(0x000, PIN_INPUT, 7) /* (K26) WKUP_GPIO0_49 */
 380                 >;
 381         };
 382 };
 383
 384 &main_gpio0 {
 385         status = "okay";
 386         pinctrl-names = "default";
 387         pinctrl-0 = <&rpi_header_gpio0_pins_default>;
 388 };
 389
 390 &wkup_gpio0 {
 391         status = "okay";
 392         pinctrl-names = "default";
 393         pinctrl-0 = <&mcu_rpi_header_gpio0_pins0_default>, <&mcu_rpi_header_gpio0_pins1_default>;
 394 };
 395
 396 &wkup_uart0 {
 397         status = "reserved";
 398         pinctrl-names = "default";
 399         pinctrl-0 = <&wkup_uart0_pins_default>;
 400 };
 401
 402 &mcu_uart0 {
 403         status = "okay";
 404         pinctrl-names = "default";
 405         pinctrl-0 = <&mcu_uart0_pins_default>;
 406 };
 407
 408 &main_uart8 {
 409         status = "okay";
 410         pinctrl-names = "default";
 411         pinctrl-0 = <&main_uart8_pins_default>;
 412         /* Shared with TFA on this platform */
 413         power-domains = <&k3_pds 357 TI_SCI_PD_SHARED>;
 414 };
 415
 416 &main_i2c0 {
 417         pinctrl-names = "default";
 418         pinctrl-0 = <&main_i2c0_pins_default>;
 419         clock-frequency = <400000>;
 420
 421         exp1: gpio@21 {
 422                 compatible = "ti,tca6416";
 423                 reg = <0x21>;
 424                 gpio-controller;
 425                 #gpio-cells = <2>;
 426                 gpio-line-names = " ", " ", " ", " ", " ",
 427                                   "BOARDID_EEPROM_WP", "CAN_STB", " ",
 428                                   "GPIO_uSD_PWR_EN", " ", "IO_EXP_PCIe1_M.2_RTSz",
 429                                   "IO_EXP_MCU_RGMII_RST#", " ", " ", " ", " ";
 430         };
 431 };
 432
 433 &main_i2c4 {
 434         status = "okay";
 435         pinctrl-names = "default";
 436         pinctrl-0 = <&main_i2c4_pins_default>;
 437         clock-frequency = <400000>;
 438 };
 439
 440 &mcu_i2c0 {
 441         status = "okay";
 442         pinctrl-names = "default";
 443         pinctrl-0 = <&mcu_i2c0_pins_default>;
 444         clock-frequency = <400000>;
 445 };
 446
 447 &mcu_i2c1 {
 448         status = "okay";
 449         pinctrl-names = "default";
 450         pinctrl-0 = <&mcu_i2c1_pins_default>;
 451         /* i2c1 is used for DVI DDC, so we need to use 100kHz */
 452         clock-frequency = <100000>;
 453
 454         exp2: gpio@20 {
 455                 compatible = "ti,tca6408";
 456                 reg = <0x20>;
 457                 gpio-controller;
 458                 #gpio-cells = <2>;
 459                 gpio-line-names = "HDMI_PDn","HDMI_LS_OE",
 460                                   "DP0_3V3_EN","eDP_ENABLE";
 461         };
 462 };
 463
 464 &main_sdhci1 {
 465         /* SD card */
 466         status = "okay";
 467         pinctrl-0 = <&main_mmc1_pins_default>;
 468         pinctrl-names = "default";
 469         disable-wp;
 470         vmmc-supply = <&vdd_mmc1>;
 471         vqmmc-supply = <&vdd_sd_dv>;
 472 };
 473
 474 &mcu_cpsw {
 475         pinctrl-names = "default";
 476         pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
 477 };
 478
 479 &davinci_mdio {
 480         phy0: ethernet-phy@0 {
 481                 reg = <0>;
 482                 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 483                 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 484                 ti,min-output-impedance;
 485         };
 486 };
 487
 488 &cpsw_port1 {
 489         phy-mode = "rgmii-rxid";
 490         phy-handle = <&phy0>;
 491 };
 492
 493 &mcu_mcan0 {
 494         status = "okay";
 495         pinctrl-names = "default";
 496         pinctrl-0 = <&mcu_mcan0_pins_default>;
 497         phys = <&transceiver1>;
 498 };
 499
 500 &mcu_mcan1 {
 501         status = "okay";
 502         pinctrl-names = "default";
 503         pinctrl-0 = <&mcu_mcan1_pins_default>;
 504         phys = <&transceiver2>;
 505 };
 506
 507 &main_mcan6 {
 508         status = "okay";
 509         pinctrl-names = "default";
 510         pinctrl-0 = <&main_mcan6_pins_default>;
 511         phys = <&transceiver3>;
 512 };
 513
 514 &main_mcan7 {
 515         status = "okay";
 516         pinctrl-names = "default";
 517         pinctrl-0 = <&main_mcan7_pins_default>;
 518         phys = <&transceiver4>;
 519 };
 520
 521 &dss {
 522         status = "okay";
 523         pinctrl-names = "default";
 524         pinctrl-0 = <&dss_vout0_pins_default>;
 525         /*
 526          * These clock assignments are chosen to enable the following outputs:
 527          *
 528          * VP0 - DisplayPort SST
 529          * VP1 - DPI0
 530          * VP2 - DSI
 531          * VP3 - DPI1
 532          */
 533         assigned-clocks = <&k3_clks 158 2>,
 534                           <&k3_clks 158 5>,
 535                           <&k3_clks 158 14>,
 536                           <&k3_clks 158 18>;
 537         assigned-clock-parents = <&k3_clks 158 3>,
 538                                  <&k3_clks 158 7>,
 539                                  <&k3_clks 158 16>,
 540                                  <&k3_clks 158 22>;
 541 };
 542
 543 &dss_ports {
 544         #address-cells = <1>;
 545         #size-cells = <0>;
 546
 547         /* HDMI */
 548         port@1 {
 549                 reg = <1>;
 550
 551                 dpi_out0: endpoint {
 552                         remote-endpoint = <&tfp410_in>;
 553                 };
 554         };
 555 };
 556
 557 &serdes_ln_ctrl {
 558         idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_PCIE1_LANE1>,
 559                       <J721S2_SERDES0_LANE2_USB_SWAP>, <J721S2_SERDES0_LANE3_USB>;
 560 };
 561
 562 &serdes_refclk {
 563         clock-frequency = <100000000>;
 564 };
 565
 566 &serdes0 {
 567         status = "okay";
 568
 569         serdes0_pcie_link: phy@0 {
 570                 reg = <0>;
 571                 cdns,num-lanes = <2>;
 572                 #phy-cells = <0>;
 573                 cdns,phy-type = <PHY_TYPE_PCIE>;
 574                 resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
 575         };
 576
 577         serdes0_usb_link: phy@2 {
 578                 status = "okay";
 579                 reg = <2>;
 580                 cdns,num-lanes = <1>;
 581                 #phy-cells = <0>;
 582                 cdns,phy-type = <PHY_TYPE_USB3>;
 583                 resets = <&serdes_wiz0 3>;
 584         };
 585 };
 586
 587 &pcie1_rc {
 588         status = "okay";
 589         reset-gpios = <&exp1 10 GPIO_ACTIVE_HIGH>;
 590         phys = <&serdes0_pcie_link>;
 591         phy-names = "pcie-phy";
 592         num-lanes = <2>;
 593 };
 594
 595 &usb_serdes_mux {
 596         idle-states = <0>; /* USB0 to SERDES lane 2 */
 597 };
 598
 599 &usbss0 {
 600         status = "okay";
 601         pinctrl-0 = <&main_usbss0_pins_default>;
 602         pinctrl-names = "default";
 603         ti,vbus-divider;
 604 };
 605
 606 &usb0 {
 607         dr_mode = "host";
 608         maximum-speed = "super-speed";
 609         phys = <&serdes0_usb_link>;
 610         phy-names = "cdns3,usb3-phy";
 611 };