arch/arm64/boot/dts/ti/k3-am62a-main.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for AM62A SoC Family Main Domain peripherals
   4  *
   5  * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
   6  */
   7
   8 &cbass_main {
   9         oc_sram: sram@70000000 {
  10                 compatible = "mmio-sram";
  11                 reg = <0x00 0x70000000 0x00 0x10000>;
  12                 #address-cells = <1>;
  13                 #size-cells = <1>;
  14                 ranges = <0x0 0x00 0x70000000 0x10000>;
  15         };
  16
  17         gic500: interrupt-controller@1800000 {
  18                 compatible = "arm,gic-v3";
  19                 reg = <0x00 0x01800000 0x00 0x10000>,   /* GICD */
  20                       <0x00 0x01880000 0x00 0xc0000>,   /* GICR */
  21                       <0x00 0x01880000 0x00 0xc0000>,   /* GICR */
  22                       <0x01 0x00000000 0x00 0x2000>,    /* GICC */
  23                       <0x01 0x00010000 0x00 0x1000>,    /* GICH */
  24                       <0x01 0x00020000 0x00 0x2000>;    /* GICV */
  25                 #address-cells = <2>;
  26                 #size-cells = <2>;
  27                 ranges;
  28                 #interrupt-cells = <3>;
  29                 interrupt-controller;
  30                 /*
  31                  * vcpumntirq:
  32                  * virtual CPU interface maintenance interrupt
  33                  */
  34                 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
  35
  36                 gic_its: msi-controller@1820000 {
  37                         compatible = "arm,gic-v3-its";
  38                         reg = <0x00 0x01820000 0x00 0x10000>;
  39                         socionext,synquacer-pre-its = <0x1000000 0x400000>;
  40                         msi-controller;
  41                         #msi-cells = <1>;
  42                 };
  43         };
  44
  45         main_conf: syscon@100000 {
  46                 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
  47                 reg = <0x00 0x00100000 0x00 0x20000>;
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50                 ranges = <0x00 0x00 0x00100000 0x20000>;
  51
  52                 phy_gmii_sel: phy@4044 {
  53                         compatible = "ti,am654-phy-gmii-sel";
  54                         reg = <0x4044 0x8>;
  55                         #phy-cells = <1>;
  56                 };
  57
  58                 epwm_tbclk: clock-controller@4130 {
  59                         compatible = "ti,am62-epwm-tbclk";
  60                         reg = <0x4130 0x4>;
  61                         #clock-cells = <1>;
  62                 };
  63         };
  64
  65         dmss: bus@48000000 {
  66                 compatible = "simple-bus";
  67                 #address-cells = <2>;
  68                 #size-cells = <2>;
  69                 dma-ranges;
  70                 ranges = <0x00 0x48000000 0x00 0x48000000 0x00 0x06000000>;
  71
  72                 ti,sci-dev-id = <25>;
  73
  74                 secure_proxy_main: mailbox@4d000000 {
  75                         compatible = "ti,am654-secure-proxy";
  76                         reg = <0x00 0x4d000000 0x00 0x80000>,
  77                               <0x00 0x4a600000 0x00 0x80000>,
  78                               <0x00 0x4a400000 0x00 0x80000>;
  79                         reg-names = "target_data", "rt", "scfg";
  80                         #mbox-cells = <1>;
  81                         interrupt-names = "rx_012";
  82                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
  83                 };
  84
  85                 inta_main_dmss: interrupt-controller@48000000 {
  86                         compatible = "ti,sci-inta";
  87                         reg = <0x00 0x48000000 0x00 0x100000>;
  88                         #interrupt-cells = <0>;
  89                         interrupt-controller;
  90                         interrupt-parent = <&gic500>;
  91                         msi-controller;
  92                         ti,sci = <&dmsc>;
  93                         ti,sci-dev-id = <28>;
  94                         ti,interrupt-ranges = <6 70 34>;
  95                         ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
  96                 };
  97
  98                 main_bcdma: dma-controller@485c0100 {
  99                         compatible = "ti,am64-dmss-bcdma";
 100                         reg = <0x00 0x485c0100 0x00 0x100>,
 101                               <0x00 0x4c000000 0x00 0x20000>,
 102                               <0x00 0x4a820000 0x00 0x20000>,
 103                               <0x00 0x4aa40000 0x00 0x20000>,
 104                               <0x00 0x4bc00000 0x00 0x100000>;
 105                         reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
 106                         msi-parent = <&inta_main_dmss>;
 107                         #dma-cells = <3>;
 108                         ti,sci = <&dmsc>;
 109                         ti,sci-dev-id = <26>;
 110                         ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
 111                         ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
 112                         ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
 113                 };
 114
 115                 main_pktdma: dma-controller@485c0000 {
 116                         compatible = "ti,am64-dmss-pktdma";
 117                         reg = <0x00 0x485c0000 0x00 0x100>,
 118                               <0x00 0x4a800000 0x00 0x20000>,
 119                               <0x00 0x4aa00000 0x00 0x40000>,
 120                               <0x00 0x4b800000 0x00 0x400000>;
 121                         reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
 122                         msi-parent = <&inta_main_dmss>;
 123                         #dma-cells = <2>;
 124                         ti,sci = <&dmsc>;
 125                         ti,sci-dev-id = <30>;
 126                         ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
 127                                                 <0x24>, /* CPSW_TX_CHAN */
 128                                                 <0x25>, /* SAUL_TX_0_CHAN */
 129                                                 <0x26>; /* SAUL_TX_1_CHAN */
 130                         ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
 131                                                 <0x11>, /* RING_CPSW_TX_CHAN */
 132                                                 <0x12>, /* RING_SAUL_TX_0_CHAN */
 133                                                 <0x13>; /* RING_SAUL_TX_1_CHAN */
 134                         ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
 135                                                 <0x2b>, /* CPSW_RX_CHAN */
 136                                                 <0x2d>, /* SAUL_RX_0_CHAN */
 137                                                 <0x2f>, /* SAUL_RX_1_CHAN */
 138                                                 <0x31>, /* SAUL_RX_2_CHAN */
 139                                                 <0x33>; /* SAUL_RX_3_CHAN */
 140                         ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
 141                                                 <0x2c>, /* FLOW_CPSW_RX_CHAN */
 142                                                 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
 143                                                 <0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
 144                 };
 145         };
 146
 147         dmsc: system-controller@44043000 {
 148                 compatible = "ti,k2g-sci";
 149                 reg = <0x00 0x44043000 0x00 0xfe0>;
 150                 reg-names = "debug_messages";
 151                 ti,host-id = <12>;
 152                 mbox-names = "rx", "tx";
 153                 mboxes = <&secure_proxy_main 12>,
 154                          <&secure_proxy_main 13>;
 155
 156                 k3_pds: power-controller {
 157                         compatible = "ti,sci-pm-domain";
 158                         #power-domain-cells = <2>;
 159                 };
 160
 161                 k3_clks: clock-controller {
 162                         compatible = "ti,k2g-sci-clk";
 163                         #clock-cells = <2>;
 164                 };
 165
 166                 k3_reset: reset-controller {
 167                         compatible = "ti,sci-reset";
 168                         #reset-cells = <2>;
 169                 };
 170         };
 171
 172         secure_proxy_sa3: mailbox@43600000 {
 173                 compatible = "ti,am654-secure-proxy";
 174                 #mbox-cells = <1>;
 175                 reg-names = "target_data", "rt", "scfg";
 176                 reg = <0x00 0x43600000 0x00 0x10000>,
 177                       <0x00 0x44880000 0x00 0x20000>,
 178                       <0x00 0x44860000 0x00 0x20000>;
 179                 /*
 180                  * Marked Disabled:
 181                  * Node is incomplete as it is meant for bootloaders and
 182                  * firmware on non-MPU processors
 183                  */
 184                 status = "disabled";
 185         };
 186
 187         main_pmx0: pinctrl@f4000 {
 188                 compatible = "pinctrl-single";
 189                 reg = <0x00 0xf4000 0x00 0x2ac>;
 190                 #pinctrl-cells = <1>;
 191                 pinctrl-single,register-width = <32>;
 192                 pinctrl-single,function-mask = <0xffffffff>;
 193         };
 194
 195         main_timer0: timer@2400000 {
 196                 compatible = "ti,am654-timer";
 197                 reg = <0x00 0x2400000 0x00 0x400>;
 198                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 199                 clocks = <&k3_clks 36 2>;
 200                 clock-names = "fck";
 201                 assigned-clocks = <&k3_clks 36 2>;
 202                 assigned-clock-parents = <&k3_clks 36 3>;
 203                 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
 204                 ti,timer-pwm;
 205         };
 206
 207         main_timer1: timer@2410000 {
 208                 compatible = "ti,am654-timer";
 209                 reg = <0x00 0x2410000 0x00 0x400>;
 210                 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 211                 clocks = <&k3_clks 37 2>;
 212                 clock-names = "fck";
 213                 assigned-clocks = <&k3_clks 37 2>;
 214                 assigned-clock-parents = <&k3_clks 37 3>;
 215                 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
 216                 ti,timer-pwm;
 217         };
 218
 219         main_timer2: timer@2420000 {
 220                 compatible = "ti,am654-timer";
 221                 reg = <0x00 0x2420000 0x00 0x400>;
 222                 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
 223                 clocks = <&k3_clks 38 2>;
 224                 clock-names = "fck";
 225                 assigned-clocks = <&k3_clks 38 2>;
 226                 assigned-clock-parents = <&k3_clks 38 3>;
 227                 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
 228                 ti,timer-pwm;
 229         };
 230
 231         main_timer3: timer@2430000 {
 232                 compatible = "ti,am654-timer";
 233                 reg = <0x00 0x2430000 0x00 0x400>;
 234                 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
 235                 clocks = <&k3_clks 39 2>;
 236                 clock-names = "fck";
 237                 assigned-clocks = <&k3_clks 39 2>;
 238                 assigned-clock-parents = <&k3_clks 39 3>;
 239                 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
 240                 ti,timer-pwm;
 241         };
 242
 243         main_timer4: timer@2440000 {
 244                 compatible = "ti,am654-timer";
 245                 reg = <0x00 0x2440000 0x00 0x400>;
 246                 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
 247                 clocks = <&k3_clks 40 2>;
 248                 clock-names = "fck";
 249                 assigned-clocks = <&k3_clks 40 2>;
 250                 assigned-clock-parents = <&k3_clks 40 3>;
 251                 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
 252                 ti,timer-pwm;
 253         };
 254
 255         main_timer5: timer@2450000 {
 256                 compatible = "ti,am654-timer";
 257                 reg = <0x00 0x2450000 0x00 0x400>;
 258                 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
 259                 clocks = <&k3_clks 41 2>;
 260                 clock-names = "fck";
 261                 assigned-clocks = <&k3_clks 41 2>;
 262                 assigned-clock-parents = <&k3_clks 41 3>;
 263                 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
 264                 ti,timer-pwm;
 265         };
 266
 267         main_timer6: timer@2460000 {
 268                 compatible = "ti,am654-timer";
 269                 reg = <0x00 0x2460000 0x00 0x400>;
 270                 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 271                 clocks = <&k3_clks 42 2>;
 272                 clock-names = "fck";
 273                 assigned-clocks = <&k3_clks 42 2>;
 274                 assigned-clock-parents = <&k3_clks 42 3>;
 275                 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
 276                 ti,timer-pwm;
 277         };
 278
 279         main_timer7: timer@2470000 {
 280                 compatible = "ti,am654-timer";
 281                 reg = <0x00 0x2470000 0x00 0x400>;
 282                 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 283                 clocks = <&k3_clks 43 2>;
 284                 clock-names = "fck";
 285                 assigned-clocks = <&k3_clks 43 2>;
 286                 assigned-clock-parents = <&k3_clks 43 3>;
 287                 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
 288                 ti,timer-pwm;
 289         };
 290
 291         main_uart0: serial@2800000 {
 292                 compatible = "ti,am64-uart", "ti,am654-uart";
 293                 reg = <0x00 0x02800000 0x00 0x100>;
 294                 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
 295                 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
 296                 clocks = <&k3_clks 146 0>;
 297                 clock-names = "fclk";
 298                 status = "disabled";
 299         };
 300
 301         main_uart1: serial@2810000 {
 302                 compatible = "ti,am64-uart", "ti,am654-uart";
 303                 reg = <0x00 0x02810000 0x00 0x100>;
 304                 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
 305                 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
 306                 clocks = <&k3_clks 152 0>;
 307                 clock-names = "fclk";
 308                 status = "disabled";
 309         };
 310
 311         main_uart2: serial@2820000 {
 312                 compatible = "ti,am64-uart", "ti,am654-uart";
 313                 reg = <0x00 0x02820000 0x00 0x100>;
 314                 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
 315                 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
 316                 clocks = <&k3_clks 153 0>;
 317                 clock-names = "fclk";
 318                 status = "disabled";
 319         };
 320
 321         main_uart3: serial@2830000 {
 322                 compatible = "ti,am64-uart", "ti,am654-uart";
 323                 reg = <0x00 0x02830000 0x00 0x100>;
 324                 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
 325                 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
 326                 clocks = <&k3_clks 154 0>;
 327                 clock-names = "fclk";
 328                 status = "disabled";
 329         };
 330
 331         main_uart4: serial@2840000 {
 332                 compatible = "ti,am64-uart", "ti,am654-uart";
 333                 reg = <0x00 0x02840000 0x00 0x100>;
 334                 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
 335                 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
 336                 clocks = <&k3_clks 155 0>;
 337                 clock-names = "fclk";
 338                 status = "disabled";
 339         };
 340
 341         main_uart5: serial@2850000 {
 342                 compatible = "ti,am64-uart", "ti,am654-uart";
 343                 reg = <0x00 0x02850000 0x00 0x100>;
 344                 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
 345                 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
 346                 clocks = <&k3_clks 156 0>;
 347                 clock-names = "fclk";
 348                 status = "disabled";
 349         };
 350
 351         main_uart6: serial@2860000 {
 352                 compatible = "ti,am64-uart", "ti,am654-uart";
 353                 reg = <0x00 0x02860000 0x00 0x100>;
 354                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 355                 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
 356                 clocks = <&k3_clks 158 0>;
 357                 clock-names = "fclk";
 358                 status = "disabled";
 359         };
 360
 361         main_i2c0: i2c@20000000 {
 362                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
 363                 reg = <0x00 0x20000000 0x00 0x100>;
 364                 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 365                 #address-cells = <1>;
 366                 #size-cells = <0>;
 367                 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
 368                 clocks = <&k3_clks 102 2>;
 369                 clock-names = "fck";
 370                 status = "disabled";
 371         };
 372
 373         main_i2c1: i2c@20010000 {
 374                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
 375                 reg = <0x00 0x20010000 0x00 0x100>;
 376                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 377                 #address-cells = <1>;
 378                 #size-cells = <0>;
 379                 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
 380                 clocks = <&k3_clks 103 2>;
 381                 clock-names = "fck";
 382                 status = "disabled";
 383         };
 384
 385         main_i2c2: i2c@20020000 {
 386                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
 387                 reg = <0x00 0x20020000 0x00 0x100>;
 388                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 389                 #address-cells = <1>;
 390                 #size-cells = <0>;
 391                 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
 392                 clocks = <&k3_clks 104 2>;
 393                 clock-names = "fck";
 394                 status = "disabled";
 395         };
 396
 397         main_i2c3: i2c@20030000 {
 398                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
 399                 reg = <0x00 0x20030000 0x00 0x100>;
 400                 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 401                 #address-cells = <1>;
 402                 #size-cells = <0>;
 403                 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
 404                 clocks = <&k3_clks 105 2>;
 405                 clock-names = "fck";
 406                 status = "disabled";
 407         };
 408
 409         main_spi0: spi@20100000 {
 410                 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
 411                 reg = <0x00 0x20100000 0x00 0x400>;
 412                 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
 413                 #address-cells = <1>;
 414                 #size-cells = <0>;
 415                 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
 416                 clocks = <&k3_clks 141 0>;
 417                 status = "disabled";
 418         };
 419
 420         main_spi1: spi@20110000 {
 421                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
 422                 reg = <0x00 0x20110000 0x00 0x400>;
 423                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 424                 #address-cells = <1>;
 425                 #size-cells = <0>;
 426                 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
 427                 clocks = <&k3_clks 142 0>;
 428                 status = "disabled";
 429         };
 430
 431         main_spi2: spi@20120000 {
 432                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
 433                 reg = <0x00 0x20120000 0x00 0x400>;
 434                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 435                 #address-cells = <1>;
 436                 #size-cells = <0>;
 437                 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
 438                 clocks = <&k3_clks 143 0>;
 439                 status = "disabled";
 440         };
 441
 442         main_gpio_intr: interrupt-controller@a00000 {
 443                 compatible = "ti,sci-intr";
 444                 reg = <0x00 0x00a00000 0x00 0x800>;
 445                 ti,intr-trigger-type = <1>;
 446                 interrupt-controller;
 447                 interrupt-parent = <&gic500>;
 448                 #interrupt-cells = <1>;
 449                 ti,sci = <&dmsc>;
 450                 ti,sci-dev-id = <3>;
 451                 ti,interrupt-ranges = <0 32 16>;
 452                 status = "disabled";
 453         };
 454
 455         main_gpio0: gpio@600000 {
 456                 compatible = "ti,am64-gpio", "ti,keystone-gpio";
 457                 reg = <0x00 0x00600000 0x0 0x100>;
 458                 gpio-controller;
 459                 #gpio-cells = <2>;
 460                 interrupt-parent = <&main_gpio_intr>;
 461                 interrupts = <190>, <191>, <192>,
 462                              <193>, <194>, <195>;
 463                 interrupt-controller;
 464                 #interrupt-cells = <2>;
 465                 ti,ngpio = <87>;
 466                 ti,davinci-gpio-unbanked = <0>;
 467                 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
 468                 clocks = <&k3_clks 77 0>;
 469                 clock-names = "gpio";
 470                 status = "disabled";
 471         };
 472
 473         main_gpio1: gpio@601000 {
 474                 compatible = "ti,am64-gpio", "ti,keystone-gpio";
 475                 reg = <0x00 0x00601000 0x0 0x100>;
 476                 gpio-controller;
 477                 #gpio-cells = <2>;
 478                 interrupt-parent = <&main_gpio_intr>;
 479                 interrupts = <180>, <181>, <182>,
 480                              <183>, <184>, <185>;
 481                 interrupt-controller;
 482                 #interrupt-cells = <2>;
 483                 ti,ngpio = <88>;
 484                 ti,davinci-gpio-unbanked = <0>;
 485                 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
 486                 clocks = <&k3_clks 78 0>;
 487                 clock-names = "gpio";
 488                 status = "disabled";
 489         };
 490
 491         sdhci1: mmc@fa00000 {
 492                 compatible = "ti,am62-sdhci";
 493                 reg = <0x00 0xfa00000 0x00 0x260>, <0x00 0xfa08000 0x00 0x134>;
 494                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 495                 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
 496                 clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
 497                 clock-names = "clk_ahb", "clk_xin";
 498                 ti,trm-icp = <0x2>;
 499                 ti,otap-del-sel-legacy = <0x0>;
 500                 ti,otap-del-sel-sd-hs = <0x0>;
 501                 ti,otap-del-sel-sdr12 = <0xf>;
 502                 ti,otap-del-sel-sdr25 = <0xf>;
 503                 ti,otap-del-sel-sdr50 = <0xc>;
 504                 ti,otap-del-sel-sdr104 = <0x6>;
 505                 ti,otap-del-sel-ddr50 = <0x9>;
 506                 ti,itap-del-sel-legacy = <0x0>;
 507                 ti,itap-del-sel-sd-hs = <0x0>;
 508                 ti,itap-del-sel-sdr12 = <0x0>;
 509                 ti,itap-del-sel-sdr25 = <0x0>;
 510                 ti,clkbuf-sel = <0x7>;
 511                 bus-width = <4>;
 512                 no-1-8-v;
 513                 status = "disabled";
 514         };
 515
 516         usbss0: dwc3-usb@f900000 {
 517                 compatible = "ti,am62-usb";
 518                 reg = <0x00 0x0f900000 0x00 0x800>;
 519                 clocks = <&k3_clks 161 3>;
 520                 clock-names = "ref";
 521                 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
 522                 #address-cells = <2>;
 523                 #size-cells = <2>;
 524                 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
 525                 ranges;
 526                 status = "disabled";
 527
 528                 usb0: usb@31000000 {
 529                         compatible = "snps,dwc3";
 530                         reg = <0x00 0x31000000 0x00 0x50000>;
 531                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
 532                                      <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
 533                         interrupt-names = "host", "peripheral";
 534                         maximum-speed = "high-speed";
 535                         dr_mode = "otg";
 536                 };
 537         };
 538
 539         usbss1: dwc3-usb@f910000 {
 540                 compatible = "ti,am62-usb";
 541                 reg = <0x00 0x0f910000 0x00 0x800>;
 542                 clocks = <&k3_clks 162 3>;
 543                 clock-names = "ref";
 544                 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
 545                 #address-cells = <2>;
 546                 #size-cells = <2>;
 547                 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
 548                 ranges;
 549                 status = "disabled";
 550
 551                 usb1: usb@31100000 {
 552                         compatible = "snps,dwc3";
 553                         reg = <0x00 0x31100000 0x00 0x50000>;
 554                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
 555                                      <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
 556                         interrupt-names = "host", "peripheral";
 557                         maximum-speed = "high-speed";
 558                         dr_mode = "otg";
 559                 };
 560         };
 561
 562         fss: bus@fc00000 {
 563                 compatible = "simple-bus";
 564                 reg = <0x00 0x0fc00000 0x00 0x70000>;
 565                 #address-cells = <2>;
 566                 #size-cells = <2>;
 567                 ranges;
 568                 status = "disabled";
 569
 570                 ospi0: spi@fc40000 {
 571                         compatible = "ti,am654-ospi", "cdns,qspi-nor";
 572                         reg = <0x00 0x0fc40000 0x00 0x100>,
 573                               <0x05 0x00000000 0x01 0x00000000>;
 574                         interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
 575                         cdns,fifo-depth = <256>;
 576                         cdns,fifo-width = <4>;
 577                         cdns,trigger-address = <0x0>;
 578                         clocks = <&k3_clks 75 7>;
 579                         assigned-clocks = <&k3_clks 75 7>;
 580                         assigned-clock-parents = <&k3_clks 75 8>;
 581                         assigned-clock-rates = <166666666>;
 582                         power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
 583                         #address-cells = <1>;
 584                         #size-cells = <0>;
 585                 };
 586         };
 587
 588         cpsw3g: ethernet@8000000 {
 589                 compatible = "ti,am642-cpsw-nuss";
 590                 #address-cells = <2>;
 591                 #size-cells = <2>;
 592                 reg = <0x0 0x8000000 0x0 0x200000>;
 593                 reg-names = "cpsw_nuss";
 594                 ranges = <0x0 0x0 0x0 0x8000000 0x0 0x200000>;
 595                 clocks = <&k3_clks 13 0>;
 596                 assigned-clocks = <&k3_clks 13 3>;
 597                 assigned-clock-parents = <&k3_clks 13 11>;
 598                 clock-names = "fck";
 599                 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
 600                 status = "disabled";
 601
 602                 dmas = <&main_pktdma 0xc600 15>,
 603                        <&main_pktdma 0xc601 15>,
 604                        <&main_pktdma 0xc602 15>,
 605                        <&main_pktdma 0xc603 15>,
 606                        <&main_pktdma 0xc604 15>,
 607                        <&main_pktdma 0xc605 15>,
 608                        <&main_pktdma 0xc606 15>,
 609                        <&main_pktdma 0xc607 15>,
 610                        <&main_pktdma 0x4600 15>;
 611                 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
 612                             "tx7", "rx";
 613
 614                 ethernet-ports {
 615                         #address-cells = <1>;
 616                         #size-cells = <0>;
 617
 618                         cpsw_port1: port@1 {
 619                                 reg = <1>;
 620                                 ti,mac-only;
 621                                 label = "port1";
 622                                 phys = <&phy_gmii_sel 1>;
 623                                 mac-address = [00 00 00 00 00 00];
 624                                 ti,syscon-efuse = <&wkup_conf 0x200>;
 625                         };
 626
 627                         cpsw_port2: port@2 {
 628                                 reg = <2>;
 629                                 ti,mac-only;
 630                                 label = "port2";
 631                                 phys = <&phy_gmii_sel 2>;
 632                                 mac-address = [00 00 00 00 00 00];
 633                         };
 634                 };
 635
 636                 cpsw3g_mdio: mdio@f00 {
 637                         compatible = "ti,cpsw-mdio","ti,davinci_mdio";
 638                         reg = <0x0 0xf00 0x0 0x100>;
 639                         #address-cells = <1>;
 640                         #size-cells = <0>;
 641                         clocks = <&k3_clks 13 0>;
 642                         clock-names = "fck";
 643                         bus_freq = <1000000>;
 644                 };
 645
 646                 cpts@3d000 {
 647                         compatible = "ti,j721e-cpts";
 648                         reg = <0x0 0x3d000 0x0 0x400>;
 649                         clocks = <&k3_clks 13 3>;
 650                         clock-names = "cpts";
 651                         interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 652                         interrupt-names = "cpts";
 653                         ti,cpts-ext-ts-inputs = <4>;
 654                         ti,cpts-periodic-outputs = <2>;
 655                 };
 656         };
 657
 658         hwspinlock: spinlock@2a000000 {
 659                 compatible = "ti,am64-hwspinlock";
 660                 reg = <0x00 0x2a000000 0x00 0x1000>;
 661                 #hwlock-cells = <1>;
 662         };
 663
 664         mailbox0_cluster0: mailbox@29000000 {
 665                 compatible = "ti,am64-mailbox";
 666                 reg = <0x00 0x29000000 0x00 0x200>;
 667                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 668                 #mbox-cells = <1>;
 669                 ti,mbox-num-users = <4>;
 670                 ti,mbox-num-fifos = <16>;
 671         };
 672
 673         mailbox0_cluster1: mailbox@29010000 {
 674                 compatible = "ti,am64-mailbox";
 675                 reg = <0x00 0x29010000 0x00 0x200>;
 676                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 677                 #mbox-cells = <1>;
 678                 ti,mbox-num-users = <4>;
 679                 ti,mbox-num-fifos = <16>;
 680         };
 681
 682         mailbox0_cluster2: mailbox@29020000 {
 683                 compatible = "ti,am64-mailbox";
 684                 reg = <0x00 0x29020000 0x00 0x200>;
 685                 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
 686                 #mbox-cells = <1>;
 687                 ti,mbox-num-users = <4>;
 688                 ti,mbox-num-fifos = <16>;
 689         };
 690
 691         mailbox0_cluster3: mailbox@29030000 {
 692                 compatible = "ti,am64-mailbox";
 693                 reg = <0x00 0x29030000 0x00 0x200>;
 694                 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 695                 #mbox-cells = <1>;
 696                 ti,mbox-num-users = <4>;
 697                 ti,mbox-num-fifos = <16>;
 698         };
 699
 700         main_mcan0: can@20701000 {
 701                 compatible = "bosch,m_can";
 702                 reg = <0x00 0x20701000 0x00 0x200>,
 703                       <0x00 0x20708000 0x00 0x8000>;
 704                 reg-names = "m_can", "message_ram";
 705                 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
 706                 clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
 707                 clock-names = "hclk", "cclk";
 708                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
 709                              <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 710                 interrupt-names = "int0", "int1";
 711                 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
 712                 status = "disabled";
 713         };
 714
 715         main_rti0: watchdog@e000000 {
 716                 compatible = "ti,j7-rti-wdt";
 717                 reg = <0x00 0x0e000000 0x00 0x100>;
 718                 clocks = <&k3_clks 125 0>;
 719                 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
 720                 assigned-clocks = <&k3_clks 125 0>;
 721                 assigned-clock-parents = <&k3_clks 125 2>;
 722         };
 723
 724         main_rti1: watchdog@e010000 {
 725                 compatible = "ti,j7-rti-wdt";
 726                 reg = <0x00 0x0e010000 0x00 0x100>;
 727                 clocks = <&k3_clks 126 0>;
 728                 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
 729                 assigned-clocks = <&k3_clks 126 0>;
 730                 assigned-clock-parents = <&k3_clks 126 2>;
 731         };
 732
 733         main_rti2: watchdog@e020000 {
 734                 compatible = "ti,j7-rti-wdt";
 735                 reg = <0x00 0x0e020000 0x00 0x100>;
 736                 clocks = <&k3_clks 127 0>;
 737                 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
 738                 assigned-clocks = <&k3_clks 127 0>;
 739                 assigned-clock-parents = <&k3_clks 127 2>;
 740         };
 741
 742         main_rti3: watchdog@e030000 {
 743                 compatible = "ti,j7-rti-wdt";
 744                 reg = <0x00 0x0e030000 0x00 0x100>;
 745                 clocks = <&k3_clks 128 0>;
 746                 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
 747                 assigned-clocks = <&k3_clks 128 0>;
 748                 assigned-clock-parents = <&k3_clks 128 2>;
 749         };
 750
 751         main_rti4: watchdog@e040000 {
 752                 compatible = "ti,j7-rti-wdt";
 753                 reg = <0x00 0x0e040000 0x00 0x100>;
 754                 clocks = <&k3_clks 205 0>;
 755                 power-domains = <&k3_pds 205 TI_SCI_PD_EXCLUSIVE>;
 756                 assigned-clocks = <&k3_clks 205 0>;
 757                 assigned-clock-parents = <&k3_clks 205 2>;
 758         };
 759
 760         epwm0: pwm@23000000 {
 761                 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
 762                 #pwm-cells = <3>;
 763                 reg = <0x00 0x23000000 0x00 0x100>;
 764                 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
 765                 clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
 766                 clock-names = "tbclk", "fck";
 767                 status = "disabled";
 768         };
 769
 770         epwm1: pwm@23010000 {
 771                 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
 772                 #pwm-cells = <3>;
 773                 reg = <0x00 0x23010000 0x00 0x100>;
 774                 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
 775                 clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
 776                 clock-names = "tbclk", "fck";
 777                 status = "disabled";
 778         };
 779
 780         epwm2: pwm@23020000 {
 781                 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
 782                 #pwm-cells = <3>;
 783                 reg = <0x00 0x23020000 0x00 0x100>;
 784                 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
 785                 clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
 786                 clock-names = "tbclk", "fck";
 787                 status = "disabled";
 788         };
 789
 790         ecap0: pwm@23100000 {
 791                 compatible = "ti,am3352-ecap";
 792                 #pwm-cells = <3>;
 793                 reg = <0x00 0x23100000 0x00 0x100>;
 794                 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
 795                 clocks = <&k3_clks 51 0>;
 796                 clock-names = "fck";
 797                 status = "disabled";
 798         };
 799
 800         ecap1: pwm@23110000 {
 801                 compatible = "ti,am3352-ecap";
 802                 #pwm-cells = <3>;
 803                 reg = <0x00 0x23110000 0x00 0x100>;
 804                 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
 805                 clocks = <&k3_clks 52 0>;
 806                 clock-names = "fck";
 807                 status = "disabled";
 808         };
 809
 810         ecap2: pwm@23120000 {
 811                 compatible = "ti,am3352-ecap";
 812                 #pwm-cells = <3>;
 813                 reg = <0x00 0x23120000 0x00 0x100>;
 814                 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
 815                 clocks = <&k3_clks 53 0>;
 816                 clock-names = "fck";
 817                 status = "disabled";
 818         };
 819
 820         mcasp0: audio-controller@2b00000 {
 821                 compatible = "ti,am33xx-mcasp-audio";
 822                 reg = <0x00 0x02b00000 0x00 0x2000>,
 823                       <0x00 0x02b08000 0x00 0x400>;
 824                 reg-names = "mpu", "dat";
 825                 interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
 826                              <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
 827                 interrupt-names = "tx", "rx";
 828
 829                 dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
 830                 dma-names = "tx", "rx";
 831
 832                 clocks = <&k3_clks 190 0>;
 833                 clock-names = "fck";
 834                 assigned-clocks = <&k3_clks 190 0>;
 835                 assigned-clock-parents = <&k3_clks 190 2>;
 836                 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
 837                 status = "disabled";
 838         };
 839
 840         mcasp1: audio-controller@2b10000 {
 841                 compatible = "ti,am33xx-mcasp-audio";
 842                 reg = <0x00 0x02b10000 0x00 0x2000>,
 843                       <0x00 0x02b18000 0x00 0x400>;
 844                 reg-names = "mpu", "dat";
 845                 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
 846                              <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
 847                 interrupt-names = "tx", "rx";
 848
 849                 dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
 850                 dma-names = "tx", "rx";
 851
 852                 clocks = <&k3_clks 191 0>;
 853                 clock-names = "fck";
 854                 assigned-clocks = <&k3_clks 191 0>;
 855                 assigned-clock-parents = <&k3_clks 191 2>;
 856                 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
 857                 status = "disabled";
 858         };
 859
 860         mcasp2: audio-controller@2b20000 {
 861                 compatible = "ti,am33xx-mcasp-audio";
 862                 reg = <0x00 0x02b20000 0x00 0x2000>,
 863                       <0x00 0x02b28000 0x00 0x400>;
 864                 reg-names = "mpu", "dat";
 865                 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
 866                              <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
 867                 interrupt-names = "tx", "rx";
 868
 869                 dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
 870                 dma-names = "tx", "rx";
 871
 872                 clocks = <&k3_clks 192 0>;
 873                 clock-names = "fck";
 874                 assigned-clocks = <&k3_clks 192 0>;
 875                 assigned-clock-parents = <&k3_clks 192 2>;
 876                 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
 877                 status = "disabled";
 878         };
 879 };