arch/arm64/boot/dts/ti/k3-am62-main.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for AM625 SoC Family Main Domain peripherals
   4  *
   5  * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
   6  */
   7
   8 &cbass_main {
   9         oc_sram: sram@70000000 {
  10                 compatible = "mmio-sram";
  11                 reg = <0x00 0x70000000 0x00 0x10000>;
  12                 #address-cells = <1>;
  13                 #size-cells = <1>;
  14                 ranges = <0x0 0x00 0x70000000 0x10000>;
  15         };
  16
  17         gic500: interrupt-controller@1800000 {
  18                 compatible = "arm,gic-v3";
  19                 #address-cells = <2>;
  20                 #size-cells = <2>;
  21                 ranges;
  22                 #interrupt-cells = <3>;
  23                 interrupt-controller;
  24                 reg = <0x00 0x01800000 0x00 0x10000>,   /* GICD */
  25                       <0x00 0x01880000 0x00 0xc0000>,   /* GICR */
  26                       <0x00 0x01880000 0x00 0xc0000>,   /* GICR */
  27                       <0x01 0x00000000 0x00 0x2000>,    /* GICC */
  28                       <0x01 0x00010000 0x00 0x1000>,    /* GICH */
  29                       <0x01 0x00020000 0x00 0x2000>;    /* GICV */
  30                 /*
  31                  * vcpumntirq:
  32                  * virtual CPU interface maintenance interrupt
  33                  */
  34                 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
  35
  36                 gic_its: msi-controller@1820000 {
  37                         compatible = "arm,gic-v3-its";
  38                         reg = <0x00 0x01820000 0x00 0x10000>;
  39                         socionext,synquacer-pre-its = <0x1000000 0x400000>;
  40                         msi-controller;
  41                         #msi-cells = <1>;
  42                 };
  43         };
  44
  45         main_conf: syscon@100000 {
  46                 compatible = "syscon", "simple-mfd";
  47                 reg = <0x00 0x00100000 0x00 0x20000>;
  48                 #address-cells = <1>;
  49                 #size-cells = <1>;
  50                 ranges = <0x0 0x00 0x00100000 0x20000>;
  51
  52                 phy_gmii_sel: phy@4044 {
  53                         compatible = "ti,am654-phy-gmii-sel";
  54                         reg = <0x4044 0x8>;
  55                         #phy-cells = <1>;
  56                 };
  57
  58                 epwm_tbclk: clock-controller@4130 {
  59                         compatible = "ti,am62-epwm-tbclk";
  60                         reg = <0x4130 0x4>;
  61                         #clock-cells = <1>;
  62                 };
  63
  64                 audio_refclk0: clock-controller@82e0 {
  65                         compatible = "ti,am62-audio-refclk";
  66                         reg = <0x82e0 0x4>;
  67                         clocks = <&k3_clks 157 0>;
  68                         assigned-clocks = <&k3_clks 157 0>;
  69                         assigned-clock-parents = <&k3_clks 157 8>;
  70                         #clock-cells = <0>;
  71                 };
  72
  73                 audio_refclk1: clock-controller@82e4 {
  74                         compatible = "ti,am62-audio-refclk";
  75                         reg = <0x82e4 0x4>;
  76                         clocks = <&k3_clks 157 10>;
  77                         assigned-clocks = <&k3_clks 157 10>;
  78                         assigned-clock-parents = <&k3_clks 157 18>;
  79                         #clock-cells = <0>;
  80                 };
  81         };
  82
  83         dmss: bus@48000000 {
  84                 bootph-all;
  85                 compatible = "simple-bus";
  86                 #address-cells = <2>;
  87                 #size-cells = <2>;
  88                 dma-ranges;
  89                 ranges = <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>;
  90
  91                 ti,sci-dev-id = <25>;
  92
  93                 secure_proxy_main: mailbox@4d000000 {
  94                         bootph-all;
  95                         compatible = "ti,am654-secure-proxy";
  96                         #mbox-cells = <1>;
  97                         reg-names = "target_data", "rt", "scfg";
  98                         reg = <0x00 0x4d000000 0x00 0x80000>,
  99                               <0x00 0x4a600000 0x00 0x80000>,
 100                               <0x00 0x4a400000 0x00 0x80000>;
 101                         interrupt-names = "rx_012";
 102                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 103                 };
 104
 105                 inta_main_dmss: interrupt-controller@48000000 {
 106                         compatible = "ti,sci-inta";
 107                         reg = <0x00 0x48000000 0x00 0x100000>;
 108                         #interrupt-cells = <0>;
 109                         interrupt-controller;
 110                         interrupt-parent = <&gic500>;
 111                         msi-controller;
 112                         ti,sci = <&dmsc>;
 113                         ti,sci-dev-id = <28>;
 114                         ti,interrupt-ranges = <4 68 36>;
 115                         ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
 116                 };
 117
 118                 main_bcdma: dma-controller@485c0100 {
 119                         compatible = "ti,am64-dmss-bcdma";
 120                         reg = <0x00 0x485c0100 0x00 0x100>,
 121                               <0x00 0x4c000000 0x00 0x20000>,
 122                               <0x00 0x4a820000 0x00 0x20000>,
 123                               <0x00 0x4aa40000 0x00 0x20000>,
 124                               <0x00 0x4bc00000 0x00 0x100000>;
 125                         reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
 126                         msi-parent = <&inta_main_dmss>;
 127                         #dma-cells = <3>;
 128
 129                         ti,sci = <&dmsc>;
 130                         ti,sci-dev-id = <26>;
 131                         ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
 132                         ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
 133                         ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
 134                 };
 135
 136                 main_pktdma: dma-controller@485c0000 {
 137                         compatible = "ti,am64-dmss-pktdma";
 138                         reg = <0x00 0x485c0000 0x00 0x100>,
 139                               <0x00 0x4a800000 0x00 0x20000>,
 140                               <0x00 0x4aa00000 0x00 0x40000>,
 141                               <0x00 0x4b800000 0x00 0x400000>;
 142                         reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
 143                         msi-parent = <&inta_main_dmss>;
 144                         #dma-cells = <2>;
 145
 146                         ti,sci = <&dmsc>;
 147                         ti,sci-dev-id = <30>;
 148                         ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
 149                                                 <0x24>, /* CPSW_TX_CHAN */
 150                                                 <0x25>, /* SAUL_TX_0_CHAN */
 151                                                 <0x26>; /* SAUL_TX_1_CHAN */
 152                         ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
 153                                                 <0x11>, /* RING_CPSW_TX_CHAN */
 154                                                 <0x12>, /* RING_SAUL_TX_0_CHAN */
 155                                                 <0x13>; /* RING_SAUL_TX_1_CHAN */
 156                         ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
 157                                                 <0x2b>, /* CPSW_RX_CHAN */
 158                                                 <0x2d>, /* SAUL_RX_0_CHAN */
 159                                                 <0x2f>, /* SAUL_RX_1_CHAN */
 160                                                 <0x31>, /* SAUL_RX_2_CHAN */
 161                                                 <0x33>; /* SAUL_RX_3_CHAN */
 162                         ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
 163                                                 <0x2c>, /* FLOW_CPSW_RX_CHAN */
 164                                                 <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
 165                                                 <0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
 166                 };
 167         };
 168
 169         dmsc: system-controller@44043000 {
 170                 bootph-all;
 171                 compatible = "ti,k2g-sci";
 172                 ti,host-id = <12>;
 173                 mbox-names = "rx", "tx";
 174                 mboxes = <&secure_proxy_main 12>,
 175                          <&secure_proxy_main 13>;
 176                 reg-names = "debug_messages";
 177                 reg = <0x00 0x44043000 0x00 0xfe0>;
 178
 179                 k3_pds: power-controller {
 180                         bootph-all;
 181                         compatible = "ti,sci-pm-domain";
 182                         #power-domain-cells = <2>;
 183                 };
 184
 185                 k3_clks: clock-controller {
 186                         bootph-all;
 187                         compatible = "ti,k2g-sci-clk";
 188                         #clock-cells = <2>;
 189                 };
 190
 191                 k3_reset: reset-controller {
 192                         bootph-all;
 193                         compatible = "ti,sci-reset";
 194                         #reset-cells = <2>;
 195                 };
 196         };
 197
 198         crypto: crypto@40900000 {
 199                 compatible = "ti,am62-sa3ul";
 200                 reg = <0x00 0x40900000 0x00 0x1200>;
 201                 #address-cells = <2>;
 202                 #size-cells = <2>;
 203                 ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
 204
 205                 dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
 206                        <&main_pktdma 0x7507 0>;
 207                 dma-names = "tx", "rx1", "rx2";
 208         };
 209
 210         secure_proxy_sa3: mailbox@43600000 {
 211                 bootph-pre-ram;
 212                 compatible = "ti,am654-secure-proxy";
 213                 #mbox-cells = <1>;
 214                 reg-names = "target_data", "rt", "scfg";
 215                 reg = <0x00 0x43600000 0x00 0x10000>,
 216                       <0x00 0x44880000 0x00 0x20000>,
 217                       <0x00 0x44860000 0x00 0x20000>;
 218                 /*
 219                  * Marked Disabled:
 220                  * Node is incomplete as it is meant for bootloaders and
 221                  * firmware on non-MPU processors
 222                  */
 223                 status = "disabled";
 224         };
 225
 226         main_pmx0: pinctrl@f4000 {
 227                 bootph-all;
 228                 compatible = "pinctrl-single";
 229                 reg = <0x00 0xf4000 0x00 0x2ac>;
 230                 #pinctrl-cells = <1>;
 231                 pinctrl-single,register-width = <32>;
 232                 pinctrl-single,function-mask = <0xffffffff>;
 233         };
 234
 235         main_esm: esm@420000 {
 236                 bootph-pre-ram;
 237                 compatible = "ti,j721e-esm";
 238                 reg = <0x00 0x420000 0x00 0x1000>;
 239                 ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
 240         };
 241
 242         main_timer0: timer@2400000 {
 243                 bootph-all;
 244                 compatible = "ti,am654-timer";
 245                 reg = <0x00 0x2400000 0x00 0x400>;
 246                 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 247                 clocks = <&k3_clks 36 2>;
 248                 clock-names = "fck";
 249                 assigned-clocks = <&k3_clks 36 2>;
 250                 assigned-clock-parents = <&k3_clks 36 3>;
 251                 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
 252                 ti,timer-pwm;
 253         };
 254
 255         main_timer1: timer@2410000 {
 256                 compatible = "ti,am654-timer";
 257                 reg = <0x00 0x2410000 0x00 0x400>;
 258                 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
 259                 clocks = <&k3_clks 37 2>;
 260                 clock-names = "fck";
 261                 assigned-clocks = <&k3_clks 37 2>;
 262                 assigned-clock-parents = <&k3_clks 37 3>;
 263                 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
 264                 ti,timer-pwm;
 265         };
 266
 267         main_timer2: timer@2420000 {
 268                 compatible = "ti,am654-timer";
 269                 reg = <0x00 0x2420000 0x00 0x400>;
 270                 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
 271                 clocks = <&k3_clks 38 2>;
 272                 clock-names = "fck";
 273                 assigned-clocks = <&k3_clks 38 2>;
 274                 assigned-clock-parents = <&k3_clks 38 3>;
 275                 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
 276                 ti,timer-pwm;
 277         };
 278
 279         main_timer3: timer@2430000 {
 280                 compatible = "ti,am654-timer";
 281                 reg = <0x00 0x2430000 0x00 0x400>;
 282                 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
 283                 clocks = <&k3_clks 39 2>;
 284                 clock-names = "fck";
 285                 assigned-clocks = <&k3_clks 39 2>;
 286                 assigned-clock-parents = <&k3_clks 39 3>;
 287                 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
 288                 ti,timer-pwm;
 289         };
 290
 291         main_timer4: timer@2440000 {
 292                 compatible = "ti,am654-timer";
 293                 reg = <0x00 0x2440000 0x00 0x400>;
 294                 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
 295                 clocks = <&k3_clks 40 2>;
 296                 clock-names = "fck";
 297                 assigned-clocks = <&k3_clks 40 2>;
 298                 assigned-clock-parents = <&k3_clks 40 3>;
 299                 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
 300                 ti,timer-pwm;
 301         };
 302
 303         main_timer5: timer@2450000 {
 304                 compatible = "ti,am654-timer";
 305                 reg = <0x00 0x2450000 0x00 0x400>;
 306                 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
 307                 clocks = <&k3_clks 41 2>;
 308                 clock-names = "fck";
 309                 assigned-clocks = <&k3_clks 41 2>;
 310                 assigned-clock-parents = <&k3_clks 41 3>;
 311                 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
 312                 ti,timer-pwm;
 313         };
 314
 315         main_timer6: timer@2460000 {
 316                 compatible = "ti,am654-timer";
 317                 reg = <0x00 0x2460000 0x00 0x400>;
 318                 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
 319                 clocks = <&k3_clks 42 2>;
 320                 clock-names = "fck";
 321                 assigned-clocks = <&k3_clks 42 2>;
 322                 assigned-clock-parents = <&k3_clks 42 3>;
 323                 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
 324                 ti,timer-pwm;
 325         };
 326
 327         main_timer7: timer@2470000 {
 328                 compatible = "ti,am654-timer";
 329                 reg = <0x00 0x2470000 0x00 0x400>;
 330                 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 331                 clocks = <&k3_clks 43 2>;
 332                 clock-names = "fck";
 333                 assigned-clocks = <&k3_clks 43 2>;
 334                 assigned-clock-parents = <&k3_clks 43 3>;
 335                 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
 336                 ti,timer-pwm;
 337         };
 338
 339         main_uart0: serial@2800000 {
 340                 compatible = "ti,am64-uart", "ti,am654-uart";
 341                 reg = <0x00 0x02800000 0x00 0x100>;
 342                 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
 343                 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
 344                 clocks = <&k3_clks 146 0>;
 345                 clock-names = "fclk";
 346                 status = "disabled";
 347         };
 348
 349         main_uart1: serial@2810000 {
 350                 compatible = "ti,am64-uart", "ti,am654-uart";
 351                 reg = <0x00 0x02810000 0x00 0x100>;
 352                 interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
 353                 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
 354                 clocks = <&k3_clks 152 0>;
 355                 clock-names = "fclk";
 356                 status = "disabled";
 357         };
 358
 359         main_uart2: serial@2820000 {
 360                 compatible = "ti,am64-uart", "ti,am654-uart";
 361                 reg = <0x00 0x02820000 0x00 0x100>;
 362                 interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
 363                 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
 364                 clocks = <&k3_clks 153 0>;
 365                 clock-names = "fclk";
 366                 status = "disabled";
 367         };
 368
 369         main_uart3: serial@2830000 {
 370                 compatible = "ti,am64-uart", "ti,am654-uart";
 371                 reg = <0x00 0x02830000 0x00 0x100>;
 372                 interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
 373                 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
 374                 clocks = <&k3_clks 154 0>;
 375                 clock-names = "fclk";
 376                 status = "disabled";
 377         };
 378
 379         main_uart4: serial@2840000 {
 380                 compatible = "ti,am64-uart", "ti,am654-uart";
 381                 reg = <0x00 0x02840000 0x00 0x100>;
 382                 interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
 383                 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
 384                 clocks = <&k3_clks 155 0>;
 385                 clock-names = "fclk";
 386                 status = "disabled";
 387         };
 388
 389         main_uart5: serial@2850000 {
 390                 compatible = "ti,am64-uart", "ti,am654-uart";
 391                 reg = <0x00 0x02850000 0x00 0x100>;
 392                 interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
 393                 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
 394                 clocks = <&k3_clks 156 0>;
 395                 clock-names = "fclk";
 396                 status = "disabled";
 397         };
 398
 399         main_uart6: serial@2860000 {
 400                 compatible = "ti,am64-uart", "ti,am654-uart";
 401                 reg = <0x00 0x02860000 0x00 0x100>;
 402                 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 403                 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
 404                 clocks = <&k3_clks 158 0>;
 405                 clock-names = "fclk";
 406                 status = "disabled";
 407         };
 408
 409         main_i2c0: i2c@20000000 {
 410                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
 411                 reg = <0x00 0x20000000 0x00 0x100>;
 412                 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 413                 #address-cells = <1>;
 414                 #size-cells = <0>;
 415                 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
 416                 clocks = <&k3_clks 102 2>;
 417                 clock-names = "fck";
 418                 status = "disabled";
 419         };
 420
 421         main_i2c1: i2c@20010000 {
 422                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
 423                 reg = <0x00 0x20010000 0x00 0x100>;
 424                 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
 425                 #address-cells = <1>;
 426                 #size-cells = <0>;
 427                 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
 428                 clocks = <&k3_clks 103 2>;
 429                 clock-names = "fck";
 430                 status = "disabled";
 431         };
 432
 433         main_i2c2: i2c@20020000 {
 434                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
 435                 reg = <0x00 0x20020000 0x00 0x100>;
 436                 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
 437                 #address-cells = <1>;
 438                 #size-cells = <0>;
 439                 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
 440                 clocks = <&k3_clks 104 2>;
 441                 clock-names = "fck";
 442                 status = "disabled";
 443         };
 444
 445         main_i2c3: i2c@20030000 {
 446                 compatible = "ti,am64-i2c", "ti,omap4-i2c";
 447                 reg = <0x00 0x20030000 0x00 0x100>;
 448                 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 449                 #address-cells = <1>;
 450                 #size-cells = <0>;
 451                 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
 452                 clocks = <&k3_clks 105 2>;
 453                 clock-names = "fck";
 454                 status = "disabled";
 455         };
 456
 457         main_spi0: spi@20100000 {
 458                 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
 459                 reg = <0x00 0x20100000 0x00 0x400>;
 460                 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
 461                 #address-cells = <1>;
 462                 #size-cells = <0>;
 463                 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
 464                 clocks = <&k3_clks 141 0>;
 465                 status = "disabled";
 466         };
 467
 468         main_spi1: spi@20110000 {
 469                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
 470                 reg = <0x00 0x20110000 0x00 0x400>;
 471                 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 472                 #address-cells = <1>;
 473                 #size-cells = <0>;
 474                 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
 475                 clocks = <&k3_clks 142 0>;
 476                 status = "disabled";
 477         };
 478
 479         main_spi2: spi@20120000 {
 480                 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
 481                 reg = <0x00 0x20120000 0x00 0x400>;
 482                 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
 483                 #address-cells = <1>;
 484                 #size-cells = <0>;
 485                 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
 486                 clocks = <&k3_clks 143 0>;
 487                 status = "disabled";
 488         };
 489
 490         main_gpio_intr: interrupt-controller@a00000 {
 491                 compatible = "ti,sci-intr";
 492                 reg = <0x00 0x00a00000 0x00 0x800>;
 493                 ti,intr-trigger-type = <1>;
 494                 interrupt-controller;
 495                 interrupt-parent = <&gic500>;
 496                 #interrupt-cells = <1>;
 497                 ti,sci = <&dmsc>;
 498                 ti,sci-dev-id = <3>;
 499                 ti,interrupt-ranges = <0 32 16>;
 500         };
 501
 502         main_gpio0: gpio@600000 {
 503                 compatible = "ti,am64-gpio", "ti,keystone-gpio";
 504                 reg = <0x0 0x00600000 0x0 0x100>;
 505                 gpio-controller;
 506                 #gpio-cells = <2>;
 507                 interrupt-parent = <&main_gpio_intr>;
 508                 interrupts = <190>, <191>, <192>,
 509                              <193>, <194>, <195>;
 510                 interrupt-controller;
 511                 #interrupt-cells = <2>;
 512                 ti,ngpio = <92>;
 513                 ti,davinci-gpio-unbanked = <0>;
 514                 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
 515                 clocks = <&k3_clks 77 0>;
 516                 clock-names = "gpio";
 517         };
 518
 519         main_gpio1: gpio@601000 {
 520                 compatible = "ti,am64-gpio", "ti,keystone-gpio";
 521                 reg = <0x0 0x00601000 0x0 0x100>;
 522                 gpio-controller;
 523                 #gpio-cells = <2>;
 524                 interrupt-parent = <&main_gpio_intr>;
 525                 interrupts = <180>, <181>, <182>,
 526                              <183>, <184>, <185>;
 527                 interrupt-controller;
 528                 #interrupt-cells = <2>;
 529                 ti,ngpio = <52>;
 530                 ti,davinci-gpio-unbanked = <0>;
 531                 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
 532                 clocks = <&k3_clks 78 0>;
 533                 clock-names = "gpio";
 534         };
 535
 536         sdhci0: mmc@fa10000 {
 537                 compatible = "ti,am62-sdhci";
 538                 reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
 539                 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 540                 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
 541                 clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
 542                 clock-names = "clk_ahb", "clk_xin";
 543                 assigned-clocks = <&k3_clks 57 6>;
 544                 assigned-clock-parents = <&k3_clks 57 8>;
 545                 mmc-ddr-1_8v;
 546                 mmc-hs200-1_8v;
 547                 ti,trm-icp = <0x2>;
 548                 bus-width = <8>;
 549                 ti,clkbuf-sel = <0x7>;
 550                 ti,otap-del-sel-legacy = <0x0>;
 551                 ti,otap-del-sel-mmc-hs = <0x0>;
 552                 ti,otap-del-sel-ddr52 = <0x5>;
 553                 ti,otap-del-sel-hs200 = <0x5>;
 554                 ti,itap-del-sel-legacy = <0xa>;
 555                 ti,itap-del-sel-mmc-hs = <0x1>;
 556                 status = "disabled";
 557         };
 558
 559         sdhci1: mmc@fa00000 {
 560                 compatible = "ti,am62-sdhci";
 561                 reg = <0x00 0x0fa00000 0x00 0x1000>, <0x00 0x0fa08000 0x00 0x400>;
 562                 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 563                 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
 564                 clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
 565                 clock-names = "clk_ahb", "clk_xin";
 566                 ti,trm-icp = <0x2>;
 567                 ti,otap-del-sel-legacy = <0x8>;
 568                 ti,otap-del-sel-sd-hs = <0x0>;
 569                 ti,otap-del-sel-sdr12 = <0x0>;
 570                 ti,otap-del-sel-sdr25 = <0x0>;
 571                 ti,otap-del-sel-sdr50 = <0x8>;
 572                 ti,otap-del-sel-sdr104 = <0x7>;
 573                 ti,otap-del-sel-ddr50 = <0x4>;
 574                 ti,itap-del-sel-legacy = <0xa>;
 575                 ti,itap-del-sel-sd-hs = <0x1>;
 576                 ti,itap-del-sel-sdr12 = <0xa>;
 577                 ti,itap-del-sel-sdr25 = <0x1>;
 578                 ti,clkbuf-sel = <0x7>;
 579                 bus-width = <4>;
 580                 status = "disabled";
 581         };
 582
 583         sdhci2: mmc@fa20000 {
 584                 compatible = "ti,am62-sdhci";
 585                 reg = <0x00 0x0fa20000 0x00 0x1000>, <0x00 0x0fa28000 0x00 0x400>;
 586                 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 587                 power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
 588                 clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
 589                 clock-names = "clk_ahb", "clk_xin";
 590                 ti,trm-icp = <0x2>;
 591                 ti,otap-del-sel-legacy = <0x8>;
 592                 ti,otap-del-sel-sd-hs = <0x0>;
 593                 ti,otap-del-sel-sdr12 = <0x0>;
 594                 ti,otap-del-sel-sdr25 = <0x0>;
 595                 ti,otap-del-sel-sdr50 = <0x8>;
 596                 ti,otap-del-sel-sdr104 = <0x7>;
 597                 ti,otap-del-sel-ddr50 = <0x8>;
 598                 ti,itap-del-sel-legacy = <0xa>;
 599                 ti,itap-del-sel-sd-hs = <0xa>;
 600                 ti,itap-del-sel-sdr12 = <0xa>;
 601                 ti,itap-del-sel-sdr25 = <0x1>;
 602                 ti,clkbuf-sel = <0x7>;
 603                 status = "disabled";
 604         };
 605
 606         usbss0: dwc3-usb@f900000 {
 607                 compatible = "ti,am62-usb";
 608                 reg = <0x00 0x0f900000 0x00 0x800>;
 609                 clocks = <&k3_clks 161 3>;
 610                 clock-names = "ref";
 611                 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
 612                 #address-cells = <2>;
 613                 #size-cells = <2>;
 614                 power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
 615                 ranges;
 616                 status = "disabled";
 617
 618                 usb0: usb@31000000 {
 619                         compatible = "snps,dwc3";
 620                         reg = <0x00 0x31000000 0x00 0x50000>;
 621                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
 622                                      <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
 623                         interrupt-names = "host", "peripheral";
 624                         maximum-speed = "high-speed";
 625                         dr_mode = "otg";
 626                 };
 627         };
 628
 629         usbss1: dwc3-usb@f910000 {
 630                 compatible = "ti,am62-usb";
 631                 reg = <0x00 0x0f910000 0x00 0x800>;
 632                 clocks = <&k3_clks 162 3>;
 633                 clock-names = "ref";
 634                 ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
 635                 #address-cells = <2>;
 636                 #size-cells = <2>;
 637                 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
 638                 ranges;
 639                 status = "disabled";
 640
 641                 usb1: usb@31100000 {
 642                         compatible = "snps,dwc3";
 643                         reg = <0x00 0x31100000 0x00 0x50000>;
 644                         interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
 645                                      <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
 646                         interrupt-names = "host", "peripheral";
 647                         maximum-speed = "high-speed";
 648                         dr_mode = "otg";
 649                 };
 650         };
 651
 652         fss: bus@fc00000 {
 653                 compatible = "simple-bus";
 654                 reg = <0x00 0x0fc00000 0x00 0x70000>;
 655                 #address-cells = <2>;
 656                 #size-cells = <2>;
 657                 ranges;
 658
 659                 ospi0: spi@fc40000 {
 660                         compatible = "ti,am654-ospi", "cdns,qspi-nor";
 661                         reg = <0x00 0x0fc40000 0x00 0x100>,
 662                               <0x05 0x00000000 0x01 0x00000000>;
 663                         interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
 664                         cdns,fifo-depth = <256>;
 665                         cdns,fifo-width = <4>;
 666                         cdns,trigger-address = <0x0>;
 667                         clocks = <&k3_clks 75 7>;
 668                         assigned-clocks = <&k3_clks 75 7>;
 669                         assigned-clock-parents = <&k3_clks 75 8>;
 670                         assigned-clock-rates = <166666666>;
 671                         power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
 672                         #address-cells = <1>;
 673                         #size-cells = <0>;
 674                         status = "disabled";
 675                 };
 676         };
 677
 678         cpsw3g: ethernet@8000000 {
 679                 compatible = "ti,am642-cpsw-nuss";
 680                 #address-cells = <2>;
 681                 #size-cells = <2>;
 682                 reg = <0x00 0x08000000 0x00 0x200000>;
 683                 reg-names = "cpsw_nuss";
 684                 ranges = <0x00 0x00 0x00 0x08000000 0x00 0x200000>;
 685                 clocks = <&k3_clks 13 0>;
 686                 assigned-clocks = <&k3_clks 13 3>;
 687                 assigned-clock-parents = <&k3_clks 13 11>;
 688                 clock-names = "fck";
 689                 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
 690
 691                 dmas = <&main_pktdma 0xc600 15>,
 692                        <&main_pktdma 0xc601 15>,
 693                        <&main_pktdma 0xc602 15>,
 694                        <&main_pktdma 0xc603 15>,
 695                        <&main_pktdma 0xc604 15>,
 696                        <&main_pktdma 0xc605 15>,
 697                        <&main_pktdma 0xc606 15>,
 698                        <&main_pktdma 0xc607 15>,
 699                        <&main_pktdma 0x4600 15>;
 700                 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
 701                             "tx7", "rx";
 702
 703                 ethernet-ports {
 704                         #address-cells = <1>;
 705                         #size-cells = <0>;
 706
 707                         cpsw_port1: port@1 {
 708                                 reg = <1>;
 709                                 ti,mac-only;
 710                                 label = "port1";
 711                                 phys = <&phy_gmii_sel 1>;
 712                                 mac-address = [00 00 00 00 00 00];
 713                                 ti,syscon-efuse = <&wkup_conf 0x200>;
 714                         };
 715
 716                         cpsw_port2: port@2 {
 717                                 reg = <2>;
 718                                 ti,mac-only;
 719                                 label = "port2";
 720                                 phys = <&phy_gmii_sel 2>;
 721                                 mac-address = [00 00 00 00 00 00];
 722                         };
 723                 };
 724
 725                 cpsw3g_mdio: mdio@f00 {
 726                         compatible = "ti,cpsw-mdio","ti,davinci_mdio";
 727                         reg = <0x00 0xf00 0x00 0x100>;
 728                         #address-cells = <1>;
 729                         #size-cells = <0>;
 730                         clocks = <&k3_clks 13 0>;
 731                         clock-names = "fck";
 732                         bus_freq = <1000000>;
 733                         status = "disabled";
 734                 };
 735
 736                 cpts@3d000 {
 737                         compatible = "ti,j721e-cpts";
 738                         reg = <0x00 0x3d000 0x00 0x400>;
 739                         clocks = <&k3_clks 13 3>;
 740                         clock-names = "cpts";
 741                         interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 742                         interrupt-names = "cpts";
 743                         ti,cpts-ext-ts-inputs = <4>;
 744                         ti,cpts-periodic-outputs = <2>;
 745                 };
 746         };
 747
 748         dss: dss@30200000 {
 749                 compatible = "ti,am625-dss";
 750                 reg = <0x00 0x30200000 0x00 0x1000>, /* common */
 751                       <0x00 0x30202000 0x00 0x1000>, /* vidl1 */
 752                       <0x00 0x30206000 0x00 0x1000>, /* vid */
 753                       <0x00 0x30207000 0x00 0x1000>, /* ovr1 */
 754                       <0x00 0x30208000 0x00 0x1000>, /* ovr2 */
 755                       <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */
 756                       <0x00 0x3020b000 0x00 0x1000>; /* vp2: Used as DPI Out */
 757                 reg-names = "common", "vidl1", "vid",
 758                             "ovr1", "ovr2", "vp1", "vp2";
 759                 power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
 760                 clocks = <&k3_clks 186 6>,
 761                          <&dss_vp1_clk>,
 762                          <&k3_clks 186 2>;
 763                 clock-names = "fck", "vp1", "vp2";
 764                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 765                 status = "disabled";
 766
 767                 dss_ports: ports {
 768                         #address-cells = <1>;
 769                         #size-cells = <0>;
 770                 };
 771         };
 772
 773         hwspinlock: spinlock@2a000000 {
 774                 compatible = "ti,am64-hwspinlock";
 775                 reg = <0x00 0x2a000000 0x00 0x1000>;
 776                 #hwlock-cells = <1>;
 777         };
 778
 779         mailbox0_cluster0: mailbox@29000000 {
 780                 compatible = "ti,am64-mailbox";
 781                 reg = <0x00 0x29000000 0x00 0x200>;
 782                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
 783                              <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 784                 #mbox-cells = <1>;
 785                 ti,mbox-num-users = <4>;
 786                 ti,mbox-num-fifos = <16>;
 787         };
 788
 789         ecap0: pwm@23100000 {
 790                 compatible = "ti,am3352-ecap";
 791                 #pwm-cells = <3>;
 792                 reg = <0x00 0x23100000 0x00 0x100>;
 793                 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
 794                 clocks = <&k3_clks 51 0>;
 795                 clock-names = "fck";
 796                 status = "disabled";
 797         };
 798
 799         ecap1: pwm@23110000 {
 800                 compatible = "ti,am3352-ecap";
 801                 #pwm-cells = <3>;
 802                 reg = <0x00 0x23110000 0x00 0x100>;
 803                 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
 804                 clocks = <&k3_clks 52 0>;
 805                 clock-names = "fck";
 806                 status = "disabled";
 807         };
 808
 809         ecap2: pwm@23120000 {
 810                 compatible = "ti,am3352-ecap";
 811                 #pwm-cells = <3>;
 812                 reg = <0x00 0x23120000 0x00 0x100>;
 813                 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
 814                 clocks = <&k3_clks 53 0>;
 815                 clock-names = "fck";
 816                 status = "disabled";
 817         };
 818
 819         main_mcan0: can@20701000 {
 820                 compatible = "bosch,m_can";
 821                 reg = <0x00 0x20701000 0x00 0x200>,
 822                       <0x00 0x20708000 0x00 0x8000>;
 823                 reg-names = "m_can", "message_ram";
 824                 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
 825                 clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
 826                 clock-names = "hclk", "cclk";
 827                 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
 828                              <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 829                 interrupt-names = "int0", "int1";
 830                 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
 831                 status = "disabled";
 832         };
 833
 834         main_rti0: watchdog@e000000 {
 835                 compatible = "ti,j7-rti-wdt";
 836                 reg = <0x00 0x0e000000 0x00 0x100>;
 837                 clocks = <&k3_clks 125 0>;
 838                 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
 839                 assigned-clocks = <&k3_clks 125 0>;
 840                 assigned-clock-parents = <&k3_clks 125 2>;
 841         };
 842
 843         main_rti1: watchdog@e010000 {
 844                 compatible = "ti,j7-rti-wdt";
 845                 reg = <0x00 0x0e010000 0x00 0x100>;
 846                 clocks = <&k3_clks 126 0>;
 847                 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
 848                 assigned-clocks = <&k3_clks 126 0>;
 849                 assigned-clock-parents = <&k3_clks 126 2>;
 850         };
 851
 852         main_rti2: watchdog@e020000 {
 853                 compatible = "ti,j7-rti-wdt";
 854                 reg = <0x00 0x0e020000 0x00 0x100>;
 855                 clocks = <&k3_clks 127 0>;
 856                 power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
 857                 assigned-clocks = <&k3_clks 127 0>;
 858                 assigned-clock-parents = <&k3_clks 127 2>;
 859         };
 860
 861         main_rti3: watchdog@e030000 {
 862                 compatible = "ti,j7-rti-wdt";
 863                 reg = <0x00 0x0e030000 0x00 0x100>;
 864                 clocks = <&k3_clks 128 0>;
 865                 power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
 866                 assigned-clocks = <&k3_clks 128 0>;
 867                 assigned-clock-parents = <&k3_clks 128 2>;
 868         };
 869
 870         main_rti15: watchdog@e0f0000 {
 871                 compatible = "ti,j7-rti-wdt";
 872                 reg = <0x00 0x0e0f0000 0x00 0x100>;
 873                 clocks = <&k3_clks 130 0>;
 874                 power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
 875                 assigned-clocks = <&k3_clks 130 0>;
 876                 assigned-clock-parents = <&k3_clks 130 2>;
 877         };
 878
 879         epwm0: pwm@23000000 {
 880                 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
 881                 #pwm-cells = <3>;
 882                 reg = <0x00 0x23000000 0x00 0x100>;
 883                 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
 884                 clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
 885                 clock-names = "tbclk", "fck";
 886                 status = "disabled";
 887         };
 888
 889         epwm1: pwm@23010000 {
 890                 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
 891                 #pwm-cells = <3>;
 892                 reg = <0x00 0x23010000 0x00 0x100>;
 893                 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
 894                 clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
 895                 clock-names = "tbclk", "fck";
 896                 status = "disabled";
 897         };
 898
 899         epwm2: pwm@23020000 {
 900                 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
 901                 #pwm-cells = <3>;
 902                 reg = <0x00 0x23020000 0x00 0x100>;
 903                 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
 904                 clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
 905                 clock-names = "tbclk", "fck";
 906                 status = "disabled";
 907         };
 908
 909         mcasp0: audio-controller@2b00000 {
 910                 compatible = "ti,am33xx-mcasp-audio";
 911                 reg = <0x00 0x02b00000 0x00 0x2000>,
 912                       <0x00 0x02b08000 0x00 0x400>;
 913                 reg-names = "mpu", "dat";
 914                 interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
 915                              <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
 916                 interrupt-names = "tx", "rx";
 917
 918                 dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
 919                 dma-names = "tx", "rx";
 920
 921                 clocks = <&k3_clks 190 0>;
 922                 clock-names = "fck";
 923                 assigned-clocks = <&k3_clks 190 0>;
 924                 assigned-clock-parents = <&k3_clks 190 2>;
 925                 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
 926                 status = "disabled";
 927         };
 928
 929         mcasp1: audio-controller@2b10000 {
 930                 compatible = "ti,am33xx-mcasp-audio";
 931                 reg = <0x00 0x02b10000 0x00 0x2000>,
 932                       <0x00 0x02b18000 0x00 0x400>;
 933                 reg-names = "mpu", "dat";
 934                 interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
 935                              <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
 936                 interrupt-names = "tx", "rx";
 937
 938                 dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
 939                 dma-names = "tx", "rx";
 940
 941                 clocks = <&k3_clks 191 0>;
 942                 clock-names = "fck";
 943                 assigned-clocks = <&k3_clks 191 0>;
 944                 assigned-clock-parents = <&k3_clks 191 2>;
 945                 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
 946                 status = "disabled";
 947         };
 948
 949         mcasp2: audio-controller@2b20000 {
 950                 compatible = "ti,am33xx-mcasp-audio";
 951                 reg = <0x00 0x02b20000 0x00 0x2000>,
 952                       <0x00 0x02b28000 0x00 0x400>;
 953                 reg-names = "mpu", "dat";
 954                 interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
 955                              <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
 956                 interrupt-names = "tx", "rx";
 957
 958                 dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
 959                 dma-names = "tx", "rx";
 960
 961                 clocks = <&k3_clks 192 0>;
 962                 clock-names = "fck";
 963                 assigned-clocks = <&k3_clks 192 0>;
 964                 assigned-clock-parents = <&k3_clks 192 2>;
 965                 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
 966                 status = "disabled";
 967         };
 968 };