Linux 6.7-rc7
[linux-modified.git] / arch / arm64 / boot / dts / st / stm32mp25-pinctrl.dtsi
1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
2 /*
3  * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
4  * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics.
5  */
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8 &pinctrl {
9         sdmmc1_b4_pins_a: sdmmc1-b4-0 {
10                 pins1 {
11                         pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
12                                  <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */
13                                  <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
14                                  <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */
15                                  <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
16                         slew-rate = <2>;
17                         drive-push-pull;
18                         bias-disable;
19                 };
20                 pins2 {
21                         pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
22                         slew-rate = <3>;
23                         drive-push-pull;
24                         bias-disable;
25                 };
26         };
27
28         sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
29                 pins1 {
30                         pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */
31                                  <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */
32                                  <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */
33                                  <STM32_PINMUX('E', 1, AF10)>; /* SDMMC1_D3 */
34                         slew-rate = <2>;
35                         drive-push-pull;
36                         bias-disable;
37                 };
38                 pins2 {
39                         pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */
40                         slew-rate = <3>;
41                         drive-push-pull;
42                         bias-disable;
43                 };
44                 pins3 {
45                         pinmux = <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */
46                         slew-rate = <2>;
47                         drive-open-drain;
48                         bias-disable;
49                 };
50         };
51
52         sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
53                 pins {
54                         pinmux = <STM32_PINMUX('E', 4, ANALOG)>, /* SDMMC1_D0 */
55                                  <STM32_PINMUX('E', 5, ANALOG)>, /* SDMMC1_D1 */
56                                  <STM32_PINMUX('E', 0, ANALOG)>, /* SDMMC1_D2 */
57                                  <STM32_PINMUX('E', 1, ANALOG)>, /* SDMMC1_D3 */
58                                  <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC1_CK */
59                                  <STM32_PINMUX('E', 2, ANALOG)>; /* SDMMC1_CMD */
60                 };
61         };
62
63         usart2_pins_a: usart2-0 {
64                 pins1 {
65                         pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */
66                         bias-disable;
67                         drive-push-pull;
68                         slew-rate = <0>;
69                 };
70                 pins2 {
71                         pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
72                         bias-disable;
73                 };
74         };
75
76         usart2_idle_pins_a: usart2-idle-0 {
77                 pins1 {
78                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>; /* USART2_TX */
79                 };
80                 pins2 {
81                         pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */
82                         bias-disable;
83                 };
84         };
85
86         usart2_sleep_pins_a: usart2-sleep-0 {
87                 pins {
88                         pinmux = <STM32_PINMUX('A', 4, ANALOG)>, /* USART2_TX */
89                                  <STM32_PINMUX('A', 8, ANALOG)>; /* USART2_RX */
90                 };
91         };
92 };