2 * Spreadtrum Whale2 platform peripherals
4 * Copyright (C) 2016, Spreadtrum Communications Inc.
6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/sprd,sc9860-clk.h>
12 interrupt-parent = <&gic>;
17 compatible = "simple-bus";
22 ap_ahb_regs: syscon@20210000 {
23 compatible = "syscon";
24 reg = <0 0x20210000 0 0x10000>;
27 pmu_regs: syscon@402b0000 {
28 compatible = "syscon";
29 reg = <0 0x402b0000 0 0x10000>;
32 aon_regs: syscon@402e0000 {
33 compatible = "syscon";
34 reg = <0 0x402e0000 0 0x10000>;
37 ana_regs: syscon@40400000 {
38 compatible = "syscon";
39 reg = <0 0x40400000 0 0x10000>;
42 agcp_regs: syscon@415e0000 {
43 compatible = "syscon";
44 reg = <0 0x415e0000 0 0x1000000>;
47 vsp_regs: syscon@61100000 {
48 compatible = "syscon";
49 reg = <0 0x61100000 0 0x10000>;
52 cam_regs: syscon@62100000 {
53 compatible = "syscon";
54 reg = <0 0x62100000 0 0x10000>;
57 disp_regs: syscon@63100000 {
58 compatible = "syscon";
59 reg = <0 0x63100000 0 0x10000>;
62 ap_apb_regs: syscon@70b00000 {
63 compatible = "syscon";
64 reg = <0 0x70b00000 0 0x40000>;
68 compatible = "simple-bus";
71 ranges = <0 0x0 0x70000000 0x10000000>;
74 compatible = "sprd,sc9860-uart",
77 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
82 uart1: serial@100000 {
83 compatible = "sprd,sc9860-uart",
85 reg = <0x100000 0x100>;
86 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
91 uart2: serial@200000 {
92 compatible = "sprd,sc9860-uart",
94 reg = <0x200000 0x100>;
95 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
100 uart3: serial@300000 {
101 compatible = "sprd,sc9860-uart",
103 reg = <0x300000 0x100>;
104 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
111 compatible = "simple-bus";
112 #address-cells = <2>;
116 ap_dma: dma-controller@20100000 {
117 compatible = "sprd,sc9860-dma";
118 reg = <0 0x20100000 0 0x4000>;
119 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
121 #dma-channels = <32>;
122 clock-names = "enable";
123 clocks = <&apahb_gate CLK_DMA_EB>;
128 compatible = "simple-bus";
129 #address-cells = <2>;
133 adi_bus: spi@40030000 {
134 compatible = "sprd,sc9860-adi";
135 reg = <0 0x40030000 0 0x10000>;
136 hwlocks = <&hwlock 0>;
137 hwlock-names = "adi";
138 #address-cells = <1>;
143 compatible = "sprd,sc9860-timer";
144 reg = <0 0x40050000 0 0x20>;
145 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
150 compatible = "sprd,sc9860-suspend-timer";
151 reg = <0 0x40050020 0 0x20>;
155 hwlock: hwspinlock@40500000 {
156 compatible = "sprd,hwspinlock-r3p0";
157 reg = <0 0x40500000 0 0x1000>;
159 clock-names = "enable";
160 clocks = <&aon_gate CLK_SPLK_EB>;
163 eic_debounce: gpio@40210000 {
164 compatible = "sprd,sc9860-eic-debounce";
165 reg = <0 0x40210000 0 0x80>;
168 interrupt-controller;
169 #interrupt-cells = <2>;
170 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
173 eic_latch: gpio@40210080 {
174 compatible = "sprd,sc9860-eic-latch";
175 reg = <0 0x40210080 0 0x20>;
178 interrupt-controller;
179 #interrupt-cells = <2>;
180 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
183 eic_async: gpio@402100a0 {
184 compatible = "sprd,sc9860-eic-async";
185 reg = <0 0x402100a0 0 0x20>;
188 interrupt-controller;
189 #interrupt-cells = <2>;
190 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
193 eic_sync: gpio@402100c0 {
194 compatible = "sprd,sc9860-eic-sync";
195 reg = <0 0x402100c0 0 0x20>;
198 interrupt-controller;
199 #interrupt-cells = <2>;
200 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
203 ap_gpio: gpio@40280000 {
204 compatible = "sprd,sc9860-gpio";
205 reg = <0 0x40280000 0 0x1000>;
208 interrupt-controller;
209 #interrupt-cells = <2>;
210 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
213 pin_controller: pinctrl@402a0000 {
214 compatible = "sprd,sc9860-pinctrl";
215 reg = <0 0x402a0000 0 0x10000>;
219 compatible = "sprd,sp9860-wdt";
220 reg = <0 0x40310000 0 0x1000>;
221 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
223 clock-names = "enable", "rtc_enable";
224 clocks = <&aon_gate CLK_APCPU_WDG_EB>,
225 <&aon_gate CLK_AP_WDG_RTC_EB>;
230 compatible = "simple-bus";
231 #address-cells = <2>;
235 agcp_dma: dma-controller@41580000 {
236 compatible = "sprd,sc9860-dma";
237 reg = <0 0x41580000 0 0x4000>;
239 #dma-channels = <32>;
240 clock-names = "enable", "ashb_eb";
241 clocks = <&agcp_gate CLK_AGCP_DMAAP_EB>,
242 <&agcp_gate CLK_AGCP_AP_ASHB_EB>;
248 compatible = "fixed-clock";
250 clock-frequency = <32768>;
251 clock-output-names = "ext-32k";
255 compatible = "fixed-clock";
257 clock-frequency = <26000000>;
258 clock-output-names = "ext-26m";
261 ext_rco_100m: ext_rco_100m {
262 compatible = "fixed-clock";
264 clock-frequency = <100000000>;
265 clock-output-names = "ext-rco-100m";