1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
7 compatible = "edgeble,neural-compute-module-6b", "rockchip,rk3588";
13 vcc12v_dcin: vcc12v-dcin-regulator {
14 compatible = "regulator-fixed";
15 regulator-name = "vcc12v_dcin";
18 regulator-min-microvolt = <12000000>;
19 regulator-max-microvolt = <12000000>;
22 vcc5v0_sys: vcc5v0-sys-regulator {
23 compatible = "regulator-fixed";
24 regulator-name = "vcc5v0_sys";
27 regulator-min-microvolt = <5000000>;
28 regulator-max-microvolt = <5000000>;
29 vin-supply = <&vcc12v_dcin>;
32 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
33 compatible = "regulator-fixed";
34 regulator-name = "vcc_1v1_nldo_s3";
37 regulator-min-microvolt = <1100000>;
38 regulator-max-microvolt = <1100000>;
39 vin-supply = <&vcc5v0_sys>;
44 cpu-supply = <&vdd_cpu_lit_s0>;
48 cpu-supply = <&vdd_cpu_lit_s0>;
52 cpu-supply = <&vdd_cpu_lit_s0>;
56 cpu-supply = <&vdd_cpu_lit_s0>;
65 mmc-hs400-enhanced-strobe;
71 assigned-clocks = <&cru CLK_SPI2>;
72 assigned-clock-rates = <200000000>;
74 pinctrl-names = "default";
75 pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
78 compatible = "rockchip,rk806";
79 spi-max-frequency = <1000000>;
81 interrupt-parent = <&gpio0>;
82 interrupts = <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
83 pinctrl-names = "default";
84 pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
85 <&rk806_dvs2_null>, <&rk806_dvs3_null>;
87 vcc1-supply = <&vcc5v0_sys>;
88 vcc2-supply = <&vcc5v0_sys>;
89 vcc3-supply = <&vcc5v0_sys>;
90 vcc4-supply = <&vcc5v0_sys>;
91 vcc5-supply = <&vcc5v0_sys>;
92 vcc6-supply = <&vcc5v0_sys>;
93 vcc7-supply = <&vcc5v0_sys>;
94 vcc8-supply = <&vcc5v0_sys>;
95 vcc9-supply = <&vcc5v0_sys>;
96 vcc10-supply = <&vcc5v0_sys>;
97 vcc11-supply = <&vcc_2v0_pldo_s3>;
98 vcc12-supply = <&vcc5v0_sys>;
99 vcc13-supply = <&vcc_1v1_nldo_s3>;
100 vcc14-supply = <&vcc_1v1_nldo_s3>;
101 vcca-supply = <&vcc5v0_sys>;
106 rk806_dvs1_null: dvs1-null-pins {
107 pins = "gpio_pwrctrl2";
108 function = "pin_fun0";
111 rk806_dvs2_null: dvs2-null-pins {
112 pins = "gpio_pwrctrl2";
113 function = "pin_fun0";
116 rk806_dvs3_null: dvs3-null-pins {
117 pins = "gpio_pwrctrl3";
118 function = "pin_fun0";
122 vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
123 regulator-name = "vdd_gpu_s0";
125 regulator-min-microvolt = <550000>;
126 regulator-max-microvolt = <950000>;
127 regulator-ramp-delay = <12500>;
128 regulator-enable-ramp-delay = <400>;
130 regulator-state-mem {
131 regulator-off-in-suspend;
135 vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
136 regulator-name = "vdd_cpu_lit_s0";
139 regulator-min-microvolt = <550000>;
140 regulator-max-microvolt = <950000>;
141 regulator-ramp-delay = <12500>;
143 regulator-state-mem {
144 regulator-off-in-suspend;
148 vdd_log_s0: dcdc-reg3 {
149 regulator-name = "vdd_log_s0";
152 regulator-min-microvolt = <675000>;
153 regulator-max-microvolt = <750000>;
154 regulator-ramp-delay = <12500>;
156 regulator-state-mem {
157 regulator-off-in-suspend;
158 regulator-suspend-microvolt = <750000>;
162 vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
163 regulator-name = "vdd_vdenc_s0";
166 regulator-min-microvolt = <550000>;
167 regulator-max-microvolt = <950000>;
168 regulator-init-microvolt = <750000>;
169 regulator-ramp-delay = <12500>;
171 regulator-state-mem {
172 regulator-off-in-suspend;
176 vdd_ddr_s0: dcdc-reg5 {
177 regulator-name = "vdd_ddr_s0";
180 regulator-min-microvolt = <675000>;
181 regulator-max-microvolt = <900000>;
182 regulator-ramp-delay = <12500>;
184 regulator-state-mem {
185 regulator-off-in-suspend;
186 regulator-suspend-microvolt = <850000>;
190 vdd2_ddr_s3: dcdc-reg6 {
191 regulator-name = "vdd2_ddr_s3";
195 regulator-state-mem {
196 regulator-on-in-suspend;
200 vcc_2v0_pldo_s3: dcdc-reg7 {
201 regulator-name = "vdd_2v0_pldo_s3";
204 regulator-min-microvolt = <2000000>;
205 regulator-max-microvolt = <2000000>;
206 regulator-ramp-delay = <12500>;
208 regulator-state-mem {
209 regulator-on-in-suspend;
210 regulator-suspend-microvolt = <2000000>;
214 vcc_3v3_s3: dcdc-reg8 {
215 regulator-name = "vcc_3v3_s3";
218 regulator-min-microvolt = <3300000>;
219 regulator-max-microvolt = <3300000>;
221 regulator-state-mem {
222 regulator-on-in-suspend;
223 regulator-suspend-microvolt = <3300000>;
227 vddq_ddr_s0: dcdc-reg9 {
228 regulator-name = "vddq_ddr_s0";
232 regulator-state-mem {
233 regulator-off-in-suspend;
237 vcc_1v8_s3: dcdc-reg10 {
238 regulator-name = "vcc_1v8_s3";
241 regulator-min-microvolt = <1800000>;
242 regulator-max-microvolt = <1800000>;
244 regulator-state-mem {
245 regulator-on-in-suspend;
246 regulator-suspend-microvolt = <1800000>;
250 avcc_1v8_s0: pldo-reg1 {
251 regulator-name = "avcc_1v8_s0";
254 regulator-min-microvolt = <1800000>;
255 regulator-max-microvolt = <1800000>;
257 regulator-state-mem {
258 regulator-off-in-suspend;
262 vcc_1v8_s0: pldo-reg2 {
263 regulator-name = "vcc_1v8_s0";
266 regulator-min-microvolt = <1800000>;
267 regulator-max-microvolt = <1800000>;
269 regulator-state-mem {
270 regulator-off-in-suspend;
271 regulator-suspend-microvolt = <1800000>;
275 avdd_1v2_s0: pldo-reg3 {
276 regulator-name = "avdd_1v2_s0";
279 regulator-min-microvolt = <1200000>;
280 regulator-max-microvolt = <1200000>;
282 regulator-state-mem {
283 regulator-off-in-suspend;
287 vcc_3v3_s0: pldo-reg4 {
288 regulator-name = "vcc_3v3_s0";
291 regulator-min-microvolt = <3300000>;
292 regulator-max-microvolt = <3300000>;
293 regulator-ramp-delay = <12500>;
295 regulator-state-mem {
296 regulator-off-in-suspend;
300 vccio_sd_s0: pldo-reg5 {
301 regulator-name = "vccio_sd_s0";
304 regulator-min-microvolt = <1800000>;
305 regulator-max-microvolt = <3300000>;
306 regulator-ramp-delay = <12500>;
308 regulator-state-mem {
309 regulator-off-in-suspend;
313 pldo6_s3: pldo-reg6 {
314 regulator-name = "pldo6_s3";
317 regulator-min-microvolt = <1800000>;
318 regulator-max-microvolt = <1800000>;
320 regulator-state-mem {
321 regulator-on-in-suspend;
322 regulator-suspend-microvolt = <1800000>;
326 vdd_0v75_s3: nldo-reg1 {
327 regulator-name = "vdd_0v75_s3";
330 regulator-min-microvolt = <750000>;
331 regulator-max-microvolt = <750000>;
333 regulator-state-mem {
334 regulator-on-in-suspend;
335 regulator-suspend-microvolt = <750000>;
339 vdd_ddr_pll_s0: nldo-reg2 {
340 regulator-name = "vdd_ddr_pll_s0";
343 regulator-min-microvolt = <850000>;
344 regulator-max-microvolt = <850000>;
346 regulator-state-mem {
347 regulator-off-in-suspend;
348 regulator-suspend-microvolt = <850000>;
352 avdd_0v75_s0: nldo-reg3 {
353 regulator-name = "avdd_0v75_s0";
356 regulator-min-microvolt = <750000>;
357 regulator-max-microvolt = <750000>;
359 regulator-state-mem {
360 regulator-off-in-suspend;
364 vdd_0v85_s0: nldo-reg4 {
365 regulator-name = "vdd_0v85_s0";
368 regulator-min-microvolt = <850000>;
369 regulator-max-microvolt = <850000>;
371 regulator-state-mem {
372 regulator-off-in-suspend;
376 vdd_0v75_s0: nldo-reg5 {
377 regulator-name = "vdd_0v75_s0";
380 regulator-min-microvolt = <750000>;
381 regulator-max-microvolt = <750000>;
383 regulator-state-mem {
384 regulator-off-in-suspend;