1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/soc/rockchip,vop2.h>
11 #include "rk3568.dtsi"
14 model = "Firefly Station P2";
15 compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568";
25 stdout-path = "serial2:1500000n8";
28 dc_12v: dc-12v-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "dc_12v";
33 regulator-min-microvolt = <12000000>;
34 regulator-max-microvolt = <12000000>;
37 gmac0_clkin: external-gmac0-clock {
38 compatible = "fixed-clock";
39 clock-frequency = <125000000>;
40 clock-output-names = "gmac0_clkin";
44 gmac1_clkin: external-gmac1-clock {
45 compatible = "fixed-clock";
46 clock-frequency = <125000000>;
47 clock-output-names = "gmac1_clkin";
52 compatible = "gpio-leds";
57 gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
58 linux,default-trigger = "heartbeat";
59 pinctrl-names = "default";
60 pinctrl-0 = <&user_led_enable_h>;
61 retain-state-suspended;
66 compatible = "hdmi-connector";
70 hdmi_con_in: endpoint {
71 remote-endpoint = <&hdmi_out_con>;
76 pcie30_avdd0v9: pcie30-avdd0v9-regulator {
77 compatible = "regulator-fixed";
78 regulator-name = "pcie30_avdd0v9";
81 regulator-min-microvolt = <900000>;
82 regulator-max-microvolt = <900000>;
83 vin-supply = <&vcc3v3_sys>;
86 pcie30_avdd1v8: pcie30-avdd1v8-regulator {
87 compatible = "regulator-fixed";
88 regulator-name = "pcie30_avdd1v8";
91 regulator-min-microvolt = <1800000>;
92 regulator-max-microvolt = <1800000>;
93 vin-supply = <&vcc3v3_sys>;
96 vcc3v3_sys: vcc3v3-sys-regulator {
97 compatible = "regulator-fixed";
98 regulator-name = "vcc3v3_sys";
101 regulator-min-microvolt = <3300000>;
102 regulator-max-microvolt = <3300000>;
103 vin-supply = <&dc_12v>;
106 vcc3v3_pcie: vcc3v3-pcie-regulator {
107 compatible = "regulator-fixed";
108 regulator-name = "vcc3v3_pcie";
110 regulator-min-microvolt = <3300000>;
111 regulator-max-microvolt = <3300000>;
112 pinctrl-names = "default";
113 pinctrl-0 = <&vcc3v3_pcie_en_pin>;
114 gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
115 startup-delay-us = <5000>;
116 vin-supply = <&vcc5v0_sys>;
119 vcc5v0_sys: vcc5v0-sys-regulator {
120 compatible = "regulator-fixed";
121 regulator-name = "vcc5v0_sys";
124 regulator-min-microvolt = <5000000>;
125 regulator-max-microvolt = <5000000>;
126 vin-supply = <&dc_12v>;
129 vcc5v0_usb: vcc5v0-usb-regulator {
130 compatible = "regulator-fixed";
131 regulator-name = "vcc5v0_usb";
134 regulator-min-microvolt = <5000000>;
135 regulator-max-microvolt = <5000000>;
136 vin-supply = <&vcc5v0_sys>;
139 vcc5v0_host: vcc5v0-host-regulator {
140 compatible = "regulator-fixed";
141 regulator-name = "vcc5v0_host";
143 gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
144 pinctrl-names = "default";
145 pinctrl-0 = <&vcc5v0_host_en>;
147 vin-supply = <&vcc5v0_usb>;
150 vcc5v0_otg: vcc5v0-otg-regulator {
151 compatible = "regulator-fixed";
152 regulator-name = "vcc5v0_otg";
154 gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
155 pinctrl-names = "default";
156 pinctrl-0 = <&vcc5v0_otg_en>;
157 vin-supply = <&vcc5v0_usb>;
177 assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
178 assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>;
179 clock_in_out = "input";
180 pinctrl-names = "default";
181 pinctrl-0 = <&gmac0_miim
187 phy-handle = <&rgmii_phy0>;
189 snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
190 snps,reset-active-low;
191 /* Reset time is 20ms, 100ms for rtl8211f */
192 snps,reset-delays-us = <0 20000 100000>;
199 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
200 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
201 clock_in_out = "input";
202 pinctrl-names = "default";
203 pinctrl-0 = <&gmac1m1_miim
209 phy-handle = <&rgmii_phy1>;
211 snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
212 snps,reset-active-low;
213 /* Reset time is 20ms, 100ms for rtl8211f */
214 snps,reset-delays-us = <0 20000 100000>;
221 mali-supply = <&vdd_gpu>;
226 avdd-0v9-supply = <&vdda0v9_image>;
227 avdd-1v8-supply = <&vcca1v8_image>;
232 hdmi_in_vp0: endpoint {
233 remote-endpoint = <&vp0_out_hdmi>;
238 hdmi_out_con: endpoint {
239 remote-endpoint = <&hdmi_con_in>;
251 compatible = "rockchip,rk809";
253 interrupt-parent = <&gpio0>;
254 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
256 pinctrl-names = "default";
257 pinctrl-0 = <&pmic_int>;
258 rockchip,system-power-controller;
259 vcc1-supply = <&vcc3v3_sys>;
260 vcc2-supply = <&vcc3v3_sys>;
261 vcc3-supply = <&vcc3v3_sys>;
262 vcc4-supply = <&vcc3v3_sys>;
263 vcc5-supply = <&vcc3v3_sys>;
264 vcc6-supply = <&vcc3v3_sys>;
265 vcc7-supply = <&vcc3v3_sys>;
266 vcc8-supply = <&vcc3v3_sys>;
267 vcc9-supply = <&vcc3v3_sys>;
271 vdd_logic: DCDC_REG1 {
272 regulator-name = "vdd_logic";
275 regulator-init-microvolt = <900000>;
276 regulator-initial-mode = <0x2>;
277 regulator-min-microvolt = <500000>;
278 regulator-max-microvolt = <1350000>;
279 regulator-ramp-delay = <6001>;
281 regulator-state-mem {
282 regulator-off-in-suspend;
287 regulator-name = "vdd_gpu";
288 regulator-init-microvolt = <900000>;
289 regulator-initial-mode = <0x2>;
290 regulator-min-microvolt = <500000>;
291 regulator-max-microvolt = <1350000>;
292 regulator-ramp-delay = <6001>;
294 regulator-state-mem {
295 regulator-off-in-suspend;
300 regulator-name = "vcc_ddr";
303 regulator-initial-mode = <0x2>;
305 regulator-state-mem {
306 regulator-on-in-suspend;
311 regulator-name = "vdd_npu";
312 regulator-init-microvolt = <900000>;
313 regulator-initial-mode = <0x2>;
314 regulator-min-microvolt = <500000>;
315 regulator-max-microvolt = <1350000>;
316 regulator-ramp-delay = <6001>;
318 regulator-state-mem {
319 regulator-off-in-suspend;
324 regulator-name = "vcc_1v8";
327 regulator-min-microvolt = <1800000>;
328 regulator-max-microvolt = <1800000>;
330 regulator-state-mem {
331 regulator-off-in-suspend;
335 vdda0v9_image: LDO_REG1 {
336 regulator-name = "vdda0v9_image";
337 regulator-min-microvolt = <900000>;
338 regulator-max-microvolt = <900000>;
340 regulator-state-mem {
341 regulator-off-in-suspend;
346 regulator-name = "vdda_0v9";
349 regulator-min-microvolt = <900000>;
350 regulator-max-microvolt = <900000>;
352 regulator-state-mem {
353 regulator-off-in-suspend;
357 vdda0v9_pmu: LDO_REG3 {
358 regulator-name = "vdda0v9_pmu";
361 regulator-min-microvolt = <900000>;
362 regulator-max-microvolt = <900000>;
364 regulator-state-mem {
365 regulator-on-in-suspend;
366 regulator-suspend-microvolt = <900000>;
370 vccio_acodec: LDO_REG4 {
371 regulator-name = "vccio_acodec";
372 regulator-min-microvolt = <3300000>;
373 regulator-max-microvolt = <3300000>;
375 regulator-state-mem {
376 regulator-off-in-suspend;
381 regulator-name = "vccio_sd";
382 regulator-min-microvolt = <1800000>;
383 regulator-max-microvolt = <3300000>;
385 regulator-state-mem {
386 regulator-off-in-suspend;
390 vcc3v3_pmu: LDO_REG6 {
391 regulator-name = "vcc3v3_pmu";
394 regulator-min-microvolt = <3300000>;
395 regulator-max-microvolt = <3300000>;
397 regulator-state-mem {
398 regulator-on-in-suspend;
399 regulator-suspend-microvolt = <3300000>;
404 regulator-name = "vcca_1v8";
407 regulator-min-microvolt = <1800000>;
408 regulator-max-microvolt = <1800000>;
410 regulator-state-mem {
411 regulator-off-in-suspend;
415 vcca1v8_pmu: LDO_REG8 {
416 regulator-name = "vcca1v8_pmu";
419 regulator-min-microvolt = <1800000>;
420 regulator-max-microvolt = <1800000>;
422 regulator-state-mem {
423 regulator-on-in-suspend;
424 regulator-suspend-microvolt = <1800000>;
428 vcca1v8_image: LDO_REG9 {
429 regulator-name = "vcca1v8_image";
430 regulator-min-microvolt = <1800000>;
431 regulator-max-microvolt = <1800000>;
433 regulator-state-mem {
434 regulator-off-in-suspend;
438 vcc_3v3: SWITCH_REG1 {
439 regulator-name = "vcc_3v3";
443 regulator-state-mem {
444 regulator-off-in-suspend;
448 vcc3v3_sd: SWITCH_REG2 {
449 regulator-name = "vcc3v3_sd";
453 regulator-state-mem {
454 regulator-off-in-suspend;
467 compatible = "ethernet-phy-ieee802.3-c22";
474 compatible = "ethernet-phy-ieee802.3-c22";
484 pinctrl-names = "default";
485 pinctrl-0 = <&pcie_reset_pin>;
486 reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
487 vpcie3v3-supply = <&vcc3v3_pcie>;
493 user_led_enable_h: user-led-enable-h {
494 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
499 vcc5v0_host_en: vcc5v0-host-en {
500 rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
503 vcc5v0_otg_en: vcc5v0-otg-en {
504 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
509 pcie_reset_pin: pcie-reset-pin {
510 rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
512 vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin {
513 rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
520 <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
526 pmuio1-supply = <&vcc3v3_pmu>;
527 pmuio2-supply = <&vcc3v3_pmu>;
528 vccio1-supply = <&vccio_acodec>;
529 vccio2-supply = <&vcc_1v8>;
530 vccio3-supply = <&vccio_sd>;
531 vccio4-supply = <&vcc_1v8>;
532 vccio5-supply = <&vcc_3v3>;
533 vccio6-supply = <&vcc_1v8>;
534 vccio7-supply = <&vcc_3v3>;
539 vref-supply = <&vcca_1v8>;
549 max-frequency = <200000000>;
551 pinctrl-names = "default";
552 pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
559 cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
561 pinctrl-names = "default";
562 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
564 vmmc-supply = <&vcc3v3_sd>;
565 vqmmc-supply = <&vccio_sd>;
578 phy-supply = <&vcc5v0_host>;
595 phy-supply = <&vcc5v0_host>;
600 phy-supply = <&vcc5v0_host>;
629 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
630 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
631 remote-endpoint = <&hdmi_in_vp0>;
636 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
637 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;