1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright (c) 2022 FriendlyElec Computer Tech. Co., Ltd.
4 * (http://www.friendlyelec.com)
6 * Copyright (c) 2023 Tianling Shen <cnsztl@gmail.com>
10 #include "rk3568-nanopi-r5s.dtsi"
13 model = "FriendlyElec NanoPi R5C";
14 compatible = "friendlyarm,nanopi-r5c", "rockchip,rk3568";
17 compatible = "gpio-keys";
18 pinctrl-names = "default";
19 pinctrl-0 = <&reset_button_pin>;
22 debounce-interval = <50>;
23 gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
25 linux,code = <KEY_RESTART>;
30 compatible = "gpio-leds";
31 pinctrl-names = "default";
32 pinctrl-0 = <&lan_led_pin>, <&power_led_pin>, <&wan_led_pin>, <&wlan_led_pin>;
35 color = <LED_COLOR_ID_GREEN>;
36 function = LED_FUNCTION_LAN;
37 gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
40 power_led: led-power {
41 color = <LED_COLOR_ID_RED>;
42 function = LED_FUNCTION_POWER;
43 linux,default-trigger = "heartbeat";
44 gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
48 color = <LED_COLOR_ID_GREEN>;
49 function = LED_FUNCTION_WAN;
50 gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
54 color = <LED_COLOR_ID_GREEN>;
55 function = LED_FUNCTION_WLAN;
56 gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&pcie20_reset_pin>;
64 reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
70 reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
71 vpcie3v3-supply = <&vcc3v3_pcie>;
77 reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
78 vpcie3v3-supply = <&vcc3v3_pcie>;
84 lan_led_pin: lan-led-pin {
85 rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
88 power_led_pin: power-led-pin {
89 rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
92 wan_led_pin: wan-led-pin {
93 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
96 wlan_led_pin: wlan-led-pin {
97 rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
102 pcie20_reset_pin: pcie20-reset-pin {
103 rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
108 reset_button_pin: reset-button-pin {
109 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;