1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
10 model = "Pine64 RK3566 SoQuartz SOM";
11 compatible = "pine64,soquartz", "rockchip,rk3566";
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "gmac1_clkin";
32 compatible = "gpio-leds";
37 gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
38 linux,default-trigger = "heartbeat";
39 pinctrl-names = "default";
40 pinctrl-0 = <&diy_led_enable_h>;
41 retain-state-suspended;
47 default-state = "off";
48 gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
49 pinctrl-names = "default";
50 pinctrl-0 = <&work_led_enable_h>;
51 retain-state-suspended;
56 sdio_pwrseq: sdio-pwrseq {
58 compatible = "mmc-pwrseq-simple";
60 clock-names = "ext_clock";
61 pinctrl-names = "default";
62 pinctrl-0 = <&wifi_enable_h>;
63 reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
66 vbus: vbus-regulator {
67 compatible = "regulator-fixed";
68 regulator-name = "vbus";
71 regulator-min-microvolt = <5000000>;
72 regulator-max-microvolt = <5000000>;
75 /* sourced from vbus, vbus is provided by the carrier board */
76 vcc5v0_sys: vcc5v0-sys-regulator {
77 compatible = "regulator-fixed";
78 regulator-name = "vcc5v0_sys";
81 regulator-min-microvolt = <5000000>;
82 regulator-max-microvolt = <5000000>;
86 vcc3v3_sys: vcc3v3-sys-regulator {
87 compatible = "regulator-fixed";
88 regulator-name = "vcc3v3_sys";
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
93 vin-supply = <&vcc5v0_sys>;
98 cpu-supply = <&vdd_cpu>;
102 cpu-supply = <&vdd_cpu>;
106 cpu-supply = <&vdd_cpu>;
110 cpu-supply = <&vdd_cpu>;
114 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
115 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
116 clock_in_out = "input";
117 phy-supply = <&vcc_3v3>;
119 pinctrl-names = "default";
120 pinctrl-0 = <&gmac1m0_miim
126 snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
127 snps,reset-active-low;
128 /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
129 snps,reset-delays-us = <0 20000 100000>;
132 phy-handle = <&rgmii_phy1>;
140 * GPIO_ACTIVE_LOW + output-low here means that the pin is set
141 * to high, because output-low decides the value pre-inversion.
143 gpios = <RK_PA5 GPIO_ACTIVE_LOW>;
144 line-name = "nEXTRST";
150 mali-supply = <&vdd_gpu>;
157 vdd_cpu: regulator@1c {
158 compatible = "tcs,tcs4525";
160 fcs,suspend-voltage-selector = <1>;
161 regulator-name = "vdd_cpu";
162 regulator-min-microvolt = <800000>;
163 regulator-max-microvolt = <1150000>;
164 regulator-ramp-delay = <2300>;
167 vin-supply = <&vcc5v0_sys>;
169 regulator-state-mem {
170 regulator-off-in-suspend;
175 compatible = "rockchip,rk809";
177 interrupt-parent = <&gpio0>;
178 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
180 clock-output-names = "rk808-clkout1", "rk808-clkout2";
181 pinctrl-names = "default";
182 pinctrl-0 = <&pmic_int_l>;
183 rockchip,system-power-controller;
186 vcc1-supply = <&vcc3v3_sys>;
187 vcc2-supply = <&vcc3v3_sys>;
188 vcc3-supply = <&vcc3v3_sys>;
189 vcc4-supply = <&vcc3v3_sys>;
190 vcc5-supply = <&vcc3v3_sys>;
191 vcc6-supply = <&vcc3v3_sys>;
192 vcc7-supply = <&vcc3v3_sys>;
193 vcc8-supply = <&vcc3v3_sys>;
194 vcc9-supply = <&vcc3v3_sys>;
197 vdd_logic: DCDC_REG1 {
198 regulator-name = "vdd_logic";
201 regulator-min-microvolt = <500000>;
202 regulator-max-microvolt = <1350000>;
203 regulator-init-microvolt = <900000>;
204 regulator-ramp-delay = <6001>;
205 regulator-initial-mode = <0x2>;
206 regulator-state-mem {
207 regulator-on-in-suspend;
208 regulator-suspend-microvolt = <900000>;
213 regulator-name = "vdd_gpu";
216 regulator-min-microvolt = <500000>;
217 regulator-max-microvolt = <1350000>;
218 regulator-init-microvolt = <900000>;
219 regulator-ramp-delay = <6001>;
220 regulator-initial-mode = <0x2>;
221 regulator-state-mem {
222 regulator-off-in-suspend;
229 regulator-initial-mode = <0x2>;
230 regulator-name = "vcc_ddr";
231 regulator-state-mem {
232 regulator-on-in-suspend;
239 regulator-min-microvolt = <500000>;
240 regulator-max-microvolt = <1350000>;
241 regulator-init-microvolt = <900000>;
242 regulator-initial-mode = <0x2>;
243 regulator-name = "vdd_npu";
244 regulator-state-mem {
245 regulator-off-in-suspend;
250 regulator-name = "vcc_1v8";
253 regulator-min-microvolt = <1800000>;
254 regulator-max-microvolt = <1800000>;
255 regulator-state-mem {
256 regulator-on-in-suspend;
257 regulator-suspend-microvolt = <1800000>;
261 vdda0v9_image: LDO_REG1 {
264 regulator-min-microvolt = <900000>;
265 regulator-max-microvolt = <900000>;
266 regulator-name = "vdda0v9_image";
267 regulator-state-mem {
268 regulator-on-in-suspend;
269 regulator-suspend-microvolt = <900000>;
276 regulator-min-microvolt = <900000>;
277 regulator-max-microvolt = <900000>;
278 regulator-name = "vdda_0v9";
279 regulator-state-mem {
280 regulator-off-in-suspend;
284 vdda0v9_pmu: LDO_REG3 {
287 regulator-min-microvolt = <900000>;
288 regulator-max-microvolt = <900000>;
289 regulator-name = "vdda0v9_pmu";
290 regulator-state-mem {
291 regulator-on-in-suspend;
292 regulator-suspend-microvolt = <900000>;
296 vccio_acodec: LDO_REG4 {
299 regulator-min-microvolt = <3300000>;
300 regulator-max-microvolt = <3300000>;
301 regulator-name = "vccio_acodec";
302 regulator-state-mem {
303 regulator-off-in-suspend;
310 regulator-min-microvolt = <1800000>;
311 regulator-max-microvolt = <3300000>;
312 regulator-name = "vccio_sd";
313 regulator-state-mem {
314 regulator-off-in-suspend;
318 vcc3v3_pmu: LDO_REG6 {
321 regulator-min-microvolt = <3300000>;
322 regulator-max-microvolt = <3300000>;
323 regulator-name = "vcc3v3_pmu";
324 regulator-state-mem {
325 regulator-on-in-suspend;
326 regulator-suspend-microvolt = <3300000>;
333 regulator-min-microvolt = <1800000>;
334 regulator-max-microvolt = <1800000>;
335 regulator-name = "vcca_1v8";
336 regulator-state-mem {
337 regulator-off-in-suspend;
341 vcca1v8_pmu: LDO_REG8 {
344 regulator-min-microvolt = <1800000>;
345 regulator-max-microvolt = <1800000>;
346 regulator-name = "vcca1v8_pmu";
347 regulator-state-mem {
348 regulator-off-in-suspend;
352 vcca1v8_image: LDO_REG9 {
355 regulator-min-microvolt = <1800000>;
356 regulator-max-microvolt = <1800000>;
357 regulator-name = "vcca1v8_image";
358 regulator-state-mem {
359 regulator-off-in-suspend;
363 vcc_3v3: SWITCH_REG1 {
364 regulator-name = "vcc_3v3";
365 regulator-state-mem {
366 regulator-off-in-suspend;
370 vcc3v3_sd: SWITCH_REG2 {
371 regulator-name = "vcc3v3_sd";
373 regulator-state-mem {
374 regulator-on-in-suspend;
383 * i2c1 is exposed on CM1 / Module1A
384 * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu
385 * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu
392 * i2c2 is exposed on CM1 / Module1A
393 * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
394 * pin 58 - i2c2_sda_m1, pullup to vcc_3v3
397 pinctrl-names = "default";
398 pinctrl-0 = <&i2c2m1_xfer>;
403 * i2c3 is exposed on CM1 / Module1A
404 * pin 35 - i2c3_scl_m0, pullup to vcc_3v3
405 * pin 36 - i2c3_sda_m0, pullup to vcc_3v3
412 * i2c4 is exposed on CM2 / Module1B
413 * pin 45 - i2c4_scl_m1
414 * pin 47 - i2c4_sda_m1
417 pinctrl-names = "default";
418 pinctrl-0 = <&i2c4m1_xfer>;
423 * i2s1_8ch is exposed on CM1 / Module1A
424 * pin 24 - i2s1_sdi1_m1
425 * pin 25 - i2s1_sdo0_m1
426 * pin 26 - i2s1_lrck_tx_m1
427 * pin 27 - i2s1_sdi0_m1
428 * pin 29 - i2s1_sdi3_m1
429 * pin 30 - i2s1_sdi2_m1
430 * pin 40 - i2s1_sdo1_m1, shared with spi3
431 * pin 41 - i2s1_sdo2_m1
432 * pin 49 - i2s1_sclk_tx_m1
433 * pin 50 - i2s1_mclk_m1
434 * pin 56 - i2s1_sdo3_m1, shared with i2c2
437 pinctrl-names = "default";
438 pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx
439 &i2s1m1_lrcktx &i2s1m1_lrckrx
440 &i2s1m1_sdi0 &i2s1m1_sdi1
441 &i2s1m1_sdi2 &i2s1m1_sdi3
442 &i2s1m1_sdo0 &i2s1m1_sdo1
443 &i2s1m1_sdo2 &i2s1m1_sdo3>;
448 rgmii_phy1: ethernet-phy@0 {
449 compatible = "ethernet-phy-ieee802.3-c22";
457 bt_enable_h: bt-enable-h {
458 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
461 bt_host_wake_l: bt-host-wake-l {
462 rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
465 bt_wake_l: bt-wake-l {
466 rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
471 work_led_enable_h: work-led-enable-h {
472 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
475 diy_led_enable_h: diy-led-enable-h {
476 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
481 pmic_int_l: pmic-int-l {
482 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
487 wifi_enable_h: wifi-enable-h {
488 rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
494 pmuio1-supply = <&vcc3v3_pmu>;
495 pmuio2-supply = <&vcc3v3_pmu>;
496 vccio1-supply = <&vcc_3v3>;
497 vccio2-supply = <&vcc_1v8>;
498 vccio3-supply = <&vccio_sd>;
499 vccio4-supply = <&vcc_1v8>;
500 vccio5-supply = <&vcc_3v3>;
501 vccio6-supply = <&vcc_3v3>;
502 vccio7-supply = <&vcc_3v3>;
507 * saradc is exposed on CM1 / Module1A
508 * pin 94 - saradc_vin3
509 * pin 96 - saradc_vin2
512 vref-supply = <&vcca_1v8>;
520 vmmc-supply = <&vcc_3v3>;
521 vqmmc-supply = <&vcc_1v8>;
530 pinctrl-names = "default";
531 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
532 vqmmc-supply = <&vccio_sd>;
540 keep-power-in-suspend;
541 mmc-pwrseq = <&sdio_pwrseq>;
543 pinctrl-names = "default";
544 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
546 vmmc-supply = <&vcc3v3_sys>;
547 vqmmc-supply = <&vcc_1v8>;
552 * spi3 is exposed on CM1 / Module1A
553 * pin 37 - spi3_cs1_m0
554 * pin 38 - spi3_clk_m0
555 * pin 39 - spi3_cs0_m0
556 * pin 40 - spi3_miso_m0, shared with i2s1_8ch
557 * pin 44 - spi3_mosi_m0
568 pinctrl-names = "default";
569 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
574 compatible = "brcm,bcm43438-bt";
577 device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
578 host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
579 shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
580 pinctrl-names = "default";
581 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
582 vbat-supply = <&vcc3v3_sys>;
583 vddio-supply = <&vcca1v8_pmu>;
588 * uart2 is exposed on CM1 / Module1A
589 * pin 51 - uart2_rx_m0
590 * pin 55 - uart2_tx_m0
597 * uart7 is exposed on CM1 / Module1A
598 * pin 46 - uart7_tx_m2
599 * pin 47 - uart7_rx_m2
602 pinctrl-names = "default";
603 pinctrl-0 = <&uart7m2_xfer>;
607 /* dwc3_otg is the only usb port available */