1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include "rk3566-soquartz.dtsi"
8 model = "Pine64 RK3566 SoQuartz with CM4-IO Carrier Board";
9 compatible = "pine64,soquartz-cm4io", "pine64,soquartz", "rockchip,rk3566";
11 /* labeled +12v in schematic */
12 vcc12v_dcin: vcc12v-dcin-regulator {
13 compatible = "regulator-fixed";
14 regulator-name = "vcc12v_dcin";
17 regulator-min-microvolt = <12000000>;
18 regulator-max-microvolt = <12000000>;
21 /* labeled +5v in schematic */
22 vcc_5v: vcc-5v-regulator {
23 compatible = "regulator-fixed";
24 regulator-name = "vcc_5v";
27 regulator-min-microvolt = <5000000>;
28 regulator-max-microvolt = <5000000>;
29 vin-supply = <&vcc12v_dcin>;
32 vcc_sd_pwr: vcc-sd-pwr-regulator {
33 compatible = "regulator-fixed";
34 regulator-name = "vcc_sd_pwr";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
39 vin-supply = <&vcc3v3_sys>;
48 * i2c1 is exposed on CM1 / Module1A
49 * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu
50 * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu
56 * the rtc interrupt is tied to PMIC_PWRON,
57 * it will force reset the board if triggered.
60 compatible = "nxp,pcf85063";
66 * i2c2 is exposed on CM1 / Module1A - to PI40
67 * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
68 * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3
75 * i2c3 is exposed on CM1 / Module1A - to PI40
76 * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3
77 * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3
84 * i2c4 is exposed on CM2 / Module1B - to PI40
85 * pin 45 - GPIO24 - i2c4_scl_m1
86 * pin 47 - GPIO23 - i2c4_sda_m1
93 * i2s1_8ch is exposed on CM1 / Module1A - to PI40
94 * pin 24 - GPIO26 - i2s1_sdi1_m1
95 * pin 25 - GPIO21 - i2s1_sdo0_m1
96 * pin 26 - GPIO19 - i2s1_lrck_tx_m1
97 * pin 27 - GPIO20 - i2s1_sdi0_m1
98 * pin 29 - GPIO16 - i2s1_sdi3_m1
99 * pin 30 - GPIO6 - i2s1_sdi2_m1
100 * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3
101 * pin 41 - GPIO25 - i2s1_sdo2_m1
102 * pin 49 - GPIO18 - i2s1_sclk_tx_m1
103 * pin 50 - GPIO17 - i2s1_mclk_m1
104 * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2
123 * saradc is exposed on CM1 / Module1A - to J2
124 * pin 94 - AIN1 - saradc_vin3
125 * pin 96 - AIN0 - saradc_vin2
132 vmmc-supply = <&vcc_sd_pwr>;
137 * spi3 is exposed on CM1 / Module1A - to PI40
138 * pin 37 - GPIO7 - spi3_cs1_m0
139 * pin 38 - GPIO11 - spi3_clk_m0
140 * pin 39 - GPIO8 - spi3_cs0_m0
141 * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch
142 * pin 44 - GPIO10 - spi3_mosi_m0
149 * uart2 is exposed on CM1 / Module1A - to PI40
150 * pin 51 - GPIO15 - uart2_rx_m0
151 * pin 55 - GPIO14 - uart2_tx_m0
158 * uart7 is exposed on CM1 / Module1A - to PI40
159 * pin 46 - GPIO22 - uart7_tx_m2
160 * pin 47 - GPIO23 - uart7_rx_m2
171 phy-supply = <&vcc_5v>;
180 vin-supply = <&vcc_5v>;