1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2022 Radxa Limited
4 * Copyright (c) 2022 Amarula Solutions(India)
8 #include <dt-bindings/soc/rockchip,vop2.h>
10 #include "rk3566-radxa-cm3.dtsi"
13 model = "Radxa Compute Module 3(CM3) IO Board";
14 compatible = "radxa,cm3-io", "radxa,cm3", "rockchip,rk3566";
21 stdout-path = "serial2:1500000n8";
24 gmac1_clkin: external-gmac1-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
27 clock-output-names = "gmac1_clkin";
32 compatible = "hdmi-connector";
36 hdmi_con_in: endpoint {
37 remote-endpoint = <&hdmi_out_con>;
43 compatible = "gpio-leds";
46 gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_LOW>;
47 color = <LED_COLOR_ID_GREEN>;
48 function = LED_FUNCTION_ACTIVITY;
49 linux,default-trigger = "heartbeat";
50 pinctrl-names = "default";
51 pinctrl-0 = <&pi_nled_activity>;
55 vcc5v0_usb30: vcc5v0-usb30-regulator {
56 compatible = "regulator-fixed";
57 regulator-name = "vcc5v0_usb30";
59 gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
60 pinctrl-names = "default";
61 pinctrl-0 = <&vcc5v0_usb30_en_h>;
63 regulator-min-microvolt = <5000000>;
64 regulator-max-microvolt = <5000000>;
65 vin-supply = <&vcc_sys>;
68 vcca1v8_image: vcca1v8-image-regulator {
69 compatible = "regulator-fixed";
70 regulator-name = "vcca1v8_image";
73 regulator-min-microvolt = <1800000>;
74 regulator-max-microvolt = <1800000>;
75 vin-supply = <&vcc_1v8_p>;
78 vdda0v9_image: vdda0v9-image-regulator {
79 compatible = "regulator-fixed";
80 regulator-name = "vcca0v9_image";
83 regulator-min-microvolt = <900000>;
84 regulator-max-microvolt = <900000>;
85 vin-supply = <&vdda_0v9>;
94 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
95 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>;
96 assigned-clock-rates = <0>, <125000000>;
97 clock_in_out = "input";
98 phy-handle = <&rgmii_phy1>;
100 pinctrl-names = "default";
101 pinctrl-0 = <&gmac1m0_miim
107 snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
108 snps,reset-active-low;
109 /* Reset time is 20ms, 100ms for rtl8211f */
110 snps,reset-delays-us = <0 20000 100000>;
117 avdd-0v9-supply = <&vdda0v9_image>;
118 avdd-1v8-supply = <&vcca1v8_image>;
123 hdmi_in_vp0: endpoint {
124 remote-endpoint = <&vp0_out_hdmi>;
129 hdmi_out_con: endpoint {
130 remote-endpoint = <&hdmi_con_in>;
139 rgmii_phy1: ethernet-phy@0 {
140 compatible = "ethernet-phy-ieee802.3-c22";
147 gmac1m0_miim: gmac1m0-miim {
150 <3 RK_PC4 3 &pcfg_pull_none_drv_level_15>,
152 <3 RK_PC5 3 &pcfg_pull_none_drv_level_15>;
155 gmac1m0_rx_bus2: gmac1m0-rx-bus2 {
158 <3 RK_PB1 3 &pcfg_pull_none_drv_level_15>,
160 <3 RK_PB2 3 &pcfg_pull_none_drv_level_15>,
161 /* gmac1_rxdvcrsm0 */
162 <3 RK_PB3 3 &pcfg_pull_none_drv_level_15>;
165 gmac1m0_tx_bus2: gmac1m0-tx-bus2 {
168 <3 RK_PB5 3 &pcfg_pull_none_drv_level_15>,
170 <3 RK_PB6 3 &pcfg_pull_none_drv_level_15>,
172 <3 RK_PB7 3 &pcfg_pull_none_drv_level_15>;
175 gmac1m0_rgmii_clk: gmac1m0-rgmii-clk {
178 <3 RK_PA7 3 &pcfg_pull_none_drv_level_15>,
180 <3 RK_PA6 3 &pcfg_pull_none_drv_level_15>;
183 gmac1m0_rgmii_bus: gmac1m0-rgmii-bus {
186 <3 RK_PA4 3 &pcfg_pull_none_drv_level_15>,
188 <3 RK_PA5 3 &pcfg_pull_none_drv_level_15>,
190 <3 RK_PA2 3 &pcfg_pull_none_drv_level_15>,
192 <3 RK_PA3 3 &pcfg_pull_none_drv_level_15>;
195 gmac1m0_clkinout: gmac1m0-clkinout {
197 /* gmac1_mclkinoutm0 */
198 <3 RK_PC0 3 &pcfg_pull_none_drv_level_15>;
203 pi_nled_activity: pi-nled-activity {
204 rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
209 sdmmc_pwren: sdmmc-pwren {
210 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
215 vcc5v0_usb30_en_h: vcc5v0-host-en-h {
216 rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
226 vqmmc-supply = <&vccio_sd>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_pwren>;
237 phy-supply = <&vcc5v0_usb30>;
266 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
267 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
276 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
277 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
278 remote-endpoint = <&hdmi_in_vp0>;