1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/linux-event-codes.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include "rk3566-anbernic-rgxx3.dtsi"
11 backlight: backlight {
12 compatible = "pwm-backlight";
13 power-supply = <&vcc_sys>;
14 pwms = <&pwm4 0 25000 0>;
19 assigned-clocks = <&pmucru CLK_RTC_32K>, <&cru PLL_GPLL>,
20 <&pmucru PLL_PPLL>, <&cru PLL_VPLL>;
21 assigned-clock-rates = <32768>, <1200000000>,
22 <200000000>, <241500000>;
37 dsi0_in_vp1: endpoint {
38 remote-endpoint = <&vp1_out_dsi0>;
44 mipi_out_panel: endpoint {
45 remote-endpoint = <&mipi_in_panel>;
51 compatible = "anbernic,rg353p-panel", "newvision,nv3051d";
53 backlight = <&backlight>;
54 pinctrl-names = "default";
55 pinctrl-0 = <&lcd_rst>;
56 reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>;
57 vdd-supply = <&vcc3v3_lcd0_n>;
60 mipi_in_panel: endpoint {
61 remote-endpoint = <&mipi_out_panel>;
69 gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
71 linux,code = <BTN_EAST>;
75 gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
77 linux,code = <BTN_DPAD_LEFT>;
81 gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
83 linux,code = <BTN_DPAD_RIGHT>;
87 gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
89 linux,code = <BTN_WEST>;
94 /* This hardware is physically present but unused. */
96 compatible = "cellwise,cw2015";
106 <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
116 vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {
117 reg = <ROCKCHIP_VOP2_EP_MIPI0>;
118 remote-endpoint = <&dsi0_in_vp1>;