1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
6 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399-opp.dtsi"
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&led_pin_module>;
18 gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_HIGH>;
19 linux,default-trigger = "heartbeat";
25 * Overwrite the opp-table for CPUB as this board uses a different
26 * regulator (FAN53555) that only allows 10mV steps and therefore
27 * can't reach the operation point target voltages from rk3399-opp.dtsi
29 /delete-node/ opp-table1;
30 cluster1_opp: opp-table1 {
31 compatible = "operating-points-v2";
35 opp-hz = /bits/ 64 <408000000>;
36 opp-microvolt = <800000>;
37 clock-latency-ns = <40000>;
40 opp-hz = /bits/ 64 <600000000>;
41 opp-microvolt = <800000>;
44 opp-hz = /bits/ 64 <816000000>;
45 opp-microvolt = <830000>;
49 opp-hz = /bits/ 64 <1008000000>;
50 opp-microvolt = <880000>;
53 opp-hz = /bits/ 64 <1200000000>;
54 opp-microvolt = <950000>;
57 opp-hz = /bits/ 64 <1416000000>;
58 opp-microvolt = <1030000>;
61 opp-hz = /bits/ 64 <1608000000>;
62 opp-microvolt = <1100000>;
65 opp-hz = /bits/ 64 <1800000000>;
66 opp-microvolt = <1200000>;
69 opp-hz = /bits/ 64 <1992000000>;
70 opp-microvolt = <1230000>;
75 clkin_gmac: external-gmac-clock {
76 compatible = "fixed-clock";
77 clock-frequency = <125000000>;
78 clock-output-names = "clkin_gmac";
82 vcc1v2_phy: vcc1v2-phy {
83 compatible = "regulator-fixed";
84 regulator-name = "vcc1v2_phy";
87 regulator-min-microvolt = <1200000>;
88 regulator-max-microvolt = <1200000>;
89 vin-supply = <&vcc5v0_sys>;
92 vcc3v3_sys: vcc3v3-sys {
93 compatible = "regulator-fixed";
94 regulator-name = "vcc3v3_sys";
97 regulator-min-microvolt = <3300000>;
98 regulator-max-microvolt = <3300000>;
99 vin-supply = <&vcc5v0_sys>;
102 vcc5v0_host: vcc5v0-host-regulator {
103 compatible = "regulator-fixed";
104 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&vcc5v0_host_en>;
107 regulator-name = "vcc5v0_host";
109 vin-supply = <&vcc5v0_sys>;
112 vcc5v0_sys: vcc5v0-sys {
113 compatible = "regulator-fixed";
114 regulator-name = "vcc5v0_sys";
117 regulator-min-microvolt = <5000000>;
118 regulator-max-microvolt = <5000000>;
123 cpu-supply = <&vdd_cpu_b>;
127 cpu-supply = <&vdd_cpu_b>;
131 cpu-supply = <&vdd_cpu_l>;
135 cpu-supply = <&vdd_cpu_l>;
139 cpu-supply = <&vdd_cpu_l>;
143 cpu-supply = <&vdd_cpu_l>;
148 drive-impedance-ohm = <33>;
152 assigned-clocks = <&cru SCLK_RMII_SRC>;
153 assigned-clock-parents = <&clkin_gmac>;
154 clock_in_out = "input";
155 phy-supply = <&vcc1v2_phy>;
157 pinctrl-names = "default";
158 pinctrl-0 = <&rgmii_pins>;
159 snps,reset-gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
160 snps,reset-active-low;
161 snps,reset-delays-us = <0 10000 50000>;
169 i2c-scl-rising-time-ns = <168>;
170 i2c-scl-falling-time-ns = <4>;
171 clock-frequency = <400000>;
174 compatible = "rockchip,rk808";
176 interrupt-parent = <&gpio1>;
177 interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
179 clock-output-names = "xin32k", "rk808-clkout2";
180 pinctrl-names = "default";
181 pinctrl-0 = <&pmic_int_l>;
182 rockchip,system-power-controller;
185 vcc1-supply = <&vcc5v0_sys>;
186 vcc2-supply = <&vcc5v0_sys>;
187 vcc3-supply = <&vcc5v0_sys>;
188 vcc4-supply = <&vcc5v0_sys>;
189 vcc6-supply = <&vcc5v0_sys>;
190 vcc7-supply = <&vcc5v0_sys>;
191 vcc8-supply = <&vcc3v3_sys>;
192 vcc9-supply = <&vcc5v0_sys>;
193 vcc10-supply = <&vcc5v0_sys>;
194 vcc11-supply = <&vcc5v0_sys>;
195 vcc12-supply = <&vcc3v3_sys>;
196 vddio-supply = <&vcc1v8_pmu>;
199 vdd_center: DCDC_REG1 {
200 regulator-name = "vdd_center";
201 regulator-min-microvolt = <750000>;
202 regulator-max-microvolt = <1350000>;
203 regulator-ramp-delay = <6001>;
206 regulator-state-mem {
207 regulator-off-in-suspend;
211 vdd_cpu_l: DCDC_REG2 {
212 regulator-name = "vdd_cpu_l";
213 regulator-min-microvolt = <750000>;
214 regulator-max-microvolt = <1350000>;
215 regulator-ramp-delay = <6001>;
218 regulator-state-mem {
219 regulator-off-in-suspend;
224 regulator-name = "vcc_ddr";
227 regulator-state-mem {
228 regulator-on-in-suspend;
233 regulator-name = "vcc_1v8";
234 regulator-min-microvolt = <1800000>;
235 regulator-max-microvolt = <1800000>;
238 regulator-state-mem {
239 regulator-on-in-suspend;
240 regulator-suspend-microvolt = <1800000>;
245 regulator-name = "vcc_ldo1";
246 regulator-min-microvolt = <1800000>;
247 regulator-max-microvolt = <1800000>;
249 regulator-state-mem {
250 regulator-off-in-suspend;
254 vcc1v8_hdmi: LDO_REG2 {
255 regulator-name = "vcc1v8_hdmi";
256 regulator-min-microvolt = <1800000>;
257 regulator-max-microvolt = <1800000>;
260 regulator-state-mem {
261 regulator-off-in-suspend;
265 vcc1v8_pmu: LDO_REG3 {
266 regulator-name = "vcc1v8_pmu";
267 regulator-min-microvolt = <1800000>;
268 regulator-max-microvolt = <1800000>;
271 regulator-state-mem {
272 regulator-on-in-suspend;
273 regulator-suspend-microvolt = <1800000>;
278 regulator-name = "vcc_sd";
279 regulator-min-microvolt = <1800000>;
280 regulator-max-microvolt = <3000000>;
283 regulator-state-mem {
284 regulator-on-in-suspend;
285 regulator-suspend-microvolt = <3000000>;
290 regulator-name = "vcc_ldo5";
291 regulator-min-microvolt = <3000000>;
292 regulator-max-microvolt = <3000000>;
294 regulator-state-mem {
295 regulator-off-in-suspend;
300 regulator-name = "vcc_ldo6";
301 regulator-min-microvolt = <1500000>;
302 regulator-max-microvolt = <1500000>;
304 regulator-state-mem {
305 regulator-off-in-suspend;
309 vcc0v9_hdmi: LDO_REG7 {
310 regulator-name = "vcc0v9_hdmi";
311 regulator-min-microvolt = <900000>;
312 regulator-max-microvolt = <900000>;
315 regulator-state-mem {
316 regulator-off-in-suspend;
320 vcc_efuse: LDO_REG8 {
321 regulator-name = "vcc_efuse";
322 regulator-min-microvolt = <1800000>;
323 regulator-max-microvolt = <1800000>;
326 regulator-state-mem {
327 regulator-off-in-suspend;
331 vcc3v3_s3: SWITCH_REG1 {
332 regulator-name = "vcc3v3_s3";
335 regulator-state-mem {
336 regulator-off-in-suspend;
340 vcc3v3_s0: SWITCH_REG2 {
341 regulator-name = "vcc3v3_s0";
344 regulator-state-mem {
345 regulator-off-in-suspend;
351 vdd_gpu: regulator@60 {
352 compatible = "fcs,fan53555";
354 fcs,suspend-voltage-selector = <1>;
355 regulator-name = "vdd_gpu";
356 regulator-min-microvolt = <600000>;
357 regulator-max-microvolt = <1230000>;
358 regulator-ramp-delay = <1000>;
361 vin-supply = <&vcc5v0_sys>;
367 clock-frequency = <400000>;
370 compatible = "ti,amc6821";
372 #cooling-cells = <2>;
376 compatible = "isil,isl1208";
383 clock-frequency = <400000>;
385 vdd_cpu_b: regulator@60 {
386 compatible = "fcs,fan53555";
388 vin-supply = <&vcc5v0_sys>;
389 regulator-name = "vdd_cpu_b";
390 regulator-min-microvolt = <600000>;
391 regulator-max-microvolt = <1230000>;
392 regulator-ramp-delay = <1000>;
393 fcs,suspend-voltage-selector = <1>;
400 pinctrl-0 = <&i2s0_2ch_bus>;
401 rockchip,playback-channels = <2>;
402 rockchip,capture-channels = <2>;
407 * As Q7 does not specify neither a global nor a RX clock for I2S these
408 * signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.
409 * Therefore we have to redefine the i2s0_2ch_bus definition to prevent
414 <3 RK_PD0 1 &pcfg_pull_none>,
415 <3 RK_PD2 1 &pcfg_pull_none>,
416 <3 RK_PD3 1 &pcfg_pull_none>,
417 <3 RK_PD7 1 &pcfg_pull_none>;
422 bt656-supply = <&vcc_1v8>;
423 audio-supply = <&vcc_1v8>;
424 sdmmc-supply = <&vcc_sd>;
425 gpio1830-supply = <&vcc_1v8>;
430 pmu1830-supply = <&vcc_1v8>;
439 i2c8_xfer_a: i2c8-xfer {
441 <1 RK_PC4 1 &pcfg_pull_up>,
442 <1 RK_PC5 1 &pcfg_pull_up>;
447 led_pin_module: led-module-gpio {
449 <2 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
454 pmic_int_l: pmic-int-l {
456 <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
461 vcc5v0_host_en: vcc5v0-host-en {
463 <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
470 * Signal integrity isn't great at 200MHz but 100MHz has proven stable
473 max-frequency = <100000000>;
477 mmc-hs400-enhanced-strobe;
490 compatible = "jedec,spi-nor";
492 spi-max-frequency = <50000000>;
501 rockchip,hw-tshut-mode = <1>;
502 rockchip,hw-tshut-polarity = <1>;
509 u2phy1_otg: otg-port {
513 u2phy1_host: host-port {
514 phy-supply = <&vcc5v0_host>;