1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Kevin Rev 6+ board device tree source
5 * Copyright 2016-2017 Google, Inc
9 #include "rk3399-gru-chromebook.dtsi"
10 #include <dt-bindings/input/linux-event-codes.h>
13 * Kevin-specific things
15 * Things in this section should use names from Kevin schematic since no
16 * equivalent exists in Gru schematic. If referring to signals that exist
17 * in Gru we use the Gru names, though. Confusing enough for you?
20 model = "Google Kevin";
21 compatible = "google,kevin-rev15", "google,kevin-rev14",
22 "google,kevin-rev13", "google,kevin-rev12",
23 "google,kevin-rev11", "google,kevin-rev10",
24 "google,kevin-rev9", "google,kevin-rev8",
25 "google,kevin-rev7", "google,kevin-rev6",
26 "google,kevin", "google,gru", "rockchip,rk3399";
27 chassis-type = "convertible";
31 p3_3v_dig: p3-3v-dig {
32 compatible = "regulator-fixed";
33 regulator-name = "p3.3v_dig";
34 pinctrl-names = "default";
35 pinctrl-0 = <&cpu3_pen_pwr_en>;
38 gpio = <&gpio4 30 GPIO_ACTIVE_HIGH>;
39 vin-supply = <&pp3300>;
42 edp_panel: edp-panel {
43 compatible = "sharp,lq123p1jx31";
44 backlight = <&backlight>;
45 power-supply = <&pp3300_disp>;
48 clock-frequency = <266666667>;
62 panel_in_edp: endpoint {
63 remote-endpoint = <&edp_out_panel>;
68 thermistor_ppvar_bigcpu: thermistor-ppvar-bigcpu {
69 compatible = "murata,ncp15wb473";
70 pullup-uv = <1800000>;
73 io-channels = <&saradc 2>;
74 #thermal-sensor-cells = <0>;
77 thermistor_ppvar_litcpu: thermistor-ppvar-litcpu {
78 compatible = "murata,ncp15wb473";
79 pullup-uv = <1800000>;
82 io-channels = <&saradc 3>;
83 #thermal-sensor-cells = <0>;
88 pwms = <&cros_ec_pwm 1>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&bt_host_wake_l>, <&cpu1_pen_eject>;
97 /* Insert = low, eject = high */
98 gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
99 linux,code = <SW_PEN_INSERTED>;
100 linux,input-type = <EV_SW>;
106 bigcpu_reg_thermal: bigcpu-reg-thermal {
107 polling-delay-passive = <100>; /* milliseconds */
108 polling-delay = <1000>; /* milliseconds */
109 thermal-sensors = <&thermistor_ppvar_bigcpu 0>;
110 sustainable-power = <4000>;
112 ppvar_bigcpu_trips: trips {
113 ppvar_bigcpu_on: ppvar-bigcpu-on {
114 temperature = <40000>; /* millicelsius */
115 hysteresis = <2000>; /* millicelsius */
119 ppvar_bigcpu_alert: ppvar-bigcpu-alert {
120 temperature = <50000>; /* millicelsius */
121 hysteresis = <2000>; /* millicelsius */
125 ppvar_bigcpu_crit: ppvar-bigcpu-crit {
126 temperature = <90000>; /* millicelsius */
127 hysteresis = <0>; /* millicelsius */
134 trip = <&ppvar_bigcpu_alert>;
136 <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
137 <&cpu_l1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
138 <&cpu_l2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
139 <&cpu_l3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
140 contribution = <4096>;
143 trip = <&ppvar_bigcpu_alert>;
145 <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
146 <&cpu_b1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
147 contribution = <1024>;
152 litcpu_reg_thermal: litcpu-reg-thermal {
153 polling-delay-passive = <100>; /* milliseconds */
154 polling-delay = <1000>; /* milliseconds */
155 thermal-sensors = <&thermistor_ppvar_litcpu 0>;
156 sustainable-power = <4000>;
158 ppvar_litcpu_trips: trips {
159 ppvar_litcpu_on: ppvar-litcpu-on {
160 temperature = <40000>; /* millicelsius */
161 hysteresis = <2000>; /* millicelsius */
165 ppvar_litcpu_alert: ppvar-litcpu-alert {
166 temperature = <50000>; /* millicelsius */
167 hysteresis = <2000>; /* millicelsius */
171 ppvar_litcpu_crit: ppvar-litcpu-crit {
172 temperature = <90000>; /* millicelsius */
173 hysteresis = <0>; /* millicelsius */
183 clock-frequency = <400000>;
185 /* These are relatively safe rise/fall times. */
186 i2c-scl-falling-time-ns = <50>;
187 i2c-scl-rising-time-ns = <300>;
190 compatible = "infineon,slb9645tt";
192 powered-while-suspended;
199 clock-frequency = <400000>;
201 /* These are relatively safe rise/fall times. */
202 i2c-scl-falling-time-ns = <50>;
203 i2c-scl-rising-time-ns = <300>;
205 digitizer: digitizer@9 {
207 compatible = "hid-over-i2c";
209 pinctrl-names = "default";
210 pinctrl-0 = <&cpu1_dig_irq_l &cpu1_dig_pdct_l>;
212 vdd-supply = <&p3_3v_dig>;
213 post-power-on-delay-ms = <100>;
215 interrupt-parent = <&gpio2>;
216 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
218 hid-descr-addr = <0x1>;
222 /* Adjustments to things in the gru baseboard */
226 compatible = "atmel,maxtouch";
228 pinctrl-names = "default";
229 pinctrl-0 = <&trackpad_int_l>;
230 interrupt-parent = <&gpio1>;
231 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
232 linux,gpio-keymap = <KEY_RESERVED
242 compatible = "atmel,maxtouch";
244 pinctrl-names = "default";
245 pinctrl-0 = <&touch_int_l>;
246 interrupt-parent = <&gpio3>;
247 interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
252 regulator-min-microvolt = <798674>;
253 regulator-max-microvolt = <1302172>;
257 regulator-min-microvolt = <798674>;
258 regulator-max-microvolt = <1302172>;
259 ctrl-voltage-range = <798674 1302172>;
263 regulator-min-microvolt = <799065>;
264 regulator-max-microvolt = <1303738>;
268 regulator-min-microvolt = <799065>;
269 regulator-max-microvolt = <1303738>;
270 ctrl-voltage-range = <799065 1303738>;
274 regulator-min-microvolt = <785782>;
275 regulator-max-microvolt = <1217729>;
279 regulator-min-microvolt = <785782>;
280 regulator-max-microvolt = <1217729>;
281 ctrl-voltage-range = <785782 1217729>;
284 &ppvar_centerlogic_pwm {
285 regulator-min-microvolt = <800069>;
286 regulator-max-microvolt = <1049692>;
290 regulator-min-microvolt = <800069>;
291 regulator-max-microvolt = <1049692>;
292 ctrl-voltage-range = <800069 1049692>;
297 vref-supply = <&pp1800_ap_io>;
301 marvell,wakeup-pin = <14>; /* GPIO_14 on Marvell */
306 /* Has external pullup */
307 cpu1_dig_irq_l: cpu1-dig-irq-l {
308 rockchip,pins = <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
311 /* Has external pullup */
312 cpu1_dig_pdct_l: cpu1-dig-pdct-l {
313 rockchip,pins = <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
317 discrete-regulators {
318 cpu3_pen_pwr_en: cpu3-pen-pwr-en {
319 rockchip,pins = <4 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
324 cpu1_pen_eject: cpu1-pen-eject {
325 rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;