arch/arm64/boot/dts/rockchip/rk3399-gru-chromebook.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Google Gru-Chromebook shared properties
   4  *
   5  * Copyright 2018 Google, Inc
   6  */
   7
   8 #include "rk3399-gru.dtsi"
   9
  10 / {
  11         pp900_ap: pp900-ap {
  12                 compatible = "regulator-fixed";
  13                 regulator-name = "pp900_ap";
  14
  15                 /* EC turns on w/ pp900_ap_en; always on for AP */
  16                 regulator-always-on;
  17                 regulator-boot-on;
  18                 regulator-min-microvolt = <900000>;
  19                 regulator-max-microvolt = <900000>;
  20
  21                 vin-supply = <&ppvar_sys>;
  22         };
  23
  24         /* EC turns on w/ pp900_usb_en */
  25         pp900_usb: pp900-ap {
  26         };
  27
  28         /* EC turns on w/ pp900_pcie_en */
  29         pp900_pcie: pp900-ap {
  30         };
  31
  32         pp3000: pp3000 {
  33                 compatible = "regulator-fixed";
  34                 regulator-name = "pp3000";
  35                 pinctrl-names = "default";
  36                 pinctrl-0 = <&pp3000_en>;
  37
  38                 enable-active-high;
  39                 gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
  40
  41                 regulator-always-on;
  42                 regulator-boot-on;
  43                 regulator-min-microvolt = <3000000>;
  44                 regulator-max-microvolt = <3000000>;
  45
  46                 vin-supply = <&ppvar_sys>;
  47         };
  48
  49         ppvar_centerlogic_pwm: ppvar-centerlogic-pwm {
  50                 compatible = "pwm-regulator";
  51                 regulator-name = "ppvar_centerlogic_pwm";
  52
  53                 pwms = <&pwm3 0 3337 0>;
  54                 pwm-supply = <&ppvar_sys>;
  55                 pwm-dutycycle-range = <100 0>;
  56                 pwm-dutycycle-unit = <100>;
  57
  58                 /* EC turns on w/ ppvar_centerlogic_en; always on for AP */
  59                 regulator-always-on;
  60                 regulator-boot-on;
  61                 regulator-min-microvolt = <799434>;
  62                 regulator-max-microvolt = <1049925>;
  63         };
  64
  65         ppvar_centerlogic: ppvar-centerlogic {
  66                 compatible = "vctrl-regulator";
  67                 regulator-name = "ppvar_centerlogic";
  68
  69                 regulator-min-microvolt = <799434>;
  70                 regulator-max-microvolt = <1049925>;
  71
  72                 ctrl-supply = <&ppvar_centerlogic_pwm>;
  73                 ctrl-voltage-range = <799434 1049925>;
  74
  75                 regulator-settling-time-up-us = <378>;
  76                 min-slew-down-rate = <225>;
  77                 ovp-threshold-percent = <16>;
  78         };
  79
  80         /* Schematics call this PPVAR even though it's fixed */
  81         ppvar_logic: ppvar-logic {
  82                 compatible = "regulator-fixed";
  83                 regulator-name = "ppvar_logic";
  84
  85                 /* EC turns on w/ ppvar_logic_en; always on for AP */
  86                 regulator-always-on;
  87                 regulator-boot-on;
  88                 regulator-min-microvolt = <900000>;
  89                 regulator-max-microvolt = <900000>;
  90
  91                 vin-supply = <&ppvar_sys>;
  92         };
  93
  94         pp1800_audio: pp1800-audio {
  95                 compatible = "regulator-fixed";
  96                 regulator-name = "pp1800_audio";
  97                 pinctrl-names = "default";
  98                 pinctrl-0 = <&pp1800_audio_en>;
  99
 100                 enable-active-high;
 101                 gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
 102
 103                 regulator-always-on;
 104                 regulator-boot-on;
 105
 106                 vin-supply = <&pp1800>;
 107         };
 108
 109         /* gpio is shared with pp3300_wifi_bt */
 110         pp1800_pcie: pp1800-pcie {
 111                 compatible = "regulator-fixed";
 112                 regulator-name = "pp1800_pcie";
 113                 pinctrl-names = "default";
 114                 pinctrl-0 = <&wlan_module_pd_l>;
 115
 116                 enable-active-high;
 117                 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 118
 119                 /*
 120                  * Need to wait 1ms + ramp-up time before we can power on WiFi.
 121                  * This has been approximated as 8ms total.
 122                  */
 123                 regulator-enable-ramp-delay = <8000>;
 124
 125                 vin-supply = <&pp1800>;
 126         };
 127
 128         /* Always on; plain and simple */
 129         pp3000_ap: pp3000_emmc: pp3000 {
 130         };
 131
 132         pp1500_ap_io: pp1500-ap-io {
 133                 compatible = "regulator-fixed";
 134                 regulator-name = "pp1500_ap_io";
 135                 pinctrl-names = "default";
 136                 pinctrl-0 = <&pp1500_en>;
 137
 138                 enable-active-high;
 139                 gpio = <&gpio0 10 GPIO_ACTIVE_HIGH>;
 140
 141                 regulator-always-on;
 142                 regulator-boot-on;
 143                 regulator-min-microvolt = <1500000>;
 144                 regulator-max-microvolt = <1500000>;
 145
 146                 vin-supply = <&pp1800>;
 147         };
 148
 149         pp3300_disp: pp3300-disp {
 150                 compatible = "regulator-fixed";
 151                 regulator-name = "pp3300_disp";
 152                 pinctrl-names = "default";
 153                 pinctrl-0 = <&pp3300_disp_en>;
 154
 155                 enable-active-high;
 156                 gpio = <&gpio4 27 GPIO_ACTIVE_HIGH>;
 157
 158                 startup-delay-us = <2000>;
 159                 vin-supply = <&pp3300>;
 160         };
 161
 162         /* EC turns on w/ pp3300_usb_en_l */
 163         pp3300_usb: pp3300 {
 164         };
 165
 166         /* gpio is shared with pp1800_pcie and pinctrl is set there */
 167         pp3300_wifi_bt: pp3300-wifi-bt {
 168                 compatible = "regulator-fixed";
 169                 regulator-name = "pp3300_wifi_bt";
 170
 171                 enable-active-high;
 172                 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
 173
 174                 vin-supply = <&pp3300>;
 175         };
 176
 177         /*
 178          * This is a bit of a hack. The WiFi module should be reset at least
 179          * 1ms after its regulators have ramped up (max rampup time is ~7ms).
 180          * With some stretching of the imagination, we can call the 1.8V
 181          * regulator a supply.
 182          */
 183         wlan_pd_n: wlan-pd-n {
 184                 compatible = "regulator-fixed";
 185                 regulator-name = "wlan_pd_n";
 186                 pinctrl-names = "default";
 187                 pinctrl-0 = <&wlan_module_reset_l>;
 188
 189                 enable-active-high;
 190                 gpio = <&gpio1 11 GPIO_ACTIVE_HIGH>;
 191
 192                 vin-supply = <&pp1800_pcie>;
 193         };
 194
 195         backlight: backlight {
 196                 compatible = "pwm-backlight";
 197                 enable-gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
 198                 power-supply = <&pp3300_disp>;
 199                 pinctrl-names = "default";
 200                 pinctrl-0 = <&bl_en>;
 201                 pwm-delay-us = <10000>;
 202         };
 203
 204         gpio_keys: gpio-keys {
 205                 compatible = "gpio-keys";
 206                 pinctrl-names = "default";
 207                 pinctrl-0 = <&bt_host_wake_l>;
 208
 209                 wake_on_bt: key-wake-on-bt {
 210                         label = "Wake-on-Bluetooth";
 211                         gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
 212                         linux,code = <KEY_WAKEUP>;
 213                         wakeup-source;
 214                 };
 215         };
 216 };
 217
 218 &ppvar_bigcpu {
 219         min-slew-down-rate = <225>;
 220         ovp-threshold-percent = <16>;
 221 };
 222
 223 &ppvar_litcpu {
 224         min-slew-down-rate = <225>;
 225         ovp-threshold-percent = <16>;
 226 };
 227
 228 &ppvar_gpu {
 229         min-slew-down-rate = <225>;
 230         ovp-threshold-percent = <16>;
 231 };
 232
 233 &cdn_dp {
 234         extcon = <&usbc_extcon0>, <&usbc_extcon1>;
 235 };
 236
 237 &dmc {
 238         center-supply = <&ppvar_centerlogic>;
 239         rockchip,pd-idle-dis-freq-hz = <800000000>;
 240         rockchip,sr-idle-dis-freq-hz = <800000000>;
 241         rockchip,sr-mc-gate-idle-dis-freq-hz = <800000000>;
 242 };
 243
 244 &edp {
 245         status = "okay";
 246
 247         /*
 248          * eDP PHY/clk don't sync reliably at anything other than 24 MHz. Only
 249          * set this here, because rk3399-gru.dtsi ensures we can generate this
 250          * off GPLL=600MHz, whereas some other RK3399 boards may not.
 251          */
 252         assigned-clocks = <&cru PCLK_EDP>;
 253         assigned-clock-rates = <24000000>;
 254
 255         ports {
 256                 edp_out: port@1 {
 257                         reg = <1>;
 258                         #address-cells = <1>;
 259                         #size-cells = <0>;
 260
 261                         edp_out_panel: endpoint@0 {
 262                                 reg = <0>;
 263                                 remote-endpoint = <&panel_in_edp>;
 264                         };
 265                 };
 266         };
 267 };
 268
 269 &gpio0 {
 270         gpio-line-names = /* GPIO0 A 0-7 */
 271                           "AP_RTC_CLK_IN",
 272                           "EC_AP_INT_L",
 273                           "PP1800_AUDIO_EN",
 274                           "BT_HOST_WAKE_L",
 275                           "WLAN_MODULE_PD_L",
 276                           "H1_INT_OD_L",
 277                           "CENTERLOGIC_DVS_PWM",
 278                           "",
 279
 280                           /* GPIO0 B 0-4 */
 281                           "WIFI_HOST_WAKE_L",
 282                           "PMUIO2_33_18_L",
 283                           "PP1500_EN",
 284                           "AP_EC_WARM_RESET_REQ",
 285                           "PP3000_EN";
 286 };
 287
 288 &gpio1 {
 289         gpio-line-names = /* GPIO1 A 0-7 */
 290                           "",
 291                           "",
 292                           "SPK_PA_EN",
 293                           "",
 294                           "TRACKPAD_INT_L",
 295                           "AP_EC_S3_S0_L",
 296                           "AP_EC_OVERTEMP",
 297                           "AP_SPI_FLASH_MISO",
 298
 299                           /* GPIO1 B 0-7 */
 300                           "AP_SPI_FLASH_MOSI_R",
 301                           "AP_SPI_FLASH_CLK_R",
 302                           "AP_SPI_FLASH_CS_L_R",
 303                           "WLAN_MODULE_RESET_L",
 304                           "WIFI_DISABLE_L",
 305                           "MIC_INT",
 306                           "",
 307                           "AP_I2C_DVS_SDA",
 308
 309                           /* GPIO1 C 0-7 */
 310                           "AP_I2C_DVS_SCL",
 311                           "AP_BL_EN",
 312                           /*
 313                            * AP_FLASH_WP is crossystem ABI. Schematics call it
 314                            * AP_FW_WP or CPU1_FW_WP, depending on the variant.
 315                            */
 316                           "AP_FLASH_WP",
 317                           "LITCPU_DVS_PWM",
 318                           "AP_I2C_AUDIO_SDA",
 319                           "AP_I2C_AUDIO_SCL",
 320                           "",
 321                           "HEADSET_INT_L";
 322 };
 323
 324 &gpio2 {
 325         gpio-line-names = /* GPIO2 A 0-7 */
 326                           "",
 327                           "",
 328                           "SD_IO_PWR_EN",
 329                           "",
 330                           "",
 331                           "",
 332                           "",
 333                           "",
 334
 335                           /* GPIO2 B 0-7 */
 336                           "",
 337                           "",
 338                           "",
 339                           "",
 340                           "",
 341                           "",
 342                           "",
 343                           "",
 344
 345                           /* GPIO2 C 0-7 */
 346                           "",
 347                           "",
 348                           "",
 349                           "",
 350                           "AP_SPI_EC_MISO",
 351                           "AP_SPI_EC_MOSI",
 352                           "AP_SPI_EC_CLK",
 353                           "AP_SPI_EC_CS_L",
 354
 355                           /* GPIO2 D 0-4 */
 356                           "BT_DEV_WAKE_L",
 357                           "",
 358                           "WIFI_PCIE_CLKREQ_L",
 359                           "WIFI_PERST_L",
 360                           "SD_PWR_3000_1800_L";
 361 };
 362
 363 &gpio3 {
 364         gpio-line-names = /* GPIO3 A 0-7 */
 365                           "",
 366                           "",
 367                           "",
 368                           "",
 369                           "AP_SPI_TPM_MISO",
 370                           "AP_SPI_TPM_MOSI_R",
 371                           "AP_SPI_TPM_CLK_R",
 372                           "AP_SPI_TPM_CS_L_R",
 373
 374                           /* GPIO3 B 0-7 */
 375                           "EC_IN_RW",
 376                           "",
 377                           "AP_I2C_TP_SDA",
 378                           "AP_I2C_TP_SCL",
 379                           "AP_I2C_TP_PU_EN",
 380                           "TOUCH_INT_L",
 381                           "",
 382                           "",
 383
 384                           /* GPIO3 C 0-7 */
 385                           "",
 386                           "",
 387                           "",
 388                           "",
 389                           "",
 390                           "",
 391                           "",
 392                           "",
 393
 394                           /* GPIO3 D 0-7 */
 395                           "I2S0_SCLK",
 396                           "I2S0_LRCK_RX",
 397                           "I2S0_LRCK_TX",
 398                           "I2S0_SDI_0",
 399                           "I2S0_SDI_1",
 400                           "",
 401                           "I2S0_SDO_1",
 402                           "I2S0_SDO_0";
 403 };
 404
 405 &gpio4 {
 406         gpio-line-names = /* GPIO4 A 0-7 */
 407                           "I2S_MCLK",
 408                           "AP_I2C_MIC_SDA",
 409                           "AP_I2C_MIC_SCL",
 410                           "",
 411                           "",
 412                           "",
 413                           "",
 414                           "",
 415
 416                           /* GPIO4 B 0-7 */
 417                           "",
 418                           "",
 419                           "",
 420                           "",
 421                           "",
 422                           "",
 423                           "",
 424                           "",
 425
 426                           /* GPIO4 C 0-7 */
 427                           "AP_I2C_TS_SDA",
 428                           "AP_I2C_TS_SCL",
 429                           "GPU_DVS_PWM",
 430                           "UART_DBG_TX_AP_RX",
 431                           "UART_AP_TX_DBG_RX",
 432                           "",
 433                           "BIGCPU_DVS_PWM",
 434                           "EDP_HPD_3V0",
 435
 436                           /* GPIO4 D 0-5 */
 437                           "SD_CARD_DET_L",
 438                           "USB_DP_HPD",
 439                           "TOUCH_RESET_L",
 440                           "PP3300_DISP_EN",
 441                           "",
 442                           "SD_SLOT_PWR_EN";
 443 };
 444
 445 ap_i2c_mic: &i2c1 {
 446         status = "okay";
 447
 448         clock-frequency = <400000>;
 449
 450         /* These are relatively safe rise/fall times */
 451         i2c-scl-falling-time-ns = <50>;
 452         i2c-scl-rising-time-ns = <300>;
 453
 454         headsetcodec: rt5514@57 {
 455                 compatible = "realtek,rt5514";
 456                 reg = <0x57>;
 457                 realtek,dmic-init-delay-ms = <20>;
 458         };
 459 };
 460
 461 ap_i2c_tp: &i2c5 {
 462         status = "okay";
 463
 464         clock-frequency = <400000>;
 465
 466         /* These are relatively safe rise/fall times */
 467         i2c-scl-falling-time-ns = <50>;
 468         i2c-scl-rising-time-ns = <300>;
 469
 470         /*
 471          * Note strange pullup enable.  Apparently this avoids leakage but
 472          * still allows us to get nice 4.7K pullups for high speed i2c
 473          * transfers.  Basically we want the pullup on whenever the ap is
 474          * alive, so the "en" pin just gets set to output high.
 475          */
 476         pinctrl-0 = <&i2c5_xfer &ap_i2c_tp_pu_en>;
 477 };
 478
 479 &cros_ec {
 480         cros_ec_pwm: pwm {
 481                 compatible = "google,cros-ec-pwm";
 482                 #pwm-cells = <1>;
 483         };
 484
 485         usbc_extcon1: extcon1 {
 486                 compatible = "google,extcon-usbc-cros-ec";
 487                 google,usb-port-id = <1>;
 488         };
 489 };
 490
 491 &sound {
 492         rockchip,codec = <&max98357a &headsetcodec
 493                           &codec &wacky_spi_audio &cdn_dp>;
 494 };
 495
 496 &spi2 {
 497         wacky_spi_audio: spi2@0 {
 498                 compatible = "realtek,rt5514";
 499                 reg = <0>;
 500                 interrupt-parent = <&gpio1>;
 501                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
 502                 pinctrl-names = "default";
 503                 pinctrl-0 = <&mic_int>;
 504                 /* May run faster once verified. */
 505                 spi-max-frequency = <10000000>;
 506                 wakeup-source;
 507         };
 508 };
 509
 510 &pci_rootport {
 511         mvl_wifi: wifi@0,0 {
 512                 compatible = "pci1b4b,2b42";
 513                 reg = <0x0000 0x0 0x0 0x0 0x0>;
 514                 interrupt-parent = <&gpio0>;
 515                 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
 516                 pinctrl-names = "default";
 517                 pinctrl-0 = <&wlan_host_wake_l>;
 518                 wakeup-source;
 519         };
 520 };
 521
 522 &tcphy1 {
 523         status = "okay";
 524         extcon = <&usbc_extcon1>;
 525 };
 526
 527 &u2phy1 {
 528         status = "okay";
 529 };
 530
 531 &usb_host0_ehci {
 532         status = "okay";
 533 };
 534
 535 &usb_host1_ehci {
 536         status = "okay";
 537 };
 538
 539 &usb_host1_ohci {
 540         status = "okay";
 541 };
 542
 543 &usbdrd3_1 {
 544         status = "okay";
 545         extcon = <&usbc_extcon1>;
 546 };
 547
 548 &usbdrd_dwc3_1 {
 549         status = "okay";
 550         dr_mode = "host";
 551 };
 552
 553 &pinctrl {
 554         discrete-regulators {
 555                 pp1500_en: pp1500-en {
 556                         rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO
 557                                          &pcfg_pull_none>;
 558                 };
 559
 560                 pp1800_audio_en: pp1800-audio-en {
 561                         rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO
 562                                          &pcfg_pull_down>;
 563                 };
 564
 565                 pp3000_en: pp3000-en {
 566                         rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO
 567                                          &pcfg_pull_none>;
 568                 };
 569
 570                 pp3300_disp_en: pp3300-disp-en {
 571                         rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO
 572                                          &pcfg_pull_none>;
 573                 };
 574
 575                 wlan_module_pd_l: wlan-module-pd-l {
 576                         rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO
 577                                          &pcfg_pull_down>;
 578                 };
 579         };
 580 };
 581
 582 &wifi {
 583         wifi_perst_l: wifi-perst-l {
 584                 rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
 585         };
 586
 587         wlan_host_wake_l: wlan-host-wake-l {
 588                 /* Kevin has an external pull up, but Bob does not */
 589                 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
 590         };
 591 };