arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / arch / arm64 / boot / dts / rockchip / rk3399-gru-bob.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Google Gru-Bob Rev 4+ board device tree source
4  *
5  * Copyright 2018 Google, Inc
6  */
7
8 /dts-v1/;
9 #include "rk3399-gru-chromebook.dtsi"
10
11 / {
12         model = "Google Bob";
13         compatible = "google,bob-rev13", "google,bob-rev12",
14                      "google,bob-rev11", "google,bob-rev10",
15                      "google,bob-rev9", "google,bob-rev8",
16                      "google,bob-rev7", "google,bob-rev6",
17                      "google,bob-rev5", "google,bob-rev4",
18                      "google,bob", "google,gru", "rockchip,rk3399";
19         chassis-type = "convertible";
20
21         edp_panel: edp-panel {
22                 compatible = "boe,nv101wxmn51";
23                 backlight = <&backlight>;
24                 power-supply = <&pp3300_disp>;
25
26                 port {
27                         panel_in_edp: endpoint {
28                                 remote-endpoint = <&edp_out_panel>;
29                         };
30                 };
31         };
32 };
33
34 &ap_i2c_ts {
35         touchscreen: touchscreen@10 {
36                 compatible = "elan,ekth3500";
37                 reg = <0x10>;
38                 interrupt-parent = <&gpio3>;
39                 interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
40                 pinctrl-names = "default";
41                 pinctrl-0 = <&touch_int_l &touch_reset_l>;
42                 reset-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
43         };
44 };
45
46 &ap_i2c_tp {
47         trackpad: trackpad@15 {
48                 compatible = "elan,ekth3000";
49                 reg = <0x15>;
50                 interrupt-parent = <&gpio1>;
51                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
52                 pinctrl-names = "default";
53                 pinctrl-0 = <&trackpad_int_l>;
54                 wakeup-source;
55         };
56 };
57
58 &backlight {
59         pwms = <&cros_ec_pwm 0>;
60 };
61
62 &cpu_alert0 {
63         temperature = <65000>;
64 };
65
66 &cpu_alert1 {
67         temperature = <70000>;
68 };
69
70 &spi0 {
71         status = "okay";
72
73         cr50@0 {
74                 compatible = "google,cr50";
75                 reg = <0>;
76                 interrupt-parent = <&gpio0>;
77                 interrupts = <5 IRQ_TYPE_EDGE_RISING>;
78                 pinctrl-names = "default";
79                 pinctrl-0 = <&h1_int_od_l>;
80                 spi-max-frequency = <800000>;
81         };
82 };
83
84 &pinctrl {
85         tpm {
86                 h1_int_od_l: h1-int-od-l {
87                         rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
88                 };
89         };
90 };
91
92 &wlan_host_wake_l {
93         /* Kevin has an external pull up, but Bob does not. */
94         rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
95 };