arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /*
   3  * Copyright (c) 2016 Xunlong Software. Co., Ltd.
   4  * (http://www.orangepi.org)
   5  *
   6  * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
   7  */
   8
   9 /dts-v1/;
  10 #include "rk3328-orangepi-r1-plus.dts"
  11
  12 / {
  13         model = "Xunlong Orange Pi R1 Plus LTS";
  14         compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";
  15 };
  16
  17 &gmac2io {
  18         phy-handle = <&yt8531c>;
  19         tx_delay = <0x19>;
  20         rx_delay = <0x05>;
  21
  22         mdio {
  23                 /delete-node/ ethernet-phy@1;
  24
  25                 yt8531c: ethernet-phy@0 {
  26                         compatible = "ethernet-phy-ieee802.3-c22";
  27                         reg = <0>;
  28
  29                         motorcomm,clk-out-frequency-hz = <125000000>;
  30                         motorcomm,keep-pll-enabled;
  31                         motorcomm,auto-sleep-disabled;
  32
  33                         pinctrl-0 = <&eth_phy_reset_pin>;
  34                         pinctrl-names = "default";
  35                         reset-assert-us = <15000>;
  36                         reset-deassert-us = <50000>;
  37                         reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
  38                 };
  39         };
  40 };