1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car Gen3 ULCB board
5 * Copyright (C) 2016 Renesas Electronics Corp.
6 * Copyright (C) 2016 Cogent Embedded, Inc.
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
13 model = "Renesas R-Car Gen3 ULCB board";
31 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
32 stdout-path = "serial0:115200n8";
35 audio_clkout: audio-clkout {
37 * This is same as <&rcar_sound 0>
38 * but needed to avoid cs2000/rcar_sound probe dead-lock
40 compatible = "fixed-clock";
42 clock-frequency = <12288000>;
46 compatible = "hdmi-connector";
51 remote-endpoint = <&rcar_dw_hdmi0_out>;
57 compatible = "gpio-keys";
63 debounce-interval = <20>;
64 gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
69 compatible = "gpio-leds";
72 gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
75 gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
79 reg_1p8v: regulator-1p8v {
80 compatible = "regulator-fixed";
81 regulator-name = "fixed-1.8V";
82 regulator-min-microvolt = <1800000>;
83 regulator-max-microvolt = <1800000>;
88 reg_3p3v: regulator-3p3v {
89 compatible = "regulator-fixed";
90 regulator-name = "fixed-3.3V";
91 regulator-min-microvolt = <3300000>;
92 regulator-max-microvolt = <3300000>;
97 vcc_sdhi0: regulator-vcc-sdhi0 {
98 compatible = "regulator-fixed";
100 regulator-name = "SDHI0 Vcc";
101 regulator-min-microvolt = <3300000>;
102 regulator-max-microvolt = <3300000>;
104 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
108 vccq_sdhi0: regulator-vccq-sdhi0 {
109 compatible = "regulator-gpio";
111 regulator-name = "SDHI0 VccQ";
112 regulator-min-microvolt = <1800000>;
113 regulator-max-microvolt = <3300000>;
115 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
117 states = <3300000 1>, <1800000 0>;
121 compatible = "fixed-clock";
123 clock-frequency = <24576000>;
127 compatible = "fixed-clock";
129 clock-frequency = <25000000>;
134 cpu-supply = <&dvfs>;
138 clock-frequency = <22579200>;
142 pinctrl-0 = <&avb_pins>;
143 pinctrl-names = "default";
144 phy-handle = <&phy0>;
145 tx-internal-delay-ps = <2000>;
148 phy0: ethernet-phy@0 {
149 compatible = "ethernet-phy-id0022.1622",
150 "ethernet-phy-ieee802.3-c22";
151 rxc-skew-ps = <1500>;
153 interrupt-parent = <&gpio2>;
154 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
155 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
168 clock-frequency = <16666666>;
172 clock-frequency = <32768>;
181 rcar_dw_hdmi0_out: endpoint {
182 remote-endpoint = <&hdmi0_con>;
192 pinctrl-0 = <&i2c2_pins>;
193 pinctrl-names = "default";
197 clock-frequency = <100000>;
200 compatible = "asahi-kasei,ak4613";
202 clocks = <&rcar_sound 3>;
204 asahi-kasei,in1-single-end;
205 asahi-kasei,in2-single-end;
206 asahi-kasei,out1-single-end;
207 asahi-kasei,out2-single-end;
208 asahi-kasei,out3-single-end;
209 asahi-kasei,out4-single-end;
210 asahi-kasei,out5-single-end;
211 asahi-kasei,out6-single-end;
214 cs2000: clk-multiplier@4f {
216 compatible = "cirrus,cs2000-cp";
218 clocks = <&audio_clkout>, <&x12_clk>;
219 clock-names = "clk_in", "ref_clk";
221 assigned-clocks = <&cs2000>;
222 assigned-clock-rates = <24576000>; /* 1/1 divide */
229 clock-frequency = <400000>;
231 versaclock5: clock-generator@6a {
232 compatible = "idt,5p49v5925";
243 clock-frequency = <400000>;
246 pinctrl-0 = <&irq0_pins>;
247 pinctrl-names = "default";
249 compatible = "rohm,bd9571mwv";
251 interrupt-parent = <&intc_ex>;
252 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
253 interrupt-controller;
254 #interrupt-cells = <2>;
257 rohm,ddr-backup-power = <0xf>;
262 regulator-name = "dvfs";
263 regulator-min-microvolt = <750000>;
264 regulator-max-microvolt = <1030000>;
272 compatible = "rohm,br24t01", "atmel,24c01";
283 pinctrl-0 = <&scif_clk_pins>;
284 pinctrl-names = "default";
288 groups = "avb_link", "avb_mdio", "avb_mii";
294 drive-strength = <24>;
298 pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
299 "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
300 drive-strength = <12>;
310 groups = "intc_ex_irq0";
311 function = "intc_ex";
315 groups = "scif2_data_a";
319 scif_clk_pins: scif_clk {
320 groups = "scif_clk_a";
321 function = "scif_clk";
325 groups = "sdhi0_data4", "sdhi0_ctrl";
327 power-source = <3300>;
330 sdhi0_pins_uhs: sd0_uhs {
331 groups = "sdhi0_data4", "sdhi0_ctrl";
333 power-source = <1800>;
337 groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
339 power-source = <1800>;
343 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
347 sound_clk_pins: sound-clk {
348 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
349 "audio_clkout_a", "audio_clkout3_a";
350 function = "audio_clk";
360 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
361 pinctrl-names = "default";
363 /* audio_clkout0/1/2/3 */
365 clock-frequency = <12288000 11289600>;
369 /* update <audio_clk_b> to <cs2000> */
370 clocks = <&cpg CPG_MOD 1005>,
371 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
372 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
373 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
374 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
375 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
376 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
377 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
378 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
379 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
380 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
381 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
382 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
383 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
384 <&audio_clk_a>, <&cs2000>,
390 /* Left disabled. To be enabled by firmware when unlocked. */
393 compatible = "cypress,hyperflash", "cfi-flash";
397 compatible = "fixed-partitions";
398 #address-cells = <1>;
402 reg = <0x00000000 0x040000>;
406 reg = <0x00040000 0x140000>;
409 cert_header_sa6@180000 {
410 reg = <0x00180000 0x040000>;
414 reg = <0x001c0000 0x040000>;
418 reg = <0x00200000 0x440000>;
422 reg = <0x00640000 0x100000>;
426 reg = <0x00740000 0x080000>;
429 reg = <0x007c0000 0x1400000>;
432 reg = <0x01bc0000 0x2440000>;
444 pinctrl-0 = <&scif2_pins>;
445 pinctrl-names = "default";
451 clock-frequency = <14745600>;
455 pinctrl-0 = <&sdhi0_pins>;
456 pinctrl-1 = <&sdhi0_pins_uhs>;
457 pinctrl-names = "default", "state_uhs";
459 vmmc-supply = <&vcc_sdhi0>;
460 vqmmc-supply = <&vccq_sdhi0>;
461 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
469 /* used for on-board 8bit eMMC */
470 pinctrl-0 = <&sdhi2_pins>;
471 pinctrl-1 = <&sdhi2_pins>;
472 pinctrl-names = "default", "state_uhs";
474 vmmc-supply = <®_3p3v>;
475 vqmmc-supply = <®_1p8v>;
482 full-pwr-cycle-in-suspend;
491 pinctrl-0 = <&usb1_pins>;
492 pinctrl-names = "default";
501 * We can switch Audio Card for testing
503 * #include "ulcb-simple-audio-card.dtsi"
504 * #include "ulcb-simple-audio-card-mix+split.dtsi"
505 * #include "ulcb-audio-graph-card.dtsi"
506 * #include "ulcb-audio-graph-card-mix+split.dtsi"
507 * #include "ulcb-audio-graph-card2-mix+split.dtsi"
509 #include "ulcb-audio-graph-card2.dtsi"