arch/arm64/boot/dts/renesas/ulcb.dtsi

   1 /*
   2  * Device Tree Source for the R-Car Gen3 ULCB board
   3  *
   4  * Copyright (C) 2016 Renesas Electronics Corp.
   5  * Copyright (C) 2016 Cogent Embedded, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <dt-bindings/gpio/gpio.h>
  13 #include <dt-bindings/input/input.h>
  14
  15 / {
  16         model = "Renesas R-Car Gen3 ULCB board";
  17
  18         aliases {
  19                 serial0 = &scif2;
  20                 ethernet0 = &avb;
  21         };
  22
  23         chosen {
  24                 stdout-path = "serial0:115200n8";
  25         };
  26
  27         audio_clkout: audio-clkout {
  28                 /*
  29                  * This is same as <&rcar_sound 0>
  30                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  31                  */
  32                 compatible = "fixed-clock";
  33                 #clock-cells = <0>;
  34                 clock-frequency = <11289600>;
  35         };
  36
  37         hdmi0-out {
  38                 compatible = "hdmi-connector";
  39                 type = "a";
  40
  41                 port {
  42                         hdmi0_con: endpoint {
  43                         };
  44                 };
  45         };
  46
  47         keyboard {
  48                 compatible = "gpio-keys";
  49
  50                 key-1 {
  51                         linux,code = <KEY_1>;
  52                         label = "SW3";
  53                         wakeup-source;
  54                         debounce-interval = <20>;
  55                         gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
  56                 };
  57         };
  58
  59         leds {
  60                 compatible = "gpio-leds";
  61
  62                 led5 {
  63                         gpios = <&gpio6 12 GPIO_ACTIVE_HIGH>;
  64                 };
  65                 led6 {
  66                         gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>;
  67                 };
  68         };
  69
  70         reg_1p8v: regulator0 {
  71                 compatible = "regulator-fixed";
  72                 regulator-name = "fixed-1.8V";
  73                 regulator-min-microvolt = <1800000>;
  74                 regulator-max-microvolt = <1800000>;
  75                 regulator-boot-on;
  76                 regulator-always-on;
  77         };
  78
  79         reg_3p3v: regulator1 {
  80                 compatible = "regulator-fixed";
  81                 regulator-name = "fixed-3.3V";
  82                 regulator-min-microvolt = <3300000>;
  83                 regulator-max-microvolt = <3300000>;
  84                 regulator-boot-on;
  85                 regulator-always-on;
  86         };
  87
  88         rsnd_ak4613: sound {
  89                 compatible = "simple-audio-card";
  90
  91                 simple-audio-card,format = "left_j";
  92                 simple-audio-card,bitclock-master = <&sndcpu>;
  93                 simple-audio-card,frame-master = <&sndcpu>;
  94
  95                 sndcpu: simple-audio-card,cpu {
  96                         sound-dai = <&rcar_sound>;
  97                 };
  98
  99                 sndcodec: simple-audio-card,codec {
 100                         sound-dai = <&ak4613>;
 101                 };
 102         };
 103
 104         vcc_sdhi0: regulator-vcc-sdhi0 {
 105                 compatible = "regulator-fixed";
 106
 107                 regulator-name = "SDHI0 Vcc";
 108                 regulator-min-microvolt = <3300000>;
 109                 regulator-max-microvolt = <3300000>;
 110
 111                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 112                 enable-active-high;
 113         };
 114
 115         vccq_sdhi0: regulator-vccq-sdhi0 {
 116                 compatible = "regulator-gpio";
 117
 118                 regulator-name = "SDHI0 VccQ";
 119                 regulator-min-microvolt = <1800000>;
 120                 regulator-max-microvolt = <3300000>;
 121
 122                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 123                 gpios-states = <1>;
 124                 states = <3300000 1
 125                           1800000 0>;
 126         };
 127
 128         x12_clk: x12 {
 129                 compatible = "fixed-clock";
 130                 #clock-cells = <0>;
 131                 clock-frequency = <24576000>;
 132         };
 133
 134         x23_clk: x23-clock {
 135                 compatible = "fixed-clock";
 136                 #clock-cells = <0>;
 137                 clock-frequency = <25000000>;
 138         };
 139 };
 140
 141 &audio_clk_a {
 142         clock-frequency = <22579200>;
 143 };
 144
 145 &avb {
 146         pinctrl-0 = <&avb_pins>;
 147         pinctrl-names = "default";
 148         phy-handle = <&phy0>;
 149         status = "okay";
 150
 151         phy0: ethernet-phy@0 {
 152                 rxc-skew-ps = <1500>;
 153                 reg = <0>;
 154                 interrupt-parent = <&gpio2>;
 155                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 156         };
 157 };
 158
 159 &ehci1 {
 160         status = "okay";
 161 };
 162
 163 &extal_clk {
 164         clock-frequency = <16666666>;
 165 };
 166
 167 &extalr_clk {
 168         clock-frequency = <32768>;
 169 };
 170
 171 &hdmi0 {
 172         status = "okay";
 173
 174         ports {
 175                 port@1 {
 176                         reg = <1>;
 177                         rcar_dw_hdmi0_out: endpoint {
 178                                 remote-endpoint = <&hdmi0_con>;
 179                         };
 180                 };
 181         };
 182 };
 183
 184 &hdmi0_con {
 185         remote-endpoint = <&rcar_dw_hdmi0_out>;
 186 };
 187
 188 &i2c2 {
 189         pinctrl-0 = <&i2c2_pins>;
 190         pinctrl-names = "default";
 191
 192         status = "okay";
 193
 194         clock-frequency = <100000>;
 195
 196         ak4613: codec@10 {
 197                 compatible = "asahi-kasei,ak4613";
 198                 #sound-dai-cells = <0>;
 199                 reg = <0x10>;
 200                 clocks = <&rcar_sound 3>;
 201
 202                 asahi-kasei,in1-single-end;
 203                 asahi-kasei,in2-single-end;
 204                 asahi-kasei,out1-single-end;
 205                 asahi-kasei,out2-single-end;
 206                 asahi-kasei,out3-single-end;
 207                 asahi-kasei,out4-single-end;
 208                 asahi-kasei,out5-single-end;
 209                 asahi-kasei,out6-single-end;
 210         };
 211
 212         cs2000: clk-multiplier@4f {
 213                 #clock-cells = <0>;
 214                 compatible = "cirrus,cs2000-cp";
 215                 reg = <0x4f>;
 216                 clocks = <&audio_clkout>, <&x12_clk>;
 217                 clock-names = "clk_in", "ref_clk";
 218
 219                 assigned-clocks = <&cs2000>;
 220                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 221         };
 222 };
 223
 224 &i2c4 {
 225         status = "okay";
 226
 227         clock-frequency = <400000>;
 228
 229         versaclock5: clock-generator@6a {
 230                 compatible = "idt,5p49v5925";
 231                 reg = <0x6a>;
 232                 #clock-cells = <1>;
 233                 clocks = <&x23_clk>;
 234                 clock-names = "xin";
 235         };
 236 };
 237
 238 &i2c_dvfs {
 239         status = "okay";
 240 };
 241
 242 &ohci1 {
 243         status = "okay";
 244 };
 245
 246 &pfc {
 247         pinctrl-0 = <&scif_clk_pins>;
 248         pinctrl-names = "default";
 249
 250         avb_pins: avb {
 251                 mux {
 252                         groups = "avb_link", "avb_phy_int", "avb_mdc",
 253                                  "avb_mii";
 254                         function = "avb";
 255                 };
 256
 257                 pins_mdc {
 258                         groups = "avb_mdc";
 259                         drive-strength = <24>;
 260                 };
 261
 262                 pins_mii_tx {
 263                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 264                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 265                         drive-strength = <12>;
 266                 };
 267         };
 268
 269         i2c2_pins: i2c2 {
 270                 groups = "i2c2_a";
 271                 function = "i2c2";
 272         };
 273
 274         scif2_pins: scif2 {
 275                 groups = "scif2_data_a";
 276                 function = "scif2";
 277         };
 278
 279         scif_clk_pins: scif_clk {
 280                 groups = "scif_clk_a";
 281                 function = "scif_clk";
 282         };
 283
 284         sdhi0_pins: sd0 {
 285                 groups = "sdhi0_data4", "sdhi0_ctrl";
 286                 function = "sdhi0";
 287                 power-source = <3300>;
 288         };
 289
 290         sdhi0_pins_uhs: sd0_uhs {
 291                 groups = "sdhi0_data4", "sdhi0_ctrl";
 292                 function = "sdhi0";
 293                 power-source = <1800>;
 294         };
 295
 296         sdhi2_pins: sd2 {
 297                 groups = "sdhi2_data8", "sdhi2_ctrl";
 298                 function = "sdhi2";
 299                 power-source = <3300>;
 300         };
 301
 302         sdhi2_pins_uhs: sd2_uhs {
 303                 groups = "sdhi2_data8", "sdhi2_ctrl";
 304                 function = "sdhi2";
 305                 power-source = <1800>;
 306         };
 307
 308         sound_pins: sound {
 309                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 310                 function = "ssi";
 311         };
 312
 313         sound_clk_pins: sound-clk {
 314                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 315                          "audio_clkout_a", "audio_clkout3_a";
 316                 function = "audio_clk";
 317         };
 318
 319         usb1_pins: usb1 {
 320                 groups = "usb1";
 321                 function = "usb1";
 322         };
 323 };
 324
 325 &rcar_sound {
 326         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 327         pinctrl-names = "default";
 328
 329         /* Single DAI */
 330         #sound-dai-cells = <0>;
 331
 332         /* audio_clkout0/1/2/3 */
 333         #clock-cells = <1>;
 334         clock-frequency = <12288000 11289600>;
 335
 336         status = "okay";
 337
 338         /* update <audio_clk_b> to <cs2000> */
 339         clocks = <&cpg CPG_MOD 1005>,
 340                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 341                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 342                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 343                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 344                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 345                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 346                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 347                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 348                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 349                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 350                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 351                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 352                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 353                  <&audio_clk_a>, <&cs2000>,
 354                  <&audio_clk_c>,
 355                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
 356
 357         rcar_sound,dai {
 358                 dai0 {
 359                         playback = <&ssi0 &src0 &dvc0>;
 360                         capture  = <&ssi1 &src1 &dvc1>;
 361                 };
 362         };
 363 };
 364
 365 &scif2 {
 366         pinctrl-0 = <&scif2_pins>;
 367         pinctrl-names = "default";
 368
 369         status = "okay";
 370 };
 371
 372 &scif_clk {
 373         clock-frequency = <14745600>;
 374 };
 375
 376 &sdhi0 {
 377         pinctrl-0 = <&sdhi0_pins>;
 378         pinctrl-1 = <&sdhi0_pins_uhs>;
 379         pinctrl-names = "default", "state_uhs";
 380
 381         vmmc-supply = <&vcc_sdhi0>;
 382         vqmmc-supply = <&vccq_sdhi0>;
 383         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 384         bus-width = <4>;
 385         sd-uhs-sdr50;
 386         status = "okay";
 387 };
 388
 389 &sdhi2 {
 390         /* used for on-board 8bit eMMC */
 391         pinctrl-0 = <&sdhi2_pins>;
 392         pinctrl-1 = <&sdhi2_pins_uhs>;
 393         pinctrl-names = "default", "state_uhs";
 394
 395         vmmc-supply = <&reg_3p3v>;
 396         vqmmc-supply = <&reg_1p8v>;
 397         bus-width = <8>;
 398         mmc-hs200-1_8v;
 399         non-removable;
 400         full-pwr-cycle-in-suspend;
 401         status = "okay";
 402 };
 403
 404 &ssi1 {
 405         shared-pin;
 406 };
 407
 408 &usb2_phy1 {
 409         pinctrl-0 = <&usb1_pins>;
 410         pinctrl-names = "default";
 411
 412         status = "okay";
 413 };
 414
 415 &wdt0 {
 416         timeout-sec = <60>;
 417         status = "okay";
 418 };