arch/arm64/boot/dts/renesas/salvator-common.dtsi

   1 /*
   2  * Device Tree Source for common parts of Salvator-X board variants
   3  *
   4  * Copyright (C) 2015-2016 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 /*
  12  * SSI-AK4613
  13  *
  14  * This command is required when Playback/Capture
  15  *
  16  *      amixer set "DVC Out" 100%
  17  *      amixer set "DVC In" 100%
  18  *
  19  * You can use Mute
  20  *
  21  *      amixer set "DVC Out Mute" on
  22  *      amixer set "DVC In Mute" on
  23  *
  24  * You can use Volume Ramp
  25  *
  26  *      amixer set "DVC Out Ramp Up Rate"   "0.125 dB/64 steps"
  27  *      amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
  28  *      amixer set "DVC Out Ramp" on
  29  *      aplay xxx.wav &
  30  *      amixer set "DVC Out"  80%  // Volume Down
  31  *      amixer set "DVC Out" 100%  // Volume Up
  32  */
  33
  34 #include <dt-bindings/gpio/gpio.h>
  35
  36 / {
  37         aliases {
  38                 serial0 = &scif2;
  39                 serial1 = &scif1;
  40                 ethernet0 = &avb;
  41         };
  42
  43         chosen {
  44                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  45                 stdout-path = "serial0:115200n8";
  46         };
  47
  48         audio_clkout: audio-clkout {
  49                 /*
  50                  * This is same as <&rcar_sound 0>
  51                  * but needed to avoid cs2000/rcar_sound probe dead-lock
  52                  */
  53                 compatible = "fixed-clock";
  54                 #clock-cells = <0>;
  55                 clock-frequency = <11289600>;
  56         };
  57
  58         backlight: backlight {
  59                 compatible = "pwm-backlight";
  60                 pwms = <&pwm1 0 50000>;
  61
  62                 brightness-levels = <256 128 64 16 8 4 0>;
  63                 default-brightness-level = <6>;
  64
  65                 power-supply = <&reg_12v>;
  66                 enable-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
  67         };
  68
  69         reg_1p8v: regulator0 {
  70                 compatible = "regulator-fixed";
  71                 regulator-name = "fixed-1.8V";
  72                 regulator-min-microvolt = <1800000>;
  73                 regulator-max-microvolt = <1800000>;
  74                 regulator-boot-on;
  75                 regulator-always-on;
  76         };
  77
  78         reg_3p3v: regulator1 {
  79                 compatible = "regulator-fixed";
  80                 regulator-name = "fixed-3.3V";
  81                 regulator-min-microvolt = <3300000>;
  82                 regulator-max-microvolt = <3300000>;
  83                 regulator-boot-on;
  84                 regulator-always-on;
  85         };
  86
  87         reg_12v: regulator2 {
  88                 compatible = "regulator-fixed";
  89                 regulator-name = "fixed-12V";
  90                 regulator-min-microvolt = <12000000>;
  91                 regulator-max-microvolt = <12000000>;
  92                 regulator-boot-on;
  93                 regulator-always-on;
  94         };
  95
  96         sound_card: sound {
  97                 compatible = "audio-graph-card";
  98
  99                 label = "rcar-sound";
 100
 101                 dais = <&rsnd_port0>;
 102         };
 103
 104         vbus0_usb2: regulator-vbus0-usb2 {
 105                 compatible = "regulator-fixed";
 106
 107                 regulator-name = "USB20_VBUS0";
 108                 regulator-min-microvolt = <5000000>;
 109                 regulator-max-microvolt = <5000000>;
 110
 111                 gpio = <&gpio6 16 GPIO_ACTIVE_HIGH>;
 112                 enable-active-high;
 113         };
 114
 115         vcc_sdhi0: regulator-vcc-sdhi0 {
 116                 compatible = "regulator-fixed";
 117
 118                 regulator-name = "SDHI0 Vcc";
 119                 regulator-min-microvolt = <3300000>;
 120                 regulator-max-microvolt = <3300000>;
 121
 122                 gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
 123                 enable-active-high;
 124         };
 125
 126         vccq_sdhi0: regulator-vccq-sdhi0 {
 127                 compatible = "regulator-gpio";
 128
 129                 regulator-name = "SDHI0 VccQ";
 130                 regulator-min-microvolt = <1800000>;
 131                 regulator-max-microvolt = <3300000>;
 132
 133                 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
 134                 gpios-states = <1>;
 135                 states = <3300000 1
 136                           1800000 0>;
 137         };
 138
 139         vcc_sdhi3: regulator-vcc-sdhi3 {
 140                 compatible = "regulator-fixed";
 141
 142                 regulator-name = "SDHI3 Vcc";
 143                 regulator-min-microvolt = <3300000>;
 144                 regulator-max-microvolt = <3300000>;
 145
 146                 gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>;
 147                 enable-active-high;
 148         };
 149
 150         vccq_sdhi3: regulator-vccq-sdhi3 {
 151                 compatible = "regulator-gpio";
 152
 153                 regulator-name = "SDHI3 VccQ";
 154                 regulator-min-microvolt = <1800000>;
 155                 regulator-max-microvolt = <3300000>;
 156
 157                 gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
 158                 gpios-states = <1>;
 159                 states = <3300000 1
 160                           1800000 0>;
 161         };
 162
 163         hdmi0-out {
 164                 compatible = "hdmi-connector";
 165                 label = "HDMI0 OUT";
 166                 type = "a";
 167
 168                 port {
 169                         hdmi0_con: endpoint {
 170                         };
 171                 };
 172         };
 173
 174         hdmi1-out {
 175                 compatible = "hdmi-connector";
 176                 label = "HDMI1 OUT";
 177                 type = "a";
 178
 179                 port {
 180                         hdmi1_con: endpoint {
 181                         };
 182                 };
 183         };
 184
 185         vga {
 186                 compatible = "vga-connector";
 187
 188                 port {
 189                         vga_in: endpoint {
 190                                 remote-endpoint = <&adv7123_out>;
 191                         };
 192                 };
 193         };
 194
 195         vga-encoder {
 196                 compatible = "adi,adv7123";
 197
 198                 ports {
 199                         #address-cells = <1>;
 200                         #size-cells = <0>;
 201
 202                         port@0 {
 203                                 reg = <0>;
 204                                 adv7123_in: endpoint {
 205                                         remote-endpoint = <&du_out_rgb>;
 206                                 };
 207                         };
 208                         port@1 {
 209                                 reg = <1>;
 210                                 adv7123_out: endpoint {
 211                                         remote-endpoint = <&vga_in>;
 212                                 };
 213                         };
 214                 };
 215         };
 216
 217         x12_clk: x12 {
 218                 compatible = "fixed-clock";
 219                 #clock-cells = <0>;
 220                 clock-frequency = <24576000>;
 221         };
 222
 223         /* External DU dot clocks */
 224         x21_clk: x21-clock {
 225                 compatible = "fixed-clock";
 226                 #clock-cells = <0>;
 227                 clock-frequency = <33000000>;
 228         };
 229
 230         x22_clk: x22-clock {
 231                 compatible = "fixed-clock";
 232                 #clock-cells = <0>;
 233                 clock-frequency = <33000000>;
 234         };
 235
 236         x23_clk: x23-clock {
 237                 compatible = "fixed-clock";
 238                 #clock-cells = <0>;
 239                 clock-frequency = <25000000>;
 240         };
 241 };
 242
 243 &audio_clk_a {
 244         clock-frequency = <22579200>;
 245 };
 246
 247 &avb {
 248         pinctrl-0 = <&avb_pins>;
 249         pinctrl-names = "default";
 250         renesas,no-ether-link;
 251         phy-handle = <&phy0>;
 252         status = "okay";
 253
 254         phy0: ethernet-phy@0 {
 255                 rxc-skew-ps = <1500>;
 256                 reg = <0>;
 257                 interrupt-parent = <&gpio2>;
 258                 interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 259                 reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
 260         };
 261 };
 262
 263 &du {
 264         pinctrl-0 = <&du_pins>;
 265         pinctrl-names = "default";
 266         status = "okay";
 267
 268         ports {
 269                 port@0 {
 270                         endpoint {
 271                                 remote-endpoint = <&adv7123_in>;
 272                         };
 273                 };
 274         };
 275 };
 276
 277 &ehci0 {
 278         status = "okay";
 279 };
 280
 281 &ehci1 {
 282         status = "okay";
 283 };
 284
 285 &extalr_clk {
 286         clock-frequency = <32768>;
 287 };
 288
 289 &hsusb {
 290         status = "okay";
 291 };
 292
 293 &i2c2 {
 294         pinctrl-0 = <&i2c2_pins>;
 295         pinctrl-names = "default";
 296
 297         status = "okay";
 298
 299         clock-frequency = <100000>;
 300
 301         ak4613: codec@10 {
 302                 compatible = "asahi-kasei,ak4613";
 303                 #sound-dai-cells = <0>;
 304                 reg = <0x10>;
 305                 clocks = <&rcar_sound 3>;
 306
 307                 asahi-kasei,in1-single-end;
 308                 asahi-kasei,in2-single-end;
 309                 asahi-kasei,out1-single-end;
 310                 asahi-kasei,out2-single-end;
 311                 asahi-kasei,out3-single-end;
 312                 asahi-kasei,out4-single-end;
 313                 asahi-kasei,out5-single-end;
 314                 asahi-kasei,out6-single-end;
 315
 316                 port {
 317                         ak4613_endpoint: endpoint {
 318                                 remote-endpoint = <&rsnd_endpoint0>;
 319                         };
 320                 };
 321         };
 322
 323         cs2000: clk_multiplier@4f {
 324                 #clock-cells = <0>;
 325                 compatible = "cirrus,cs2000-cp";
 326                 reg = <0x4f>;
 327                 clocks = <&audio_clkout>, <&x12_clk>;
 328                 clock-names = "clk_in", "ref_clk";
 329
 330                 assigned-clocks = <&cs2000>;
 331                 assigned-clock-rates = <24576000>; /* 1/1 divide */
 332         };
 333 };
 334
 335 &i2c4 {
 336         status = "okay";
 337
 338         csa_vdd: adc@7c {
 339                 compatible = "maxim,max9611";
 340                 reg = <0x7c>;
 341
 342                 shunt-resistor-micro-ohms = <5000>;
 343         };
 344
 345         csa_dvfs: adc@7f {
 346                 compatible = "maxim,max9611";
 347                 reg = <0x7f>;
 348
 349                 shunt-resistor-micro-ohms = <5000>;
 350         };
 351 };
 352
 353 &i2c_dvfs {
 354         status = "okay";
 355 };
 356
 357 &ohci0 {
 358         status = "okay";
 359 };
 360
 361 &ohci1 {
 362         status = "okay";
 363 };
 364
 365 &pcie_bus_clk {
 366         clock-frequency = <100000000>;
 367 };
 368
 369 &pciec0 {
 370         status = "okay";
 371 };
 372
 373 &pciec1 {
 374         status = "okay";
 375 };
 376
 377 &pfc {
 378         pinctrl-0 = <&scif_clk_pins>;
 379         pinctrl-names = "default";
 380
 381         avb_pins: avb {
 382                 mux {
 383                         groups = "avb_link", "avb_phy_int", "avb_mdc",
 384                                  "avb_mii";
 385                         function = "avb";
 386                 };
 387
 388                 pins_mdc {
 389                         groups = "avb_mdc";
 390                         drive-strength = <24>;
 391                 };
 392
 393                 pins_mii_tx {
 394                         pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
 395                                "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
 396                         drive-strength = <12>;
 397                 };
 398         };
 399
 400         du_pins: du {
 401                 groups = "du_rgb888", "du_sync", "du_oddf", "du_clk_out_0";
 402                 function = "du";
 403         };
 404
 405         i2c2_pins: i2c2 {
 406                 groups = "i2c2_a";
 407                 function = "i2c2";
 408         };
 409
 410         pwm1_pins: pwm1 {
 411                 groups = "pwm1_a";
 412                 function = "pwm1";
 413         };
 414
 415         scif1_pins: scif1 {
 416                 groups = "scif1_data_a", "scif1_ctrl";
 417                 function = "scif1";
 418         };
 419
 420         scif2_pins: scif2 {
 421                 groups = "scif2_data_a";
 422                 function = "scif2";
 423         };
 424
 425         scif_clk_pins: scif_clk {
 426                 groups = "scif_clk_a";
 427                 function = "scif_clk";
 428         };
 429
 430         sdhi0_pins: sd0 {
 431                 groups = "sdhi0_data4", "sdhi0_ctrl";
 432                 function = "sdhi0";
 433                 power-source = <3300>;
 434         };
 435
 436         sdhi0_pins_uhs: sd0_uhs {
 437                 groups = "sdhi0_data4", "sdhi0_ctrl";
 438                 function = "sdhi0";
 439                 power-source = <1800>;
 440         };
 441
 442         sdhi2_pins: sd2 {
 443                 groups = "sdhi2_data8", "sdhi2_ctrl";
 444                 function = "sdhi2";
 445                 power-source = <3300>;
 446         };
 447
 448         sdhi2_pins_uhs: sd2_uhs {
 449                 groups = "sdhi2_data8", "sdhi2_ctrl";
 450                 function = "sdhi2";
 451                 power-source = <1800>;
 452         };
 453
 454         sdhi3_pins: sd3 {
 455                 groups = "sdhi3_data4", "sdhi3_ctrl";
 456                 function = "sdhi3";
 457                 power-source = <3300>;
 458         };
 459
 460         sdhi3_pins_uhs: sd3_uhs {
 461                 groups = "sdhi3_data4", "sdhi3_ctrl";
 462                 function = "sdhi3";
 463                 power-source = <1800>;
 464         };
 465
 466         sound_pins: sound {
 467                 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data_a";
 468                 function = "ssi";
 469         };
 470
 471         sound_clk_pins: sound_clk {
 472                 groups = "audio_clk_a_a", "audio_clk_b_a", "audio_clk_c_a",
 473                          "audio_clkout_a", "audio_clkout3_a";
 474                 function = "audio_clk";
 475         };
 476
 477         usb0_pins: usb0 {
 478                 groups = "usb0";
 479                 function = "usb0";
 480         };
 481
 482         usb1_pins: usb1 {
 483                 mux {
 484                         groups = "usb1";
 485                         function = "usb1";
 486                 };
 487
 488                 ovc {
 489                         pins = "GP_6_27";
 490                         bias-pull-up;
 491                 };
 492
 493                 pwen {
 494                         pins = "GP_6_26";
 495                         bias-pull-down;
 496                 };
 497         };
 498 };
 499
 500 &pwm1 {
 501         pinctrl-0 = <&pwm1_pins>;
 502         pinctrl-names = "default";
 503
 504         status = "okay";
 505 };
 506
 507 &rcar_sound {
 508         pinctrl-0 = <&sound_pins &sound_clk_pins>;
 509         pinctrl-names = "default";
 510
 511         /* Single DAI */
 512         #sound-dai-cells = <0>;
 513
 514         /* audio_clkout0/1/2/3 */
 515         #clock-cells = <1>;
 516         clock-frequency = <12288000 11289600>;
 517
 518         status = "okay";
 519
 520         /* update <audio_clk_b> to <cs2000> */
 521         clocks = <&cpg CPG_MOD 1005>,
 522                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 523                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 524                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 525                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 526                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 527                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 528                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 529                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 530                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 531                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 532                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 533                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
 534                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 535                  <&audio_clk_a>, <&cs2000>,
 536                  <&audio_clk_c>,
 537                  <&cpg CPG_CORE CPG_AUDIO_CLK_I>;
 538
 539         ports {
 540                 rsnd_port0: port@0 {
 541                         rsnd_endpoint0: endpoint {
 542                                 remote-endpoint = <&ak4613_endpoint>;
 543
 544                                 dai-format = "left_j";
 545                                 bitclock-master = <&rsnd_endpoint0>;
 546                                 frame-master = <&rsnd_endpoint0>;
 547
 548                                 playback = <&ssi0 &src0 &dvc0>;
 549                                 capture  = <&ssi1 &src1 &dvc1>;
 550                         };
 551                 };
 552         };
 553 };
 554
 555 &scif1 {
 556         pinctrl-0 = <&scif1_pins>;
 557         pinctrl-names = "default";
 558
 559         uart-has-rtscts;
 560         status = "okay";
 561 };
 562
 563 &scif2 {
 564         pinctrl-0 = <&scif2_pins>;
 565         pinctrl-names = "default";
 566
 567         status = "okay";
 568 };
 569
 570 &scif_clk {
 571         clock-frequency = <14745600>;
 572 };
 573
 574 &sdhi0 {
 575         pinctrl-0 = <&sdhi0_pins>;
 576         pinctrl-1 = <&sdhi0_pins_uhs>;
 577         pinctrl-names = "default", "state_uhs";
 578
 579         vmmc-supply = <&vcc_sdhi0>;
 580         vqmmc-supply = <&vccq_sdhi0>;
 581         cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
 582         wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
 583         bus-width = <4>;
 584         sd-uhs-sdr50;
 585         status = "okay";
 586 };
 587
 588 &sdhi2 {
 589         /* used for on-board 8bit eMMC */
 590         pinctrl-0 = <&sdhi2_pins>;
 591         pinctrl-1 = <&sdhi2_pins_uhs>;
 592         pinctrl-names = "default", "state_uhs";
 593
 594         vmmc-supply = <&reg_3p3v>;
 595         vqmmc-supply = <&reg_1p8v>;
 596         bus-width = <8>;
 597         mmc-hs200-1_8v;
 598         non-removable;
 599         status = "okay";
 600 };
 601
 602 &sdhi3 {
 603         pinctrl-0 = <&sdhi3_pins>;
 604         pinctrl-1 = <&sdhi3_pins_uhs>;
 605         pinctrl-names = "default", "state_uhs";
 606
 607         vmmc-supply = <&vcc_sdhi3>;
 608         vqmmc-supply = <&vccq_sdhi3>;
 609         cd-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
 610         wp-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
 611         bus-width = <4>;
 612         sd-uhs-sdr50;
 613         status = "okay";
 614 };
 615
 616 &ssi1 {
 617         shared-pin;
 618 };
 619
 620 &usb2_phy0 {
 621         pinctrl-0 = <&usb0_pins>;
 622         pinctrl-names = "default";
 623
 624         vbus-supply = <&vbus0_usb2>;
 625         status = "okay";
 626 };
 627
 628 &usb2_phy1 {
 629         pinctrl-0 = <&usb1_pins>;
 630         pinctrl-names = "default";
 631
 632         status = "okay";
 633 };
 634
 635 &wdt0 {
 636         timeout-sec = <60>;
 637         status = "okay";
 638 };
 639
 640 &xhci0 {
 641         status = "okay";
 642 };