arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 /*
   3  * Device Tree Source for the RZ/G2LC SMARC pincontrol parts
   4  *
   5  * Copyright (C) 2021 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
  10
  11 &pinctrl {
  12         pinctrl-0 = <&sound_clk_pins>;
  13         pinctrl-names = "default";
  14
  15 #if SW_SCIF_CAN
  16         /* SW8 should be at position 2->1 */
  17         can1_pins: can1 {
  18                 pinmux = <RZG2L_PORT_PINMUX(40, 0, 3)>, /* TxD */
  19                          <RZG2L_PORT_PINMUX(40, 1, 3)>; /* RxD */
  20         };
  21 #endif
  22
  23 #if SW_RSPI_CAN
  24         /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */
  25         can1-stb-hog {
  26                 gpio-hog;
  27                 gpios = <RZG2L_GPIO(44, 3) GPIO_ACTIVE_HIGH>;
  28                 output-low;
  29                 line-name = "can1_stb";
  30         };
  31
  32         can1_pins: can1 {
  33                 pinmux = <RZG2L_PORT_PINMUX(44, 0, 3)>, /* TxD */
  34                          <RZG2L_PORT_PINMUX(44, 1, 3)>; /* RxD */
  35         };
  36 #endif
  37
  38         i2c0_pins: i2c0 {
  39                 pins = "RIIC0_SDA", "RIIC0_SCL";
  40                 input-enable;
  41         };
  42
  43         i2c1_pins: i2c1 {
  44                 pins = "RIIC1_SDA", "RIIC1_SCL";
  45                 input-enable;
  46         };
  47
  48         i2c2_pins: i2c2 {
  49                 pinmux = <RZG2L_PORT_PINMUX(42, 3, 1)>, /* SDA */
  50                          <RZG2L_PORT_PINMUX(42, 4, 1)>; /* SCL */
  51         };
  52
  53         scif0_pins: scif0 {
  54                 pinmux = <RZG2L_PORT_PINMUX(38, 0, 1)>, /* TxD */
  55                          <RZG2L_PORT_PINMUX(38, 1, 1)>; /* RxD */
  56         };
  57
  58         scif1_pins: scif1 {
  59                 pinmux = <RZG2L_PORT_PINMUX(40, 0, 1)>, /* TxD */
  60                          <RZG2L_PORT_PINMUX(40, 1, 1)>, /* RxD */
  61                          <RZG2L_PORT_PINMUX(41, 0, 1)>, /* CTS# */
  62                          <RZG2L_PORT_PINMUX(41, 1, 1)>; /* RTS# */
  63         };
  64
  65         sd1-pwr-en-hog {
  66                 gpio-hog;
  67                 gpios = <RZG2L_GPIO(39, 2) GPIO_ACTIVE_HIGH>;
  68                 output-high;
  69                 line-name = "sd1_pwr_en";
  70         };
  71
  72         sdhi1_pins: sd1 {
  73                 sd1_data {
  74                         pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
  75                         power-source = <3300>;
  76                 };
  77
  78                 sd1_ctrl {
  79                         pins = "SD1_CLK", "SD1_CMD";
  80                         power-source = <3300>;
  81                 };
  82
  83                 sd1_mux {
  84                         pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
  85                 };
  86         };
  87
  88         sdhi1_pins_uhs: sd1_uhs {
  89                 sd1_data_uhs {
  90                         pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
  91                         power-source = <1800>;
  92                 };
  93
  94                 sd1_ctrl_uhs {
  95                         pins = "SD1_CLK", "SD1_CMD";
  96                         power-source = <1800>;
  97                 };
  98
  99                 sd1_mux_uhs {
 100                         pinmux = <RZG2L_PORT_PINMUX(19, 0, 1)>; /* SD1_CD */
 101                 };
 102         };
 103
 104         sound_clk_pins: sound_clk {
 105                 pins = "AUDIO_CLK1", "AUDIO_CLK2";
 106                 input-enable;
 107         };
 108
 109         spi1_pins: spi1 {
 110                 pinmux = <RZG2L_PORT_PINMUX(44, 0, 1)>, /* CK */
 111                          <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
 112                          <RZG2L_PORT_PINMUX(44, 2, 1)>, /* MISO */
 113                          <RZG2L_PORT_PINMUX(44, 3, 1)>; /* SSL */
 114         };
 115
 116         ssi0_pins: ssi0 {
 117                 pinmux = <RZG2L_PORT_PINMUX(45, 0, 1)>, /* BCK */
 118                          <RZG2L_PORT_PINMUX(45, 1, 1)>, /* RCK */
 119                          <RZG2L_PORT_PINMUX(45, 2, 1)>, /* TXD */
 120                          <RZG2L_PORT_PINMUX(45, 3, 1)>; /* RXD */
 121         };
 122
 123         usb0_pins: usb0 {
 124                 pinmux = <RZG2L_PORT_PINMUX(4, 0, 1)>, /* VBUS */
 125                          <RZG2L_PORT_PINMUX(5, 0, 1)>, /* OVC */
 126                          <RZG2L_PORT_PINMUX(5, 1, 1)>; /* OTG_ID */
 127         };
 128
 129         usb1_pins: usb1 {
 130                 pinmux = <RZG2L_PORT_PINMUX(42, 0, 1)>, /* VBUS */
 131                          <RZG2L_PORT_PINMUX(42, 1, 1)>; /* OVC */
 132         };
 133 };
 134