1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK common parts
5 * Copyright (C) 2021 Renesas Electronics Corp.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
18 compatible = "fixed-clock";
20 clock-frequency = <12000000>;
24 compatible = "hdmi-connector";
28 hdmi_con_out: endpoint {
29 remote-endpoint = <&adv7535_out>;
55 data-lanes = <1 2 3 4>;
56 remote-endpoint = <&adv7535_in>;
64 compatible = "adi,adv7535";
67 interrupt-parent = <&pinctrl>;
68 interrupts = <RZG2L_GPIO(2, 1) IRQ_TYPE_EDGE_FALLING>;
71 avdd-supply = <®_1p8v>;
72 dvdd-supply = <®_1p8v>;
73 pvdd-supply = <®_1p8v>;
74 a2vdd-supply = <®_1p8v>;
75 v3p3-supply = <®_3p3v>;
76 v1p2-supply = <®_1p8v>;
86 adv7535_in: endpoint {
87 remote-endpoint = <&dsi0_out>;
93 adv7535_out: endpoint {
94 remote-endpoint = <&hdmi_con_out>;
102 pinctrl-0 = <&i2c3_pins>;
103 pinctrl-names = "default";
104 clock-frequency = <400000>;
109 compatible = "wlf,wm8978";
110 #sound-dai-cells = <0>;
114 versa3: clock-generator@68 {
115 compatible = "renesas,5p35023";
121 80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf
122 00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6
126 assigned-clocks = <&versa3 0>, <&versa3 1>,
127 <&versa3 2>, <&versa3 3>,
128 <&versa3 4>, <&versa3 5>;
129 assigned-clock-rates = <24000000>, <11289600>,
130 <11289600>, <12000000>,
131 <25000000>, <12288000>;
137 pinctrl-0 = <&mtu3_pins>;
138 pinctrl-names = "default";
143 #if MTU3_COUNTER_Z_PHASE_SIGNAL
144 /* SDHI cd pin is muxed with counter Z phase signal */
148 #endif /* MTU3_COUNTER_Z_PHASE_SIGNAL */
153 #endif /* PMOD_MTU3 */
156 * To enable SCIF2 (SER0) on PMOD1 (CN7)
157 * SW1 should be at position 2->3 so that SER0_CTS# line is activated
158 * SW2 should be at position 2->3 so that SER0_TX line is activated
159 * SW3 should be at position 2->3 so that SER0_RX line is activated
160 * SW4 should be at position 2->3 so that SER0_RTS# line is activated
164 pinctrl-0 = <&scif2_pins>;
165 pinctrl-names = "default";
173 pinctrl-0 = <&ssi0_pins>;
174 pinctrl-names = "default";
180 gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;