1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the RZ/{G2L,V2L} SMARC EVK common parts
5 * Copyright (C) 2021 Renesas Electronics Corp.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
11 /* comment the #define statement to disable SCIF2 (SER0) on PMOD1 (CN7) */
26 pinctrl-0 = <&i2c3_pins>;
27 pinctrl-names = "default";
28 clock-frequency = <400000>;
33 compatible = "wlf,wm8978";
34 #sound-dai-cells = <0>;
40 * To enable SCIF2 (SER0) on PMOD1 (CN7)
41 * SW1 should be at position 2->3 so that SER0_CTS# line is activated
42 * SW2 should be at position 2->3 so that SER0_TX line is activated
43 * SW3 should be at position 2->3 so that SER0_RX line is activated
44 * SW4 should be at position 2->3 so that SER0_RTS# line is activated
48 pinctrl-0 = <&scif2_pins>;
49 pinctrl-names = "default";
57 pinctrl-0 = <&ssi0_pins>;
58 pinctrl-names = "default";
64 gpios = <&pinctrl RZG2L_GPIO(39, 1) GPIO_ACTIVE_HIGH>;