1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the White Hawk CPU board
5 * Copyright (C) 2022 Renesas Electronics Corp.
8 #include "r8a779g0.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
15 model = "Renesas White Hawk CPU board";
16 compatible = "renesas,white-hawk-cpu", "renesas,r8a779g0";
24 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
25 stdout-path = "serial0:921600n8";
29 compatible = "gpio-keys";
31 pinctrl-0 = <&keys_pins>;
32 pinctrl-names = "default";
35 gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
39 debounce-interval = <20>;
43 gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
47 debounce-interval = <20>;
51 gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
55 debounce-interval = <20>;
60 compatible = "gpio-leds";
63 gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
64 color = <LED_COLOR_ID_GREEN>;
65 function = LED_FUNCTION_INDICATOR;
66 function-enumerator = <1>;
70 gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
71 color = <LED_COLOR_ID_GREEN>;
72 function = LED_FUNCTION_INDICATOR;
73 function-enumerator = <2>;
77 gpios = <&gpio7 2 GPIO_ACTIVE_HIGH>;
78 color = <LED_COLOR_ID_GREEN>;
79 function = LED_FUNCTION_INDICATOR;
80 function-enumerator = <3>;
85 device_type = "memory";
86 /* first 128MB is reserved for secure area. */
87 reg = <0x0 0x48000000 0x0 0x78000000>;
91 device_type = "memory";
92 reg = <0x4 0x80000000 0x0 0x80000000>;
96 device_type = "memory";
97 reg = <0x6 0x00000000 0x1 0x00000000>;
102 pinctrl-0 = <&avb0_pins>;
103 pinctrl-names = "default";
104 phy-handle = <&phy0>;
105 tx-internal-delay-ps = <2000>;
108 phy0: ethernet-phy@0 {
109 compatible = "ethernet-phy-id0022.1622",
110 "ethernet-phy-ieee802.3-c22";
111 rxc-skew-ps = <1500>;
113 interrupt-parent = <&gpio7>;
114 interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
115 reset-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
120 clock-frequency = <16666666>;
124 clock-frequency = <32768>;
128 pinctrl-0 = <&hscif0_pins>;
129 pinctrl-names = "default";
135 pinctrl-0 = <&i2c0_pins>;
136 pinctrl-names = "default";
139 clock-frequency = <400000>;
142 compatible = "rohm,br24g01", "atmel,24c01";
150 pinctrl-0 = <&scif_clk_pins>;
151 pinctrl-names = "default";
155 groups = "avb0_link", "avb0_mdio", "avb0_rgmii",
161 groups = "avb0_mdio";
162 drive-strength = <21>;
166 groups = "avb0_rgmii";
167 drive-strength = <21>;
171 hscif0_pins: hscif0 {
172 groups = "hscif0_data";
182 pins = "GP_5_0", "GP_5_1", "GP_5_2";
186 scif_clk_pins: scif_clk {
188 function = "scif_clk";
193 clock-frequency = <24000000>;