arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / arch / arm64 / boot / dts / renesas / r8a77980.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Device Tree Source for the R-Car V3H (R8A77980) SoC
4  *
5  * Copyright (C) 2018 Renesas Electronics Corp.
6  * Copyright (C) 2018 Cogent Embedded, Inc.
7  */
8
9 #include <dt-bindings/clock/r8a77980-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/r8a77980-sysc.h>
13
14 / {
15         compatible = "renesas,r8a77980";
16         #address-cells = <2>;
17         #size-cells = <2>;
18
19         /* External CAN clock - to be overridden by boards that provide it */
20         can_clk: can {
21                 compatible = "fixed-clock";
22                 #clock-cells = <0>;
23                 clock-frequency = <0>;
24         };
25
26         cpus {
27                 #address-cells = <1>;
28                 #size-cells = <0>;
29
30                 a53_0: cpu@0 {
31                         device_type = "cpu";
32                         compatible = "arm,cortex-a53";
33                         reg = <0>;
34                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
35                         power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
36                         next-level-cache = <&L2_CA53>;
37                         enable-method = "psci";
38                 };
39
40                 a53_1: cpu@1 {
41                         device_type = "cpu";
42                         compatible = "arm,cortex-a53";
43                         reg = <1>;
44                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
45                         power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
46                         next-level-cache = <&L2_CA53>;
47                         enable-method = "psci";
48                 };
49
50                 a53_2: cpu@2 {
51                         device_type = "cpu";
52                         compatible = "arm,cortex-a53";
53                         reg = <2>;
54                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
55                         power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
56                         next-level-cache = <&L2_CA53>;
57                         enable-method = "psci";
58                 };
59
60                 a53_3: cpu@3 {
61                         device_type = "cpu";
62                         compatible = "arm,cortex-a53";
63                         reg = <3>;
64                         clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
65                         power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
66                         next-level-cache = <&L2_CA53>;
67                         enable-method = "psci";
68                 };
69
70                 L2_CA53: cache-controller {
71                         compatible = "cache";
72                         power-domains = <&sysc R8A77980_PD_CA53_SCU>;
73                         cache-unified;
74                         cache-level = <2>;
75                 };
76         };
77
78         extal_clk: extal {
79                 compatible = "fixed-clock";
80                 #clock-cells = <0>;
81                 /* This value must be overridden by the board */
82                 clock-frequency = <0>;
83         };
84
85         extalr_clk: extalr {
86                 compatible = "fixed-clock";
87                 #clock-cells = <0>;
88                 /* This value must be overridden by the board */
89                 clock-frequency = <0>;
90         };
91
92         /* External PCIe clock - can be overridden by the board */
93         pcie_bus_clk: pcie_bus {
94                 compatible = "fixed-clock";
95                 #clock-cells = <0>;
96                 clock-frequency = <0>;
97         };
98
99         pmu_a53 {
100                 compatible = "arm,cortex-a53-pmu";
101                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
102                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
103                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
104                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
105                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
106         };
107
108         psci {
109                 compatible = "arm,psci-1.0", "arm,psci-0.2";
110                 method = "smc";
111         };
112
113         /* External SCIF clock - to be overridden by boards that provide it */
114         scif_clk: scif {
115                 compatible = "fixed-clock";
116                 #clock-cells = <0>;
117                 clock-frequency = <0>;
118         };
119
120         soc {
121                 compatible = "simple-bus";
122                 interrupt-parent = <&gic>;
123
124                 #address-cells = <2>;
125                 #size-cells = <2>;
126                 ranges;
127
128                 rwdt: watchdog@e6020000 {
129                         compatible = "renesas,r8a77980-wdt",
130                                      "renesas,rcar-gen3-wdt";
131                         reg = <0 0xe6020000 0 0x0c>;
132                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
133                         clocks = <&cpg CPG_MOD 402>;
134                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
135                         resets = <&cpg 402>;
136                         status = "disabled";
137                 };
138
139                 gpio0: gpio@e6050000 {
140                         compatible = "renesas,gpio-r8a77980",
141                                      "renesas,rcar-gen3-gpio";
142                         reg = <0 0xe6050000 0 0x50>;
143                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
144                         #gpio-cells = <2>;
145                         gpio-controller;
146                         gpio-ranges = <&pfc 0 0 22>;
147                         #interrupt-cells = <2>;
148                         interrupt-controller;
149                         clocks = <&cpg CPG_MOD 912>;
150                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
151                         resets = <&cpg 912>;
152                 };
153
154                 gpio1: gpio@e6051000 {
155                         compatible = "renesas,gpio-r8a77980",
156                                      "renesas,rcar-gen3-gpio";
157                         reg = <0 0xe6051000 0 0x50>;
158                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
159                         #gpio-cells = <2>;
160                         gpio-controller;
161                         gpio-ranges = <&pfc 0 32 28>;
162                         #interrupt-cells = <2>;
163                         interrupt-controller;
164                         clocks = <&cpg CPG_MOD 911>;
165                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
166                         resets = <&cpg 911>;
167                 };
168
169                 gpio2: gpio@e6052000 {
170                         compatible = "renesas,gpio-r8a77980",
171                                      "renesas,rcar-gen3-gpio";
172                         reg = <0 0xe6052000 0 0x50>;
173                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
174                         #gpio-cells = <2>;
175                         gpio-controller;
176                         gpio-ranges = <&pfc 0 64 30>;
177                         #interrupt-cells = <2>;
178                         interrupt-controller;
179                         clocks = <&cpg CPG_MOD 910>;
180                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
181                         resets = <&cpg 910>;
182                 };
183
184                 gpio3: gpio@e6053000 {
185                         compatible = "renesas,gpio-r8a77980",
186                                      "renesas,rcar-gen3-gpio";
187                         reg = <0 0xe6053000 0 0x50>;
188                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
189                         #gpio-cells = <2>;
190                         gpio-controller;
191                         gpio-ranges = <&pfc 0 96 17>;
192                         #interrupt-cells = <2>;
193                         interrupt-controller;
194                         clocks = <&cpg CPG_MOD 909>;
195                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
196                         resets = <&cpg 909>;
197                 };
198
199                 gpio4: gpio@e6054000 {
200                         compatible = "renesas,gpio-r8a77980",
201                                      "renesas,rcar-gen3-gpio";
202                         reg = <0 0xe6054000 0 0x50>;
203                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
204                         #gpio-cells = <2>;
205                         gpio-controller;
206                         gpio-ranges = <&pfc 0 128 25>;
207                         #interrupt-cells = <2>;
208                         interrupt-controller;
209                         clocks = <&cpg CPG_MOD 908>;
210                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
211                         resets = <&cpg 908>;
212                 };
213
214                 gpio5: gpio@e6055000 {
215                         compatible = "renesas,gpio-r8a77980",
216                                      "renesas,rcar-gen3-gpio";
217                         reg = <0 0xe6055000 0 0x50>;
218                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
219                         #gpio-cells = <2>;
220                         gpio-controller;
221                         gpio-ranges = <&pfc 0 160 15>;
222                         #interrupt-cells = <2>;
223                         interrupt-controller;
224                         clocks = <&cpg CPG_MOD 907>;
225                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
226                         resets = <&cpg 907>;
227                 };
228
229                 pfc: pinctrl@e6060000 {
230                         compatible = "renesas,pfc-r8a77980";
231                         reg = <0 0xe6060000 0 0x50c>;
232                 };
233
234                 cmt0: timer@e60f0000 {
235                         compatible = "renesas,r8a77980-cmt0",
236                                      "renesas,rcar-gen3-cmt0";
237                         reg = <0 0xe60f0000 0 0x1004>;
238                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
239                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
240                         clocks = <&cpg CPG_MOD 303>;
241                         clock-names = "fck";
242                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
243                         resets = <&cpg 303>;
244                         status = "disabled";
245                 };
246
247                 cmt1: timer@e6130000 {
248                         compatible = "renesas,r8a77980-cmt1",
249                                      "renesas,rcar-gen3-cmt1";
250                         reg = <0 0xe6130000 0 0x1004>;
251                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
252                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
253                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
254                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
255                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
256                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
257                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
258                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
259                         clocks = <&cpg CPG_MOD 302>;
260                         clock-names = "fck";
261                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
262                         resets = <&cpg 302>;
263                         status = "disabled";
264                 };
265
266                 cmt2: timer@e6140000 {
267                         compatible = "renesas,r8a77980-cmt1",
268                                      "renesas,rcar-gen3-cmt1";
269                         reg = <0 0xe6140000 0 0x1004>;
270                         interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
271                                      <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
272                                      <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
273                                      <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
274                                      <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
275                                      <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
276                                      <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
277                                      <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
278                         clocks = <&cpg CPG_MOD 301>;
279                         clock-names = "fck";
280                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
281                         resets = <&cpg 301>;
282                         status = "disabled";
283                 };
284
285                 cmt3: timer@e6148000 {
286                         compatible = "renesas,r8a77980-cmt1",
287                                      "renesas,rcar-gen3-cmt1";
288                         reg = <0 0xe6148000 0 0x1004>;
289                         interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
290                                      <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
291                                      <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
292                                      <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
293                                      <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
294                                      <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
295                                      <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
296                                      <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
297                         clocks = <&cpg CPG_MOD 300>;
298                         clock-names = "fck";
299                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
300                         resets = <&cpg 300>;
301                         status = "disabled";
302                 };
303
304                 cpg: clock-controller@e6150000 {
305                         compatible = "renesas,r8a77980-cpg-mssr";
306                         reg = <0 0xe6150000 0 0x1000>;
307                         clocks = <&extal_clk>, <&extalr_clk>;
308                         clock-names = "extal", "extalr";
309                         #clock-cells = <2>;
310                         #power-domain-cells = <0>;
311                         #reset-cells = <1>;
312                 };
313
314                 rst: reset-controller@e6160000 {
315                         compatible = "renesas,r8a77980-rst";
316                         reg = <0 0xe6160000 0 0x200>;
317                 };
318
319                 sysc: system-controller@e6180000 {
320                         compatible = "renesas,r8a77980-sysc";
321                         reg = <0 0xe6180000 0 0x440>;
322                         #power-domain-cells = <1>;
323                 };
324
325                 tsc: thermal@e6198000 {
326                         compatible = "renesas,r8a77980-thermal";
327                         reg = <0 0xe6198000 0 0x100>,
328                               <0 0xe61a0000 0 0x100>;
329                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
330                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
331                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
332                         clocks = <&cpg CPG_MOD 522>;
333                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
334                         resets = <&cpg 522>;
335                         #thermal-sensor-cells = <1>;
336                 };
337
338                 intc_ex: interrupt-controller@e61c0000 {
339                         compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
340                         #interrupt-cells = <2>;
341                         interrupt-controller;
342                         reg = <0 0xe61c0000 0 0x200>;
343                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
344                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
345                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
346                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
347                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
348                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
349                         clocks = <&cpg CPG_MOD 407>;
350                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
351                         resets = <&cpg 407>;
352                 };
353
354                 tmu0: timer@e61e0000 {
355                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
356                         reg = <0 0xe61e0000 0 0x30>;
357                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
358                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
359                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
360                         clocks = <&cpg CPG_MOD 125>;
361                         clock-names = "fck";
362                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
363                         resets = <&cpg 125>;
364                         status = "disabled";
365                 };
366
367                 tmu1: timer@e6fc0000 {
368                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
369                         reg = <0 0xe6fc0000 0 0x30>;
370                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
371                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
372                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
373                         clocks = <&cpg CPG_MOD 124>;
374                         clock-names = "fck";
375                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
376                         resets = <&cpg 124>;
377                         status = "disabled";
378                 };
379
380                 tmu2: timer@e6fd0000 {
381                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
382                         reg = <0 0xe6fd0000 0 0x30>;
383                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
384                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
385                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
386                         clocks = <&cpg CPG_MOD 123>;
387                         clock-names = "fck";
388                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
389                         resets = <&cpg 123>;
390                         status = "disabled";
391                 };
392
393                 tmu3: timer@e6fe0000 {
394                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
395                         reg = <0 0xe6fe0000 0 0x30>;
396                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
397                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
398                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
399                         clocks = <&cpg CPG_MOD 122>;
400                         clock-names = "fck";
401                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
402                         resets = <&cpg 122>;
403                         status = "disabled";
404                 };
405
406                 tmu4: timer@ffc00000 {
407                         compatible = "renesas,tmu-r8a77980", "renesas,tmu";
408                         reg = <0 0xffc00000 0 0x30>;
409                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
410                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
411                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
412                         clocks = <&cpg CPG_MOD 121>;
413                         clock-names = "fck";
414                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
415                         resets = <&cpg 121>;
416                         status = "disabled";
417                 };
418
419                 i2c0: i2c@e6500000 {
420                         compatible = "renesas,i2c-r8a77980",
421                                      "renesas,rcar-gen3-i2c";
422                         reg = <0 0xe6500000 0 0x40>;
423                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
424                         clocks = <&cpg CPG_MOD 931>;
425                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
426                         resets = <&cpg 931>;
427                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
428                                <&dmac2 0x91>, <&dmac2 0x90>;
429                         dma-names = "tx", "rx", "tx", "rx";
430                         i2c-scl-internal-delay-ns = <6>;
431                         #address-cells = <1>;
432                         #size-cells = <0>;
433                         status = "disabled";
434                 };
435
436                 i2c1: i2c@e6508000 {
437                         compatible = "renesas,i2c-r8a77980",
438                                      "renesas,rcar-gen3-i2c";
439                         reg = <0 0xe6508000 0 0x40>;
440                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
441                         clocks = <&cpg CPG_MOD 930>;
442                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
443                         resets = <&cpg 930>;
444                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
445                                <&dmac2 0x93>, <&dmac2 0x92>;
446                         dma-names = "tx", "rx", "tx", "rx";
447                         i2c-scl-internal-delay-ns = <6>;
448                         #address-cells = <1>;
449                         #size-cells = <0>;
450                         status = "disabled";
451                 };
452
453                 i2c2: i2c@e6510000 {
454                         compatible = "renesas,i2c-r8a77980",
455                                      "renesas,rcar-gen3-i2c";
456                         reg = <0 0xe6510000 0 0x40>;
457                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
458                         clocks = <&cpg CPG_MOD 929>;
459                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
460                         resets = <&cpg 929>;
461                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
462                                <&dmac2 0x95>, <&dmac2 0x94>;
463                         dma-names = "tx", "rx", "tx", "rx";
464                         i2c-scl-internal-delay-ns = <6>;
465                         #address-cells = <1>;
466                         #size-cells = <0>;
467                         status = "disabled";
468                 };
469
470                 i2c3: i2c@e66d0000 {
471                         compatible = "renesas,i2c-r8a77980",
472                                      "renesas,rcar-gen3-i2c";
473                         reg = <0 0xe66d0000 0 0x40>;
474                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
475                         clocks = <&cpg CPG_MOD 928>;
476                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
477                         resets = <&cpg 928>;
478                         i2c-scl-internal-delay-ns = <6>;
479                         #address-cells = <1>;
480                         #size-cells = <0>;
481                         status = "disabled";
482                 };
483
484                 i2c4: i2c@e66d8000 {
485                         compatible = "renesas,i2c-r8a77980",
486                                      "renesas,rcar-gen3-i2c";
487                         reg = <0 0xe66d8000 0 0x40>;
488                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
489                         clocks = <&cpg CPG_MOD 927>;
490                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
491                         resets = <&cpg 927>;
492                         i2c-scl-internal-delay-ns = <6>;
493                         #address-cells = <1>;
494                         #size-cells = <0>;
495                         status = "disabled";
496                 };
497
498                 i2c5: i2c@e66e0000 {
499                         compatible = "renesas,i2c-r8a77980",
500                                      "renesas,rcar-gen3-i2c";
501                         reg = <0 0xe66e0000 0 0x40>;
502                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
503                         clocks = <&cpg CPG_MOD 919>;
504                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
505                         resets = <&cpg 919>;
506                         dmas = <&dmac1 0x9b>, <&dmac1 0x9a>,
507                                <&dmac2 0x9b>, <&dmac2 0x9a>;
508                         dma-names = "tx", "rx", "tx", "rx";
509                         i2c-scl-internal-delay-ns = <6>;
510                         #address-cells = <1>;
511                         #size-cells = <0>;
512                         status = "disabled";
513                 };
514
515                 hscif0: serial@e6540000 {
516                         compatible = "renesas,hscif-r8a77980",
517                                      "renesas,rcar-gen3-hscif",
518                                      "renesas,hscif";
519                         reg = <0 0xe6540000 0 0x60>;
520                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
521                         clocks = <&cpg CPG_MOD 520>,
522                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
523                                  <&scif_clk>;
524                         clock-names = "fck", "brg_int", "scif_clk";
525                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
526                                <&dmac2 0x31>, <&dmac2 0x30>;
527                         dma-names = "tx", "rx", "tx", "rx";
528                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
529                         resets = <&cpg 520>;
530                         status = "disabled";
531                 };
532
533                 hscif1: serial@e6550000 {
534                         compatible = "renesas,hscif-r8a77980",
535                                      "renesas,rcar-gen3-hscif",
536                                      "renesas,hscif";
537                         reg = <0 0xe6550000 0 0x60>;
538                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
539                         clocks = <&cpg CPG_MOD 519>,
540                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
541                                  <&scif_clk>;
542                         clock-names = "fck", "brg_int", "scif_clk";
543                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
544                                <&dmac2 0x33>, <&dmac2 0x32>;
545                         dma-names = "tx", "rx", "tx", "rx";
546                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
547                         resets = <&cpg 519>;
548                         status = "disabled";
549                 };
550
551                 hscif2: serial@e6560000 {
552                         compatible = "renesas,hscif-r8a77980",
553                                      "renesas,rcar-gen3-hscif",
554                                      "renesas,hscif";
555                         reg = <0 0xe6560000 0 0x60>;
556                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
557                         clocks = <&cpg CPG_MOD 518>,
558                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
559                                  <&scif_clk>;
560                         clock-names = "fck", "brg_int", "scif_clk";
561                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
562                                <&dmac2 0x35>, <&dmac2 0x34>;
563                         dma-names = "tx", "rx", "tx", "rx";
564                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
565                         resets = <&cpg 518>;
566                         status = "disabled";
567                 };
568
569                 hscif3: serial@e66a0000 {
570                         compatible = "renesas,hscif-r8a77980",
571                                      "renesas,rcar-gen3-hscif",
572                                      "renesas,hscif";
573                         reg = <0 0xe66a0000 0 0x60>;
574                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
575                         clocks = <&cpg CPG_MOD 517>,
576                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
577                                  <&scif_clk>;
578                         clock-names = "fck", "brg_int", "scif_clk";
579                         dmas = <&dmac1 0x37>, <&dmac1 0x36>,
580                                <&dmac2 0x37>, <&dmac2 0x36>;
581                         dma-names = "tx", "rx", "tx", "rx";
582                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
583                         resets = <&cpg 517>;
584                         status = "disabled";
585                 };
586
587                 pcie_phy: pcie-phy@e65d0000 {
588                         compatible = "renesas,r8a77980-pcie-phy";
589                         reg = <0 0xe65d0000 0 0x8000>;
590                         #phy-cells = <0>;
591                         clocks = <&cpg CPG_MOD 319>;
592                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
593                         resets = <&cpg 319>;
594                         status = "disabled";
595                 };
596
597                 canfd: can@e66c0000 {
598                         compatible = "renesas,r8a77980-canfd",
599                                      "renesas,rcar-gen3-canfd";
600                         reg = <0 0xe66c0000 0 0x8000>;
601                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
602                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
603                         interrupt-names = "ch_int", "g_int";
604                         clocks = <&cpg CPG_MOD 914>,
605                                  <&cpg CPG_CORE R8A77980_CLK_CANFD>,
606                                  <&can_clk>;
607                         clock-names = "fck", "canfd", "can_clk";
608                         assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
609                         assigned-clock-rates = <40000000>;
610                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
611                         resets = <&cpg 914>;
612                         status = "disabled";
613
614                         channel0 {
615                                 status = "disabled";
616                         };
617
618                         channel1 {
619                                 status = "disabled";
620                         };
621                 };
622
623                 avb: ethernet@e6800000 {
624                         compatible = "renesas,etheravb-r8a77980",
625                                      "renesas,etheravb-rcar-gen3";
626                         reg = <0 0xe6800000 0 0x800>;
627                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
628                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
629                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
630                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
631                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
632                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
633                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
634                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
635                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
636                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
637                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
638                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
639                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
640                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
641                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
642                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
643                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
644                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
645                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
646                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
647                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
648                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
649                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
650                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
651                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
652                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
653                                           "ch4", "ch5", "ch6", "ch7",
654                                           "ch8", "ch9", "ch10", "ch11",
655                                           "ch12", "ch13", "ch14", "ch15",
656                                           "ch16", "ch17", "ch18", "ch19",
657                                           "ch20", "ch21", "ch22", "ch23",
658                                           "ch24";
659                         clocks = <&cpg CPG_MOD 812>;
660                         clock-names = "fck";
661                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
662                         resets = <&cpg 812>;
663                         phy-mode = "rgmii";
664                         rx-internal-delay-ps = <0>;
665                         tx-internal-delay-ps = <2000>;
666                         iommus = <&ipmmu_ds1 33>;
667                         #address-cells = <1>;
668                         #size-cells = <0>;
669                         status = "disabled";
670                 };
671
672                 pwm0: pwm@e6e30000 {
673                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
674                         reg = <0 0xe6e30000 0 0x10>;
675                         #pwm-cells = <2>;
676                         clocks = <&cpg CPG_MOD 523>;
677                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
678                         resets = <&cpg 523>;
679                         status = "disabled";
680                 };
681
682                 pwm1: pwm@e6e31000 {
683                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
684                         reg = <0 0xe6e31000 0 0x10>;
685                         #pwm-cells = <2>;
686                         clocks = <&cpg CPG_MOD 523>;
687                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
688                         resets = <&cpg 523>;
689                         status = "disabled";
690                 };
691
692                 pwm2: pwm@e6e32000 {
693                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
694                         reg = <0 0xe6e32000 0 0x10>;
695                         #pwm-cells = <2>;
696                         clocks = <&cpg CPG_MOD 523>;
697                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
698                         resets = <&cpg 523>;
699                         status = "disabled";
700                 };
701
702                 pwm3: pwm@e6e33000 {
703                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
704                         reg = <0 0xe6e33000 0 0x10>;
705                         #pwm-cells = <2>;
706                         clocks = <&cpg CPG_MOD 523>;
707                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
708                         resets = <&cpg 523>;
709                         status = "disabled";
710                 };
711
712                 pwm4: pwm@e6e34000 {
713                         compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
714                         reg = <0 0xe6e34000 0 0x10>;
715                         #pwm-cells = <2>;
716                         clocks = <&cpg CPG_MOD 523>;
717                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
718                         resets = <&cpg 523>;
719                         status = "disabled";
720                 };
721
722                 scif0: serial@e6e60000 {
723                         compatible = "renesas,scif-r8a77980",
724                                      "renesas,rcar-gen3-scif",
725                                      "renesas,scif";
726                         reg = <0 0xe6e60000 0 0x40>;
727                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
728                         clocks = <&cpg CPG_MOD 207>,
729                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
730                                  <&scif_clk>;
731                         clock-names = "fck", "brg_int", "scif_clk";
732                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
733                                <&dmac2 0x51>, <&dmac2 0x50>;
734                         dma-names = "tx", "rx", "tx", "rx";
735                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
736                         resets = <&cpg 207>;
737                         status = "disabled";
738                 };
739
740                 scif1: serial@e6e68000 {
741                         compatible = "renesas,scif-r8a77980",
742                                      "renesas,rcar-gen3-scif",
743                                      "renesas,scif";
744                         reg = <0 0xe6e68000 0 0x40>;
745                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
746                         clocks = <&cpg CPG_MOD 206>,
747                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
748                                  <&scif_clk>;
749                         clock-names = "fck", "brg_int", "scif_clk";
750                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
751                                <&dmac2 0x53>, <&dmac2 0x52>;
752                         dma-names = "tx", "rx", "tx", "rx";
753                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
754                         resets = <&cpg 206>;
755                         status = "disabled";
756                 };
757
758                 scif3: serial@e6c50000 {
759                         compatible = "renesas,scif-r8a77980",
760                                      "renesas,rcar-gen3-scif",
761                                      "renesas,scif";
762                         reg = <0 0xe6c50000 0 0x40>;
763                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
764                         clocks = <&cpg CPG_MOD 204>,
765                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
766                                  <&scif_clk>;
767                         clock-names = "fck", "brg_int", "scif_clk";
768                         dmas = <&dmac1 0x57>, <&dmac1 0x56>,
769                                <&dmac2 0x57>, <&dmac2 0x56>;
770                         dma-names = "tx", "rx", "tx", "rx";
771                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
772                         resets = <&cpg 204>;
773                         status = "disabled";
774                 };
775
776                 scif4: serial@e6c40000 {
777                         compatible = "renesas,scif-r8a77980",
778                                      "renesas,rcar-gen3-scif",
779                                      "renesas,scif";
780                         reg = <0 0xe6c40000 0 0x40>;
781                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
782                         clocks = <&cpg CPG_MOD 203>,
783                                  <&cpg CPG_CORE R8A77980_CLK_S3D1>,
784                                  <&scif_clk>;
785                         clock-names = "fck", "brg_int", "scif_clk";
786                         dmas = <&dmac1 0x59>, <&dmac1 0x58>,
787                                <&dmac2 0x59>, <&dmac2 0x58>;
788                         dma-names = "tx", "rx", "tx", "rx";
789                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
790                         resets = <&cpg 203>;
791                         status = "disabled";
792                 };
793
794                 tpu: pwm@e6e80000 {
795                         compatible = "renesas,tpu-r8a77980", "renesas,tpu";
796                         reg = <0 0xe6e80000 0 0x148>;
797                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
798                         clocks = <&cpg CPG_MOD 304>;
799                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
800                         resets = <&cpg 304>;
801                         #pwm-cells = <3>;
802                         status = "disabled";
803                 };
804
805                 msiof0: spi@e6e90000 {
806                         compatible = "renesas,msiof-r8a77980",
807                                      "renesas,rcar-gen3-msiof";
808                         reg = <0 0xe6e90000 0 0x64>;
809                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
810                         clocks = <&cpg CPG_MOD 211>;
811                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
812                         resets = <&cpg 211>;
813                         #address-cells = <1>;
814                         #size-cells = <0>;
815                         status = "disabled";
816                 };
817
818                 msiof1: spi@e6ea0000 {
819                         compatible = "renesas,msiof-r8a77980",
820                                      "renesas,rcar-gen3-msiof";
821                         reg = <0 0xe6ea0000 0 0x0064>;
822                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
823                         clocks = <&cpg CPG_MOD 210>;
824                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
825                         resets = <&cpg 210>;
826                         #address-cells = <1>;
827                         #size-cells = <0>;
828                         status = "disabled";
829                 };
830
831                 msiof2: spi@e6c00000 {
832                         compatible = "renesas,msiof-r8a77980",
833                                      "renesas,rcar-gen3-msiof";
834                         reg = <0 0xe6c00000 0 0x0064>;
835                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
836                         clocks = <&cpg CPG_MOD 209>;
837                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
838                         resets = <&cpg 209>;
839                         #address-cells = <1>;
840                         #size-cells = <0>;
841                         status = "disabled";
842                 };
843
844                 msiof3: spi@e6c10000 {
845                         compatible = "renesas,msiof-r8a77980",
846                                      "renesas,rcar-gen3-msiof";
847                         reg = <0 0xe6c10000 0 0x0064>;
848                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
849                         clocks = <&cpg CPG_MOD 208>;
850                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
851                         resets = <&cpg 208>;
852                         #address-cells = <1>;
853                         #size-cells = <0>;
854                         status = "disabled";
855                 };
856
857                 vin0: video@e6ef0000 {
858                         compatible = "renesas,vin-r8a77980";
859                         reg = <0 0xe6ef0000 0 0x1000>;
860                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
861                         clocks = <&cpg CPG_MOD 811>;
862                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
863                         resets = <&cpg 811>;
864                         renesas,id = <0>;
865                         status = "disabled";
866
867                         ports {
868                                 #address-cells = <1>;
869                                 #size-cells = <0>;
870
871                                 port@1 {
872                                         #address-cells = <1>;
873                                         #size-cells = <0>;
874
875                                         reg = <1>;
876
877                                         vin0csi40: endpoint@2 {
878                                                 reg = <2>;
879                                                 remote-endpoint = <&csi40vin0>;
880                                         };
881                                 };
882                         };
883                 };
884
885                 vin1: video@e6ef1000 {
886                         compatible = "renesas,vin-r8a77980";
887                         reg = <0 0xe6ef1000 0 0x1000>;
888                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
889                         clocks = <&cpg CPG_MOD 810>;
890                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
891                         status = "disabled";
892                         renesas,id = <1>;
893                         resets = <&cpg 810>;
894
895                         ports {
896                                 #address-cells = <1>;
897                                 #size-cells = <0>;
898
899                                 port@1 {
900                                         #address-cells = <1>;
901                                         #size-cells = <0>;
902
903                                         reg = <1>;
904
905                                         vin1csi40: endpoint@2 {
906                                                 reg = <2>;
907                                                 remote-endpoint = <&csi40vin1>;
908                                         };
909                                 };
910                         };
911                 };
912
913                 vin2: video@e6ef2000 {
914                         compatible = "renesas,vin-r8a77980";
915                         reg = <0 0xe6ef2000 0 0x1000>;
916                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
917                         clocks = <&cpg CPG_MOD 809>;
918                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
919                         resets = <&cpg 809>;
920                         renesas,id = <2>;
921                         status = "disabled";
922
923                         ports {
924                                 #address-cells = <1>;
925                                 #size-cells = <0>;
926
927                                 port@1 {
928                                         #address-cells = <1>;
929                                         #size-cells = <0>;
930
931                                         reg = <1>;
932
933                                         vin2csi40: endpoint@2 {
934                                                 reg = <2>;
935                                                 remote-endpoint = <&csi40vin2>;
936                                         };
937                                 };
938                         };
939                 };
940
941                 vin3: video@e6ef3000 {
942                         compatible = "renesas,vin-r8a77980";
943                         reg = <0 0xe6ef3000 0 0x1000>;
944                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
945                         clocks = <&cpg CPG_MOD 808>;
946                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
947                         resets = <&cpg 808>;
948                         renesas,id = <3>;
949                         status = "disabled";
950
951                         ports {
952                                 #address-cells = <1>;
953                                 #size-cells = <0>;
954
955                                 port@1 {
956                                         #address-cells = <1>;
957                                         #size-cells = <0>;
958
959                                         reg = <1>;
960
961                                         vin3csi40: endpoint@2 {
962                                                 reg = <2>;
963                                                 remote-endpoint = <&csi40vin3>;
964                                         };
965                                 };
966                         };
967                 };
968
969                 vin4: video@e6ef4000 {
970                         compatible = "renesas,vin-r8a77980";
971                         reg = <0 0xe6ef4000 0 0x1000>;
972                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
973                         clocks = <&cpg CPG_MOD 807>;
974                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
975                         resets = <&cpg 807>;
976                         renesas,id = <4>;
977                         status = "disabled";
978
979                         ports {
980                                 #address-cells = <1>;
981                                 #size-cells = <0>;
982
983                                 port@1 {
984                                         #address-cells = <1>;
985                                         #size-cells = <0>;
986
987                                         reg = <1>;
988
989                                         vin4csi41: endpoint@3 {
990                                                 reg = <3>;
991                                                 remote-endpoint = <&csi41vin4>;
992                                         };
993                                 };
994                         };
995                 };
996
997                 vin5: video@e6ef5000 {
998                         compatible = "renesas,vin-r8a77980";
999                         reg = <0 0xe6ef5000 0 0x1000>;
1000                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1001                         clocks = <&cpg CPG_MOD 806>;
1002                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1003                         resets = <&cpg 806>;
1004                         renesas,id = <5>;
1005                         status = "disabled";
1006
1007                         ports {
1008                                 #address-cells = <1>;
1009                                 #size-cells = <0>;
1010
1011                                 port@1 {
1012                                         #address-cells = <1>;
1013                                         #size-cells = <0>;
1014
1015                                         reg = <1>;
1016
1017                                         vin5csi41: endpoint@3 {
1018                                                 reg = <3>;
1019                                                 remote-endpoint = <&csi41vin5>;
1020                                         };
1021                                 };
1022                         };
1023                 };
1024
1025                 vin6: video@e6ef6000 {
1026                         compatible = "renesas,vin-r8a77980";
1027                         reg = <0 0xe6ef6000 0 0x1000>;
1028                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1029                         clocks = <&cpg CPG_MOD 805>;
1030                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1031                         resets = <&cpg 805>;
1032                         renesas,id = <6>;
1033                         status = "disabled";
1034
1035                         ports {
1036                                 #address-cells = <1>;
1037                                 #size-cells = <0>;
1038
1039                                 port@1 {
1040                                         #address-cells = <1>;
1041                                         #size-cells = <0>;
1042
1043                                         reg = <1>;
1044
1045                                         vin6csi41: endpoint@3 {
1046                                                 reg = <3>;
1047                                                 remote-endpoint = <&csi41vin6>;
1048                                         };
1049                                 };
1050                         };
1051                 };
1052
1053                 vin7: video@e6ef7000 {
1054                         compatible = "renesas,vin-r8a77980";
1055                         reg = <0 0xe6ef7000 0 0x1000>;
1056                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1057                         clocks = <&cpg CPG_MOD 804>;
1058                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1059                         resets = <&cpg 804>;
1060                         renesas,id = <7>;
1061                         status = "disabled";
1062
1063                         ports {
1064                                 #address-cells = <1>;
1065                                 #size-cells = <0>;
1066
1067                                 port@1 {
1068                                         #address-cells = <1>;
1069                                         #size-cells = <0>;
1070
1071                                         reg = <1>;
1072
1073                                         vin7csi41: endpoint@3 {
1074                                                 reg = <3>;
1075                                                 remote-endpoint = <&csi41vin7>;
1076                                         };
1077                                 };
1078                         };
1079                 };
1080
1081                 vin8: video@e6ef8000 {
1082                         compatible = "renesas,vin-r8a77980";
1083                         reg = <0 0xe6ef8000 0 0x1000>;
1084                         interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1085                         clocks = <&cpg CPG_MOD 628>;
1086                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1087                         resets = <&cpg 628>;
1088                         renesas,id = <8>;
1089                         status = "disabled";
1090                 };
1091
1092                 vin9: video@e6ef9000 {
1093                         compatible = "renesas,vin-r8a77980";
1094                         reg = <0 0xe6ef9000 0 0x1000>;
1095                         interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1096                         clocks = <&cpg CPG_MOD 627>;
1097                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1098                         resets = <&cpg 627>;
1099                         renesas,id = <9>;
1100                         status = "disabled";
1101                 };
1102
1103                 vin10: video@e6efa000 {
1104                         compatible = "renesas,vin-r8a77980";
1105                         reg = <0 0xe6efa000 0 0x1000>;
1106                         interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
1107                         clocks = <&cpg CPG_MOD 625>;
1108                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1109                         resets = <&cpg 625>;
1110                         renesas,id = <10>;
1111                         status = "disabled";
1112                 };
1113
1114                 vin11: video@e6efb000 {
1115                         compatible = "renesas,vin-r8a77980";
1116                         reg = <0 0xe6efb000 0 0x1000>;
1117                         interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>;
1118                         clocks = <&cpg CPG_MOD 618>;
1119                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1120                         resets = <&cpg 618>;
1121                         renesas,id = <11>;
1122                         status = "disabled";
1123                 };
1124
1125                 vin12: video@e6efc000 {
1126                         compatible = "renesas,vin-r8a77980";
1127                         reg = <0 0xe6efc000 0 0x1000>;
1128                         interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
1129                         clocks = <&cpg CPG_MOD 612>;
1130                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1131                         resets = <&cpg 612>;
1132                         renesas,id = <12>;
1133                         status = "disabled";
1134                 };
1135
1136                 vin13: video@e6efd000 {
1137                         compatible = "renesas,vin-r8a77980";
1138                         reg = <0 0xe6efd000 0 0x1000>;
1139                         interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
1140                         clocks = <&cpg CPG_MOD 608>;
1141                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1142                         resets = <&cpg 608>;
1143                         renesas,id = <13>;
1144                         status = "disabled";
1145                 };
1146
1147                 vin14: video@e6efe000 {
1148                         compatible = "renesas,vin-r8a77980";
1149                         reg = <0 0xe6efe000 0 0x1000>;
1150                         interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>;
1151                         clocks = <&cpg CPG_MOD 605>;
1152                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1153                         resets = <&cpg 605>;
1154                         renesas,id = <14>;
1155                         status = "disabled";
1156                 };
1157
1158                 vin15: video@e6eff000 {
1159                         compatible = "renesas,vin-r8a77980";
1160                         reg = <0 0xe6eff000 0 0x1000>;
1161                         interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
1162                         clocks = <&cpg CPG_MOD 604>;
1163                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1164                         resets = <&cpg 604>;
1165                         renesas,id = <15>;
1166                         status = "disabled";
1167                 };
1168
1169                 dmac1: dma-controller@e7300000 {
1170                         compatible = "renesas,dmac-r8a77980",
1171                                      "renesas,rcar-dmac";
1172                         reg = <0 0xe7300000 0 0x10000>;
1173                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
1174                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
1175                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1176                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1177                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1178                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1179                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1180                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1181                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1182                                      <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>,
1183                                      <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,
1184                                      <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,
1185                                      <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>,
1186                                      <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>,
1187                                      <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>,
1188                                      <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
1189                                      <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1190                         interrupt-names = "error",
1191                                           "ch0", "ch1", "ch2", "ch3",
1192                                           "ch4", "ch5", "ch6", "ch7",
1193                                           "ch8", "ch9", "ch10", "ch11",
1194                                           "ch12", "ch13", "ch14", "ch15";
1195                         clocks = <&cpg CPG_MOD 218>;
1196                         clock-names = "fck";
1197                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1198                         resets = <&cpg 218>;
1199                         #dma-cells = <1>;
1200                         dma-channels = <16>;
1201                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1202                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1203                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1204                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1205                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1206                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1207                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1208                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1209                 };
1210
1211                 dmac2: dma-controller@e7310000 {
1212                         compatible = "renesas,dmac-r8a77980",
1213                                      "renesas,rcar-dmac";
1214                         reg = <0 0xe7310000 0 0x10000>;
1215                         interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
1216                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1217                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1218                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1219                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1220                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1221                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1222                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1223                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>,
1224                                      <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>,
1225                                      <GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH>,
1226                                      <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH>,
1227                                      <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH>,
1228                                      <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>,
1229                                      <GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH>,
1230                                      <GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH>,
1231                                      <GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
1232                         interrupt-names = "error",
1233                                           "ch0", "ch1", "ch2", "ch3",
1234                                           "ch4", "ch5", "ch6", "ch7",
1235                                           "ch8", "ch9", "ch10", "ch11",
1236                                           "ch12", "ch13", "ch14", "ch15";
1237                         clocks = <&cpg CPG_MOD 217>;
1238                         clock-names = "fck";
1239                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1240                         resets = <&cpg 217>;
1241                         #dma-cells = <1>;
1242                         dma-channels = <16>;
1243                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1244                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1245                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1246                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1247                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1248                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1249                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1250                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1251                 };
1252
1253                 gether: ethernet@e7400000 {
1254                         compatible = "renesas,gether-r8a77980";
1255                         reg = <0 0xe7400000 0 0x1000>;
1256                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
1257                         clocks = <&cpg CPG_MOD 813>;
1258                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1259                         resets = <&cpg 813>;
1260                         #address-cells = <1>;
1261                         #size-cells = <0>;
1262                         status = "disabled";
1263                 };
1264
1265                 ipmmu_ds1: iommu@e7740000 {
1266                         compatible = "renesas,ipmmu-r8a77980";
1267                         reg = <0 0xe7740000 0 0x1000>;
1268                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1269                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1270                         #iommu-cells = <1>;
1271                 };
1272
1273                 ipmmu_ir: iommu@ff8b0000 {
1274                         compatible = "renesas,ipmmu-r8a77980";
1275                         reg = <0 0xff8b0000 0 0x1000>;
1276                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1277                         power-domains = <&sysc R8A77980_PD_A3IR>;
1278                         #iommu-cells = <1>;
1279                 };
1280
1281                 ipmmu_mm: iommu@e67b0000 {
1282                         compatible = "renesas,ipmmu-r8a77980";
1283                         reg = <0 0xe67b0000 0 0x1000>;
1284                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1285                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1286                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1287                         #iommu-cells = <1>;
1288                 };
1289
1290                 ipmmu_rt: iommu@ffc80000 {
1291                         compatible = "renesas,ipmmu-r8a77980";
1292                         reg = <0 0xffc80000 0 0x1000>;
1293                         renesas,ipmmu-main = <&ipmmu_mm 10>;
1294                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1295                         #iommu-cells = <1>;
1296                 };
1297
1298                 ipmmu_vc0: iommu@fe990000 {
1299                         compatible = "renesas,ipmmu-r8a77980";
1300                         reg = <0 0xfe990000 0 0x1000>;
1301                         renesas,ipmmu-main = <&ipmmu_mm 12>;
1302                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1303                         #iommu-cells = <1>;
1304                 };
1305
1306                 ipmmu_vi0: iommu@febd0000 {
1307                         compatible = "renesas,ipmmu-r8a77980";
1308                         reg = <0 0xfebd0000 0 0x1000>;
1309                         renesas,ipmmu-main = <&ipmmu_mm 14>;
1310                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1311                         #iommu-cells = <1>;
1312                 };
1313
1314                 ipmmu_vip0: iommu@e7b00000 {
1315                         compatible = "renesas,ipmmu-r8a77980";
1316                         reg = <0 0xe7b00000 0 0x1000>;
1317                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1318                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1319                         #iommu-cells = <1>;
1320                 };
1321
1322                 ipmmu_vip1: iommu@e7960000 {
1323                         compatible = "renesas,ipmmu-r8a77980";
1324                         reg = <0 0xe7960000 0 0x1000>;
1325                         renesas,ipmmu-main = <&ipmmu_mm 11>;
1326                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1327                         #iommu-cells = <1>;
1328                 };
1329
1330                 mmc0: mmc@ee140000 {
1331                         compatible = "renesas,sdhi-r8a77980",
1332                                      "renesas,rcar-gen3-sdhi";
1333                         reg = <0 0xee140000 0 0x2000>;
1334                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1335                         clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77980_CLK_SD0H>;
1336                         clock-names = "core", "clkh";
1337                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1338                         resets = <&cpg 314>;
1339                         max-frequency = <200000000>;
1340                         iommus = <&ipmmu_ds1 32>;
1341                         status = "disabled";
1342                 };
1343
1344                 rpc: spi@ee200000 {
1345                         compatible = "renesas,r8a77980-rpc-if",
1346                                      "renesas,rcar-gen3-rpc-if";
1347                         reg = <0 0xee200000 0 0x200>,
1348                               <0 0x08000000 0 0x4000000>,
1349                               <0 0xee208000 0 0x100>;
1350                         reg-names = "regs", "dirmap", "wbuf";
1351                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1352                         clocks = <&cpg CPG_MOD 917>;
1353                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1354                         resets = <&cpg 917>;
1355                         #address-cells = <1>;
1356                         #size-cells = <0>;
1357                         status = "disabled";
1358                 };
1359
1360                 gic: interrupt-controller@f1010000 {
1361                         compatible = "arm,gic-400";
1362                         #interrupt-cells = <3>;
1363                         #address-cells = <0>;
1364                         interrupt-controller;
1365                         reg = <0x0 0xf1010000 0 0x1000>,
1366                               <0x0 0xf1020000 0 0x20000>,
1367                               <0x0 0xf1040000 0 0x20000>,
1368                               <0x0 0xf1060000 0 0x20000>;
1369                         interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
1370                                       IRQ_TYPE_LEVEL_HIGH)>;
1371                         clocks = <&cpg CPG_MOD 408>;
1372                         clock-names = "clk";
1373                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1374                         resets = <&cpg 408>;
1375                 };
1376
1377                 pciec: pcie@fe000000 {
1378                         compatible = "renesas,pcie-r8a77980",
1379                                      "renesas,pcie-rcar-gen3";
1380                         reg = <0 0xfe000000 0 0x80000>;
1381                         #address-cells = <3>;
1382                         #size-cells = <2>;
1383                         bus-range = <0x00 0xff>;
1384                         device_type = "pci";
1385                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000>,
1386                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000>,
1387                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x8000000>,
1388                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x8000000>;
1389                         /* Map all possible DDR/IOMMU as inbound ranges */
1390                         dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1391                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1392                                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1393                                      <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1394                         #interrupt-cells = <1>;
1395                         interrupt-map-mask = <0 0 0 0>;
1396                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1397                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1398                         clock-names = "pcie", "pcie_bus";
1399                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1400                         resets = <&cpg 319>;
1401                         phys = <&pcie_phy>;
1402                         phy-names = "pcie";
1403                         iommu-map = <0 &ipmmu_vi0 5 1>;
1404                         iommu-map-mask = <0>;
1405                         status = "disabled";
1406                 };
1407
1408                 vspd0: vsp@fea20000 {
1409                         compatible = "renesas,vsp2";
1410                         reg = <0 0xfea20000 0 0x5000>;
1411                         interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1412                         clocks = <&cpg CPG_MOD 623>;
1413                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1414                         resets = <&cpg 623>;
1415                         renesas,fcp = <&fcpvd0>;
1416                 };
1417
1418                 fcpvd0: fcp@fea27000 {
1419                         compatible = "renesas,fcpv";
1420                         reg = <0 0xfea27000 0 0x200>;
1421                         clocks = <&cpg CPG_MOD 603>;
1422                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1423                         resets = <&cpg 603>;
1424                 };
1425
1426                 csi40: csi2@feaa0000 {
1427                         compatible = "renesas,r8a77980-csi2";
1428                         reg = <0 0xfeaa0000 0 0x10000>;
1429                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1430                         clocks = <&cpg CPG_MOD 716>;
1431                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1432                         resets = <&cpg 716>;
1433                         status = "disabled";
1434
1435                         ports {
1436                                 #address-cells = <1>;
1437                                 #size-cells = <0>;
1438
1439                                 port@0 {
1440                                         reg = <0>;
1441                                 };
1442
1443                                 port@1 {
1444                                         #address-cells = <1>;
1445                                         #size-cells = <0>;
1446
1447                                         reg = <1>;
1448
1449                                         csi40vin0: endpoint@0 {
1450                                                 reg = <0>;
1451                                                 remote-endpoint = <&vin0csi40>;
1452                                         };
1453                                         csi40vin1: endpoint@1 {
1454                                                 reg = <1>;
1455                                                 remote-endpoint = <&vin1csi40>;
1456                                         };
1457                                         csi40vin2: endpoint@2 {
1458                                                 reg = <2>;
1459                                                 remote-endpoint = <&vin2csi40>;
1460                                         };
1461                                         csi40vin3: endpoint@3 {
1462                                                 reg = <3>;
1463                                                 remote-endpoint = <&vin3csi40>;
1464                                         };
1465                                 };
1466                         };
1467                 };
1468
1469                 csi41: csi2@feab0000 {
1470                         compatible = "renesas,r8a77980-csi2";
1471                         reg = <0 0xfeab0000 0 0x10000>;
1472                         interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
1473                         clocks = <&cpg CPG_MOD 715>;
1474                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1475                         resets = <&cpg 715>;
1476                         status = "disabled";
1477
1478                         ports {
1479                                 #address-cells = <1>;
1480                                 #size-cells = <0>;
1481
1482                                 port@0 {
1483                                         reg = <0>;
1484                                 };
1485
1486                                 port@1 {
1487                                         #address-cells = <1>;
1488                                         #size-cells = <0>;
1489
1490                                         reg = <1>;
1491
1492                                         csi41vin4: endpoint@0 {
1493                                                 reg = <0>;
1494                                                 remote-endpoint = <&vin4csi41>;
1495                                         };
1496                                         csi41vin5: endpoint@1 {
1497                                                 reg = <1>;
1498                                                 remote-endpoint = <&vin5csi41>;
1499                                         };
1500                                         csi41vin6: endpoint@2 {
1501                                                 reg = <2>;
1502                                                 remote-endpoint = <&vin6csi41>;
1503                                         };
1504                                         csi41vin7: endpoint@3 {
1505                                                 reg = <3>;
1506                                                 remote-endpoint = <&vin7csi41>;
1507                                         };
1508                                 };
1509                         };
1510                 };
1511
1512                 du: display@feb00000 {
1513                         compatible = "renesas,du-r8a77980";
1514                         reg = <0 0xfeb00000 0 0x80000>;
1515                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1516                         clocks = <&cpg CPG_MOD 724>;
1517                         clock-names = "du.0";
1518                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1519                         resets = <&cpg 724>;
1520                         reset-names = "du.0";
1521                         renesas,vsps = <&vspd0 0>;
1522
1523                         status = "disabled";
1524
1525                         ports {
1526                                 #address-cells = <1>;
1527                                 #size-cells = <0>;
1528
1529                                 port@0 {
1530                                         reg = <0>;
1531                                 };
1532
1533                                 port@1 {
1534                                         reg = <1>;
1535                                         du_out_lvds0: endpoint {
1536                                                 remote-endpoint = <&lvds0_in>;
1537                                         };
1538                                 };
1539                         };
1540                 };
1541
1542                 lvds0: lvds-encoder@feb90000 {
1543                         compatible = "renesas,r8a77980-lvds";
1544                         reg = <0 0xfeb90000 0 0x14>;
1545                         clocks = <&cpg CPG_MOD 727>;
1546                         power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
1547                         resets = <&cpg 727>;
1548                         status = "disabled";
1549
1550                         ports {
1551                                 #address-cells = <1>;
1552                                 #size-cells = <0>;
1553
1554                                 port@0 {
1555                                         reg = <0>;
1556                                         lvds0_in: endpoint {
1557                                                 remote-endpoint =
1558                                                         <&du_out_lvds0>;
1559                                         };
1560                                 };
1561
1562                                 port@1 {
1563                                         reg = <1>;
1564                                 };
1565                         };
1566                 };
1567
1568                 prr: chipid@fff00044 {
1569                         compatible = "renesas,prr";
1570                         reg = <0 0xfff00044 0 4>;
1571                 };
1572         };
1573
1574         thermal-zones {
1575                 sensor1_thermal: sensor1-thermal {
1576                         polling-delay-passive = <250>;
1577                         polling-delay = <1000>;
1578                         thermal-sensors = <&tsc 0>;
1579
1580                         trips {
1581                                 sensor1-passive {
1582                                         temperature = <95000>;
1583                                         hysteresis = <1000>;
1584                                         type = "passive";
1585                                 };
1586                                 sensor1-critical {
1587                                         temperature = <120000>;
1588                                         hysteresis = <1000>;
1589                                         type = "critical";
1590                                 };
1591                         };
1592                 };
1593
1594                 sensor2_thermal: sensor2-thermal {
1595                         polling-delay-passive = <250>;
1596                         polling-delay = <1000>;
1597                         thermal-sensors = <&tsc 1>;
1598
1599                         trips {
1600                                 sensor2-passive {
1601                                         temperature = <95000>;
1602                                         hysteresis = <1000>;
1603                                         type = "passive";
1604                                 };
1605                                 sensor2-critical {
1606                                         temperature = <120000>;
1607                                         hysteresis = <1000>;
1608                                         type = "critical";
1609                                 };
1610                         };
1611                 };
1612         };
1613
1614         timer {
1615                 compatible = "arm,armv8-timer";
1616                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
1617                                        IRQ_TYPE_LEVEL_LOW)>,
1618                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
1619                                        IRQ_TYPE_LEVEL_LOW)>,
1620                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
1621                                        IRQ_TYPE_LEVEL_LOW)>,
1622                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
1623                                        IRQ_TYPE_LEVEL_LOW)>;
1624         };
1625 };