1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3M (R8A77970) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
9 #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/power/r8a77970-sysc.h>
15 compatible = "renesas,r8a77970";
19 /* External CAN clock - to be overridden by boards that provide it */
21 compatible = "fixed-clock";
23 clock-frequency = <0>;
32 compatible = "arm,cortex-a53";
34 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
35 power-domains = <&sysc R8A77970_PD_CA53_CPU0>;
36 next-level-cache = <&L2_CA53>;
37 enable-method = "psci";
42 compatible = "arm,cortex-a53";
44 clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
45 power-domains = <&sysc R8A77970_PD_CA53_CPU1>;
46 next-level-cache = <&L2_CA53>;
47 enable-method = "psci";
50 L2_CA53: cache-controller {
52 power-domains = <&sysc R8A77970_PD_CA53_SCU>;
59 compatible = "fixed-clock";
61 /* This value must be overridden by the board */
62 clock-frequency = <0>;
66 compatible = "fixed-clock";
68 /* This value must be overridden by the board */
69 clock-frequency = <0>;
73 compatible = "arm,cortex-a53-pmu";
74 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
75 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
76 interrupt-affinity = <&a53_0>, <&a53_1>;
80 compatible = "arm,psci-1.0", "arm,psci-0.2";
84 /* External SCIF clock - to be overridden by boards that provide it */
86 compatible = "fixed-clock";
88 clock-frequency = <0>;
92 compatible = "simple-bus";
93 interrupt-parent = <&gic>;
99 rwdt: watchdog@e6020000 {
100 compatible = "renesas,r8a77970-wdt",
101 "renesas,rcar-gen3-wdt";
102 reg = <0 0xe6020000 0 0x0c>;
103 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
104 clocks = <&cpg CPG_MOD 402>;
105 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
110 gpio0: gpio@e6050000 {
111 compatible = "renesas,gpio-r8a77970",
112 "renesas,rcar-gen3-gpio";
113 reg = <0 0xe6050000 0 0x50>;
114 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
117 gpio-ranges = <&pfc 0 0 22>;
118 #interrupt-cells = <2>;
119 interrupt-controller;
120 clocks = <&cpg CPG_MOD 912>;
121 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
125 gpio1: gpio@e6051000 {
126 compatible = "renesas,gpio-r8a77970",
127 "renesas,rcar-gen3-gpio";
128 reg = <0 0xe6051000 0 0x50>;
129 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
132 gpio-ranges = <&pfc 0 32 28>;
133 #interrupt-cells = <2>;
134 interrupt-controller;
135 clocks = <&cpg CPG_MOD 911>;
136 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
140 gpio2: gpio@e6052000 {
141 compatible = "renesas,gpio-r8a77970",
142 "renesas,rcar-gen3-gpio";
143 reg = <0 0xe6052000 0 0x50>;
144 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
147 gpio-ranges = <&pfc 0 64 17>;
148 #interrupt-cells = <2>;
149 interrupt-controller;
150 clocks = <&cpg CPG_MOD 910>;
151 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
155 gpio3: gpio@e6053000 {
156 compatible = "renesas,gpio-r8a77970",
157 "renesas,rcar-gen3-gpio";
158 reg = <0 0xe6053000 0 0x50>;
159 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
162 gpio-ranges = <&pfc 0 96 17>;
163 #interrupt-cells = <2>;
164 interrupt-controller;
165 clocks = <&cpg CPG_MOD 909>;
166 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
170 gpio4: gpio@e6054000 {
171 compatible = "renesas,gpio-r8a77970",
172 "renesas,rcar-gen3-gpio";
173 reg = <0 0xe6054000 0 0x50>;
174 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
177 gpio-ranges = <&pfc 0 128 6>;
178 #interrupt-cells = <2>;
179 interrupt-controller;
180 clocks = <&cpg CPG_MOD 908>;
181 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
185 gpio5: gpio@e6055000 {
186 compatible = "renesas,gpio-r8a77970",
187 "renesas,rcar-gen3-gpio";
188 reg = <0 0xe6055000 0 0x50>;
189 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
192 gpio-ranges = <&pfc 0 160 15>;
193 #interrupt-cells = <2>;
194 interrupt-controller;
195 clocks = <&cpg CPG_MOD 907>;
196 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
200 pfc: pinctrl@e6060000 {
201 compatible = "renesas,pfc-r8a77970";
202 reg = <0 0xe6060000 0 0x504>;
205 cmt0: timer@e60f0000 {
206 compatible = "renesas,r8a77970-cmt0",
207 "renesas,rcar-gen3-cmt0";
208 reg = <0 0xe60f0000 0 0x1004>;
209 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
210 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
211 clocks = <&cpg CPG_MOD 303>;
213 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
218 cmt1: timer@e6130000 {
219 compatible = "renesas,r8a77970-cmt1",
220 "renesas,rcar-gen3-cmt1";
221 reg = <0 0xe6130000 0 0x1004>;
222 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
223 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
225 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
226 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
227 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
228 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
229 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
230 clocks = <&cpg CPG_MOD 302>;
232 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
237 cmt2: timer@e6140000 {
238 compatible = "renesas,r8a77970-cmt1",
239 "renesas,rcar-gen3-cmt1";
240 reg = <0 0xe6140000 0 0x1004>;
241 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
242 <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
243 <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
244 <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
245 <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
246 <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
247 <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
248 <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
249 clocks = <&cpg CPG_MOD 301>;
251 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
256 cmt3: timer@e6148000 {
257 compatible = "renesas,r8a77970-cmt1",
258 "renesas,rcar-gen3-cmt1";
259 reg = <0 0xe6148000 0 0x1004>;
260 interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
261 <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
262 <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
263 <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
264 <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
265 <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
266 <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
267 <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
268 clocks = <&cpg CPG_MOD 300>;
270 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
275 cpg: clock-controller@e6150000 {
276 compatible = "renesas,r8a77970-cpg-mssr";
277 reg = <0 0xe6150000 0 0x1000>;
278 clocks = <&extal_clk>, <&extalr_clk>;
279 clock-names = "extal", "extalr";
281 #power-domain-cells = <0>;
285 rst: reset-controller@e6160000 {
286 compatible = "renesas,r8a77970-rst";
287 reg = <0 0xe6160000 0 0x200>;
290 sysc: system-controller@e6180000 {
291 compatible = "renesas,r8a77970-sysc";
292 reg = <0 0xe6180000 0 0x440>;
293 #power-domain-cells = <1>;
296 thermal: thermal@e6190000 {
297 compatible = "renesas,thermal-r8a77970";
298 reg = <0 0xe6190000 0 0x10>,
299 <0 0xe6190100 0 0x120>;
300 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
301 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
302 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
303 clocks = <&cpg CPG_MOD 522>;
304 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
306 #thermal-sensor-cells = <0>;
309 intc_ex: interrupt-controller@e61c0000 {
310 compatible = "renesas,intc-ex-r8a77970", "renesas,irqc";
311 #interrupt-cells = <2>;
312 interrupt-controller;
313 reg = <0 0xe61c0000 0 0x200>;
314 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
315 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
316 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
317 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
318 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
319 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
320 clocks = <&cpg CPG_MOD 407>;
321 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
325 tmu0: timer@e61e0000 {
326 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
327 reg = <0 0xe61e0000 0 0x30>;
328 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
329 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
331 clocks = <&cpg CPG_MOD 125>;
333 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
338 tmu1: timer@e6fc0000 {
339 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
340 reg = <0 0xe6fc0000 0 0x30>;
341 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
342 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
343 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
344 clocks = <&cpg CPG_MOD 124>;
346 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
351 tmu2: timer@e6fd0000 {
352 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
353 reg = <0 0xe6fd0000 0 0x30>;
354 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
356 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
357 clocks = <&cpg CPG_MOD 123>;
359 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
364 tmu3: timer@e6fe0000 {
365 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
366 reg = <0 0xe6fe0000 0 0x30>;
367 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
368 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
369 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
370 clocks = <&cpg CPG_MOD 122>;
372 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
377 tmu4: timer@ffc00000 {
378 compatible = "renesas,tmu-r8a77970", "renesas,tmu";
379 reg = <0 0xffc00000 0 0x30>;
380 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
381 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
382 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
383 clocks = <&cpg CPG_MOD 121>;
385 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
391 compatible = "renesas,i2c-r8a77970",
392 "renesas,rcar-gen3-i2c";
393 reg = <0 0xe6500000 0 0x40>;
394 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
395 clocks = <&cpg CPG_MOD 931>;
396 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
398 dmas = <&dmac1 0x91>, <&dmac1 0x90>,
399 <&dmac2 0x91>, <&dmac2 0x90>;
400 dma-names = "tx", "rx", "tx", "rx";
401 i2c-scl-internal-delay-ns = <6>;
402 #address-cells = <1>;
408 compatible = "renesas,i2c-r8a77970",
409 "renesas,rcar-gen3-i2c";
410 reg = <0 0xe6508000 0 0x40>;
411 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
412 clocks = <&cpg CPG_MOD 930>;
413 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
415 dmas = <&dmac1 0x93>, <&dmac1 0x92>,
416 <&dmac2 0x93>, <&dmac2 0x92>;
417 dma-names = "tx", "rx", "tx", "rx";
418 i2c-scl-internal-delay-ns = <6>;
419 #address-cells = <1>;
425 compatible = "renesas,i2c-r8a77970",
426 "renesas,rcar-gen3-i2c";
427 reg = <0 0xe6510000 0 0x40>;
428 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
429 clocks = <&cpg CPG_MOD 929>;
430 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
432 dmas = <&dmac1 0x95>, <&dmac1 0x94>,
433 <&dmac2 0x95>, <&dmac2 0x94>;
434 dma-names = "tx", "rx", "tx", "rx";
435 i2c-scl-internal-delay-ns = <6>;
436 #address-cells = <1>;
442 compatible = "renesas,i2c-r8a77970",
443 "renesas,rcar-gen3-i2c";
444 reg = <0 0xe66d0000 0 0x40>;
445 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
446 clocks = <&cpg CPG_MOD 928>;
447 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
449 dmas = <&dmac1 0x97>, <&dmac1 0x96>,
450 <&dmac2 0x97>, <&dmac2 0x96>;
451 dma-names = "tx", "rx", "tx", "rx";
452 i2c-scl-internal-delay-ns = <6>;
453 #address-cells = <1>;
459 compatible = "renesas,i2c-r8a77970",
460 "renesas,rcar-gen3-i2c";
461 reg = <0 0xe66d8000 0 0x40>;
462 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
463 clocks = <&cpg CPG_MOD 927>;
464 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
466 dmas = <&dmac1 0x99>, <&dmac1 0x98>,
467 <&dmac2 0x99>, <&dmac2 0x98>;
468 dma-names = "tx", "rx", "tx", "rx";
469 i2c-scl-internal-delay-ns = <6>;
470 #address-cells = <1>;
475 hscif0: serial@e6540000 {
476 compatible = "renesas,hscif-r8a77970",
477 "renesas,rcar-gen3-hscif",
479 reg = <0 0xe6540000 0 96>;
480 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
481 clocks = <&cpg CPG_MOD 520>,
482 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
484 clock-names = "fck", "brg_int", "scif_clk";
485 dmas = <&dmac1 0x31>, <&dmac1 0x30>,
486 <&dmac2 0x31>, <&dmac2 0x30>;
487 dma-names = "tx", "rx", "tx", "rx";
488 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
493 hscif1: serial@e6550000 {
494 compatible = "renesas,hscif-r8a77970",
495 "renesas,rcar-gen3-hscif",
497 reg = <0 0xe6550000 0 96>;
498 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
499 clocks = <&cpg CPG_MOD 519>,
500 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
502 clock-names = "fck", "brg_int", "scif_clk";
503 dmas = <&dmac1 0x33>, <&dmac1 0x32>,
504 <&dmac2 0x33>, <&dmac2 0x32>;
505 dma-names = "tx", "rx", "tx", "rx";
506 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
511 hscif2: serial@e6560000 {
512 compatible = "renesas,hscif-r8a77970",
513 "renesas,rcar-gen3-hscif",
515 reg = <0 0xe6560000 0 96>;
516 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
517 clocks = <&cpg CPG_MOD 518>,
518 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
520 clock-names = "fck", "brg_int", "scif_clk";
521 dmas = <&dmac1 0x35>, <&dmac1 0x34>,
522 <&dmac2 0x35>, <&dmac2 0x34>;
523 dma-names = "tx", "rx", "tx", "rx";
524 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
529 hscif3: serial@e66a0000 {
530 compatible = "renesas,hscif-r8a77970",
531 "renesas,rcar-gen3-hscif", "renesas,hscif";
532 reg = <0 0xe66a0000 0 96>;
533 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
534 clocks = <&cpg CPG_MOD 517>,
535 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
537 clock-names = "fck", "brg_int", "scif_clk";
538 dmas = <&dmac1 0x37>, <&dmac1 0x36>,
539 <&dmac2 0x37>, <&dmac2 0x36>;
540 dma-names = "tx", "rx", "tx", "rx";
541 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
546 canfd: can@e66c0000 {
547 compatible = "renesas,r8a77970-canfd",
548 "renesas,rcar-gen3-canfd";
549 reg = <0 0xe66c0000 0 0x8000>;
550 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
551 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
552 interrupt-names = "ch_int", "g_int";
553 clocks = <&cpg CPG_MOD 914>,
554 <&cpg CPG_CORE R8A77970_CLK_CANFD>,
556 clock-names = "fck", "canfd", "can_clk";
557 assigned-clocks = <&cpg CPG_CORE R8A77970_CLK_CANFD>;
558 assigned-clock-rates = <40000000>;
559 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
572 avb: ethernet@e6800000 {
573 compatible = "renesas,etheravb-r8a77970",
574 "renesas,etheravb-rcar-gen3";
575 reg = <0 0xe6800000 0 0x800>;
576 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
577 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
578 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
579 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
580 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
581 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
582 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
583 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
584 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
585 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
586 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
587 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
588 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
589 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
590 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
591 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
592 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
593 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
594 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
595 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
596 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
597 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
598 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
599 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
600 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
601 interrupt-names = "ch0", "ch1", "ch2", "ch3",
602 "ch4", "ch5", "ch6", "ch7",
603 "ch8", "ch9", "ch10", "ch11",
604 "ch12", "ch13", "ch14", "ch15",
605 "ch16", "ch17", "ch18", "ch19",
606 "ch20", "ch21", "ch22", "ch23",
608 clocks = <&cpg CPG_MOD 812>;
610 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
613 rx-internal-delay-ps = <0>;
614 tx-internal-delay-ps = <0>;
615 iommus = <&ipmmu_rt 3>;
616 #address-cells = <1>;
622 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
623 reg = <0 0xe6e30000 0 8>;
625 clocks = <&cpg CPG_MOD 523>;
626 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
632 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
633 reg = <0 0xe6e31000 0 8>;
635 clocks = <&cpg CPG_MOD 523>;
636 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
642 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
643 reg = <0 0xe6e32000 0 8>;
645 clocks = <&cpg CPG_MOD 523>;
646 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
652 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
653 reg = <0 0xe6e33000 0 8>;
655 clocks = <&cpg CPG_MOD 523>;
656 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
662 compatible = "renesas,pwm-r8a77970", "renesas,pwm-rcar";
663 reg = <0 0xe6e34000 0 8>;
665 clocks = <&cpg CPG_MOD 523>;
666 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
671 scif0: serial@e6e60000 {
672 compatible = "renesas,scif-r8a77970",
673 "renesas,rcar-gen3-scif",
675 reg = <0 0xe6e60000 0 64>;
676 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
677 clocks = <&cpg CPG_MOD 207>,
678 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
680 clock-names = "fck", "brg_int", "scif_clk";
681 dmas = <&dmac1 0x51>, <&dmac1 0x50>,
682 <&dmac2 0x51>, <&dmac2 0x50>;
683 dma-names = "tx", "rx", "tx", "rx";
684 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
689 scif1: serial@e6e68000 {
690 compatible = "renesas,scif-r8a77970",
691 "renesas,rcar-gen3-scif",
693 reg = <0 0xe6e68000 0 64>;
694 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
695 clocks = <&cpg CPG_MOD 206>,
696 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
698 clock-names = "fck", "brg_int", "scif_clk";
699 dmas = <&dmac1 0x53>, <&dmac1 0x52>,
700 <&dmac2 0x53>, <&dmac2 0x52>;
701 dma-names = "tx", "rx", "tx", "rx";
702 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
707 scif3: serial@e6c50000 {
708 compatible = "renesas,scif-r8a77970",
709 "renesas,rcar-gen3-scif",
711 reg = <0 0xe6c50000 0 64>;
712 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
713 clocks = <&cpg CPG_MOD 204>,
714 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
716 clock-names = "fck", "brg_int", "scif_clk";
717 dmas = <&dmac1 0x57>, <&dmac1 0x56>,
718 <&dmac2 0x57>, <&dmac2 0x56>;
719 dma-names = "tx", "rx", "tx", "rx";
720 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
725 scif4: serial@e6c40000 {
726 compatible = "renesas,scif-r8a77970",
727 "renesas,rcar-gen3-scif", "renesas,scif";
728 reg = <0 0xe6c40000 0 64>;
729 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
730 clocks = <&cpg CPG_MOD 203>,
731 <&cpg CPG_CORE R8A77970_CLK_S2D1>,
733 clock-names = "fck", "brg_int", "scif_clk";
734 dmas = <&dmac1 0x59>, <&dmac1 0x58>,
735 <&dmac2 0x59>, <&dmac2 0x58>;
736 dma-names = "tx", "rx", "tx", "rx";
737 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
743 compatible = "renesas,tpu-r8a77970", "renesas,tpu";
744 reg = <0 0xe6e80000 0 0x148>;
745 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
746 clocks = <&cpg CPG_MOD 304>;
747 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
753 msiof0: spi@e6e90000 {
754 compatible = "renesas,msiof-r8a77970",
755 "renesas,rcar-gen3-msiof";
756 reg = <0 0xe6e90000 0 0x64>;
757 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
758 clocks = <&cpg CPG_MOD 211>;
759 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
761 dmas = <&dmac1 0x41>, <&dmac1 0x40>,
762 <&dmac2 0x41>, <&dmac2 0x40>;
763 dma-names = "tx", "rx", "tx", "rx";
764 #address-cells = <1>;
769 msiof1: spi@e6ea0000 {
770 compatible = "renesas,msiof-r8a77970",
771 "renesas,rcar-gen3-msiof";
772 reg = <0 0xe6ea0000 0 0x0064>;
773 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
774 clocks = <&cpg CPG_MOD 210>;
775 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
777 dmas = <&dmac1 0x43>, <&dmac1 0x42>,
778 <&dmac2 0x43>, <&dmac2 0x42>;
779 dma-names = "tx", "rx", "tx", "rx";
780 #address-cells = <1>;
785 msiof2: spi@e6c00000 {
786 compatible = "renesas,msiof-r8a77970",
787 "renesas,rcar-gen3-msiof";
788 reg = <0 0xe6c00000 0 0x0064>;
789 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
790 clocks = <&cpg CPG_MOD 209>;
791 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
793 dmas = <&dmac1 0x45>, <&dmac1 0x44>,
794 <&dmac2 0x45>, <&dmac2 0x44>;
795 dma-names = "tx", "rx", "tx", "rx";
796 #address-cells = <1>;
801 msiof3: spi@e6c10000 {
802 compatible = "renesas,msiof-r8a77970",
803 "renesas,rcar-gen3-msiof";
804 reg = <0 0xe6c10000 0 0x0064>;
805 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
806 clocks = <&cpg CPG_MOD 208>;
807 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
809 dmas = <&dmac1 0x47>, <&dmac1 0x46>,
810 <&dmac2 0x47>, <&dmac2 0x46>;
811 dma-names = "tx", "rx", "tx", "rx";
812 #address-cells = <1>;
817 vin0: video@e6ef0000 {
818 compatible = "renesas,vin-r8a77970";
819 reg = <0 0xe6ef0000 0 0x1000>;
820 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
821 clocks = <&cpg CPG_MOD 811>;
822 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
828 #address-cells = <1>;
832 #address-cells = <1>;
837 vin0csi40: endpoint@2 {
839 remote-endpoint = <&csi40vin0>;
845 vin1: video@e6ef1000 {
846 compatible = "renesas,vin-r8a77970";
847 reg = <0 0xe6ef1000 0 0x1000>;
848 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
849 clocks = <&cpg CPG_MOD 810>;
850 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
856 #address-cells = <1>;
860 #address-cells = <1>;
865 vin1csi40: endpoint@2 {
867 remote-endpoint = <&csi40vin1>;
873 vin2: video@e6ef2000 {
874 compatible = "renesas,vin-r8a77970";
875 reg = <0 0xe6ef2000 0 0x1000>;
876 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
877 clocks = <&cpg CPG_MOD 809>;
878 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
884 #address-cells = <1>;
888 #address-cells = <1>;
893 vin2csi40: endpoint@2 {
895 remote-endpoint = <&csi40vin2>;
901 vin3: video@e6ef3000 {
902 compatible = "renesas,vin-r8a77970";
903 reg = <0 0xe6ef3000 0 0x1000>;
904 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
905 clocks = <&cpg CPG_MOD 808>;
906 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
912 #address-cells = <1>;
916 #address-cells = <1>;
921 vin3csi40: endpoint@2 {
923 remote-endpoint = <&csi40vin3>;
929 dmac1: dma-controller@e7300000 {
930 compatible = "renesas,dmac-r8a77970",
932 reg = <0 0xe7300000 0 0x10000>;
933 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
934 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
935 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
936 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
937 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
938 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
939 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
940 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
941 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
942 interrupt-names = "error",
943 "ch0", "ch1", "ch2", "ch3",
944 "ch4", "ch5", "ch6", "ch7";
945 clocks = <&cpg CPG_MOD 218>;
947 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
951 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
952 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
953 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
954 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>;
957 dmac2: dma-controller@e7310000 {
958 compatible = "renesas,dmac-r8a77970",
960 reg = <0 0xe7310000 0 0x10000>;
961 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
962 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
963 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
964 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
965 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
966 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
967 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
968 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
969 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
970 interrupt-names = "error",
971 "ch0", "ch1", "ch2", "ch3",
972 "ch4", "ch5", "ch6", "ch7";
973 clocks = <&cpg CPG_MOD 217>;
975 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
979 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
980 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
981 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
982 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>;
985 ipmmu_ds1: iommu@e7740000 {
986 compatible = "renesas,ipmmu-r8a77970";
987 reg = <0 0xe7740000 0 0x1000>;
988 renesas,ipmmu-main = <&ipmmu_mm 0>;
989 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
993 ipmmu_ir: iommu@ff8b0000 {
994 compatible = "renesas,ipmmu-r8a77970";
995 reg = <0 0xff8b0000 0 0x1000>;
996 renesas,ipmmu-main = <&ipmmu_mm 3>;
997 power-domains = <&sysc R8A77970_PD_A3IR>;
1001 ipmmu_mm: iommu@e67b0000 {
1002 compatible = "renesas,ipmmu-r8a77970";
1003 reg = <0 0xe67b0000 0 0x1000>;
1004 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1005 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1006 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1010 ipmmu_rt: iommu@ffc80000 {
1011 compatible = "renesas,ipmmu-r8a77970";
1012 reg = <0 0xffc80000 0 0x1000>;
1013 renesas,ipmmu-main = <&ipmmu_mm 7>;
1014 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1018 ipmmu_vi0: iommu@febd0000 {
1019 compatible = "renesas,ipmmu-r8a77970";
1020 reg = <0 0xfebd0000 0 0x1000>;
1021 renesas,ipmmu-main = <&ipmmu_mm 9>;
1022 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1026 mmc0: mmc@ee140000 {
1027 compatible = "renesas,sdhi-r8a77970",
1028 "renesas,rcar-gen3-sdhi";
1029 reg = <0 0xee140000 0 0x2000>;
1030 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1031 clocks = <&cpg CPG_MOD 314>;
1032 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1033 resets = <&cpg 314>;
1034 max-frequency = <200000000>;
1035 iommus = <&ipmmu_ds1 32>;
1036 status = "disabled";
1040 compatible = "renesas,r8a77970-rpc-if",
1041 "renesas,rcar-gen3-rpc-if";
1042 reg = <0 0xee200000 0 0x200>,
1043 <0 0x08000000 0 0x4000000>,
1044 <0 0xee208000 0 0x100>;
1045 reg-names = "regs", "dirmap", "wbuf";
1046 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1047 clocks = <&cpg CPG_MOD 917>;
1048 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1049 resets = <&cpg 917>;
1050 #address-cells = <1>;
1052 status = "disabled";
1055 gic: interrupt-controller@f1010000 {
1056 compatible = "arm,gic-400";
1057 #interrupt-cells = <3>;
1058 #address-cells = <0>;
1059 interrupt-controller;
1060 reg = <0 0xf1010000 0 0x1000>,
1061 <0 0xf1020000 0 0x20000>,
1062 <0 0xf1040000 0 0x20000>,
1063 <0 0xf1060000 0 0x20000>;
1064 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
1065 IRQ_TYPE_LEVEL_HIGH)>;
1066 clocks = <&cpg CPG_MOD 408>;
1067 clock-names = "clk";
1068 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1069 resets = <&cpg 408>;
1072 vspd0: vsp@fea20000 {
1073 compatible = "renesas,vsp2";
1074 reg = <0 0xfea20000 0 0x5000>;
1075 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
1076 clocks = <&cpg CPG_MOD 623>;
1077 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1078 resets = <&cpg 623>;
1079 renesas,fcp = <&fcpvd0>;
1082 fcpvd0: fcp@fea27000 {
1083 compatible = "renesas,fcpv";
1084 reg = <0 0xfea27000 0 0x200>;
1085 clocks = <&cpg CPG_MOD 603>;
1086 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1087 resets = <&cpg 603>;
1090 csi40: csi2@feaa0000 {
1091 compatible = "renesas,r8a77970-csi2";
1092 reg = <0 0xfeaa0000 0 0x10000>;
1093 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1094 clocks = <&cpg CPG_MOD 716>;
1095 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1096 resets = <&cpg 716>;
1097 status = "disabled";
1100 #address-cells = <1>;
1108 #address-cells = <1>;
1113 csi40vin0: endpoint@0 {
1115 remote-endpoint = <&vin0csi40>;
1117 csi40vin1: endpoint@1 {
1119 remote-endpoint = <&vin1csi40>;
1121 csi40vin2: endpoint@2 {
1123 remote-endpoint = <&vin2csi40>;
1125 csi40vin3: endpoint@3 {
1127 remote-endpoint = <&vin3csi40>;
1133 du: display@feb00000 {
1134 compatible = "renesas,du-r8a77970";
1135 reg = <0 0xfeb00000 0 0x80000>;
1136 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
1137 clocks = <&cpg CPG_MOD 724>;
1138 clock-names = "du.0";
1139 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1140 resets = <&cpg 724>;
1141 reset-names = "du.0";
1142 renesas,vsps = <&vspd0 0>;
1144 status = "disabled";
1147 #address-cells = <1>;
1156 du_out_lvds0: endpoint {
1157 remote-endpoint = <&lvds0_in>;
1163 lvds0: lvds-encoder@feb90000 {
1164 compatible = "renesas,r8a77970-lvds";
1165 reg = <0 0xfeb90000 0 0x14>;
1166 clocks = <&cpg CPG_MOD 727>;
1167 power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
1168 resets = <&cpg 727>;
1169 status = "disabled";
1172 #address-cells = <1>;
1177 lvds0_in: endpoint {
1188 prr: chipid@fff00044 {
1189 compatible = "renesas,prr";
1190 reg = <0 0xfff00044 0 4>;
1196 polling-delay-passive = <250>;
1197 polling-delay = <1000>;
1198 thermal-sensors = <&thermal>;
1205 temperature = <120000>;
1206 hysteresis = <2000>;
1214 compatible = "arm,armv8-timer";
1215 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1216 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1217 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1218 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;