1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Eagle board with R-Car V3M
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
6 * Copyright (C) 2017 Cogent Embedded, Inc.
10 #include "r8a77970.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
14 model = "Renesas Eagle board based on r8a77970";
15 compatible = "renesas,eagle", "renesas,r8a77970";
28 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
29 stdout-path = "serial0:115200n8";
32 d3p3: regulator-fixed {
33 compatible = "regulator-fixed";
34 regulator-name = "fixed-3.3V";
35 regulator-min-microvolt = <3300000>;
36 regulator-max-microvolt = <3300000>;
42 compatible = "hdmi-connector";
46 hdmi_con_out: endpoint {
47 remote-endpoint = <&adv7511_out>;
53 compatible = "thine,thc63lvd1024";
63 thc63lvd1024_in: endpoint {
64 remote-endpoint = <&lvds0_out>;
70 thc63lvd1024_out: endpoint {
71 remote-endpoint = <&adv7511_in>;
78 device_type = "memory";
79 /* first 128MB is reserved for secure area. */
80 reg = <0x0 0x48000000 0x0 0x38000000>;
84 compatible = "fixed-clock";
86 clock-frequency = <148500000>;
91 pinctrl-0 = <&avb_pins>;
92 pinctrl-names = "default";
94 renesas,no-ether-link;
96 rx-internal-delay-ps = <1800>;
97 tx-internal-delay-ps = <2000>;
100 phy0: ethernet-phy@0 {
101 compatible = "ethernet-phy-id0022.1622",
102 "ethernet-phy-ieee802.3-c22";
103 rxc-skew-ps = <1500>;
105 interrupt-parent = <&gpio1>;
106 interrupts = <17 IRQ_TYPE_LEVEL_LOW>;
107 reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
112 pinctrl-0 = <&canfd0_pins>;
113 pinctrl-names = "default";
128 data-lanes = <1 2 3 4>;
129 remote-endpoint = <&max9286_out0>;
136 clocks = <&cpg CPG_MOD 724>, <&x1_clk>;
137 clock-names = "du.0", "dclkin.0";
142 clock-frequency = <16666666>;
146 clock-frequency = <32768>;
150 pinctrl-0 = <&i2c0_pins>;
151 pinctrl-names = "default";
154 clock-frequency = <400000>;
156 io_expander: gpio@20 {
157 compatible = "onnn,pca9654";
164 compatible = "adi,adv7511w";
166 interrupt-parent = <&gpio1>;
167 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
169 adi,input-depth = <8>;
170 adi,input-colorspace = "rgb";
171 adi,input-clock = "1x";
174 #address-cells = <1>;
179 adv7511_in: endpoint {
180 remote-endpoint = <&thc63lvd1024_out>;
186 adv7511_out: endpoint {
187 remote-endpoint = <&hdmi_con_out>;
195 pinctrl-0 = <&i2c3_pins>;
196 pinctrl-names = "default";
199 clock-frequency = <400000>;
201 gmsl0: gmsl-deserializer@48 {
202 compatible = "maxim,max9286";
205 maxim,gpio-poc = <0 GPIO_ACTIVE_LOW>;
206 enable-gpios = <&io_expander 0 GPIO_ACTIVE_HIGH>;
209 #address-cells = <1>;
230 max9286_out0: endpoint {
232 data-lanes = <1 2 3 4>;
233 remote-endpoint = <&csi40_in>;
239 #address-cells = <1>;
243 #address-cells = <1>;
251 #address-cells = <1>;
259 #address-cells = <1>;
267 #address-cells = <1>;
282 lvds0_out: endpoint {
283 remote-endpoint = <&thc63lvd1024_in>;
290 pinctrl-0 = <&scif_clk_pins>;
291 pinctrl-names = "default";
294 groups = "avb0_mdio", "avb0_rgmii", "avb0_txcrefclk";
298 canfd0_pins: canfd0 {
299 groups = "canfd0_data_a";
314 groups = "qspi0_ctrl", "qspi0_data4";
319 groups = "scif0_data";
323 scif_clk_pins: scif_clk {
324 groups = "scif_clk_b";
325 function = "scif_clk";
330 pinctrl-0 = <&qspi0_pins>;
331 pinctrl-names = "default";
336 compatible = "spansion,s25fs512s", "jedec,spi-nor";
338 spi-max-frequency = <50000000>;
339 spi-rx-bus-width = <4>;
342 compatible = "fixed-partitions";
343 #address-cells = <1>;
347 reg = <0x00000000 0x040000>;
351 reg = <0x00040000 0x080000>;
354 cert_header_sa3@c0000 {
355 reg = <0x000c0000 0x080000>;
359 reg = <0x00140000 0x040000>;
362 cert_header_sa6@180000 {
363 reg = <0x00180000 0x040000>;
367 reg = <0x001c0000 0x460000>;
371 reg = <0x00640000 0x0c0000>;
375 reg = <0x00700000 0x040000>;
379 reg = <0x00740000 0x080000>;
382 reg = <0x007c0000 0x1400000>;
385 reg = <0x01bc0000 0x2440000>;
397 pinctrl-0 = <&scif0_pins>;
398 pinctrl-names = "default";
404 clock-frequency = <14745600>;