arch/arm64/boot/dts/renesas/r8a77961.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
   4  *
   5  * Copyright (C) 2016-2017 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a77961-sysc.h>
  11
  12 / {
  13         compatible = "renesas,r8a77961";
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         /*
  18          * The external audio clocks are configured as 0 Hz fixed frequency
  19          * clocks by default.
  20          * Boards that provide audio clocks should override them.
  21          */
  22         audio_clk_a: audio_clk_a {
  23                 compatible = "fixed-clock";
  24                 #clock-cells = <0>;
  25                 clock-frequency = <0>;
  26         };
  27
  28         audio_clk_b: audio_clk_b {
  29                 compatible = "fixed-clock";
  30                 #clock-cells = <0>;
  31                 clock-frequency = <0>;
  32         };
  33
  34         audio_clk_c: audio_clk_c {
  35                 compatible = "fixed-clock";
  36                 #clock-cells = <0>;
  37                 clock-frequency = <0>;
  38         };
  39
  40         /* External CAN clock - to be overridden by boards that provide it */
  41         can_clk: can {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         cluster0_opp: opp-table-0 {
  48                 compatible = "operating-points-v2";
  49                 opp-shared;
  50
  51                 opp-500000000 {
  52                         opp-hz = /bits/ 64 <500000000>;
  53                         opp-microvolt = <830000>;
  54                         clock-latency-ns = <300000>;
  55                 };
  56                 opp-1000000000 {
  57                         opp-hz = /bits/ 64 <1000000000>;
  58                         opp-microvolt = <830000>;
  59                         clock-latency-ns = <300000>;
  60                 };
  61                 opp-1500000000 {
  62                         opp-hz = /bits/ 64 <1500000000>;
  63                         opp-microvolt = <830000>;
  64                         clock-latency-ns = <300000>;
  65                         opp-suspend;
  66                 };
  67                 opp-1600000000 {
  68                         opp-hz = /bits/ 64 <1600000000>;
  69                         opp-microvolt = <900000>;
  70                         clock-latency-ns = <300000>;
  71                 };
  72                 opp-1700000000 {
  73                         opp-hz = /bits/ 64 <1700000000>;
  74                         opp-microvolt = <900000>;
  75                         clock-latency-ns = <300000>;
  76                 };
  77                 opp-1800000000 {
  78                         opp-hz = /bits/ 64 <1800000000>;
  79                         opp-microvolt = <960000>;
  80                         clock-latency-ns = <300000>;
  81                         turbo-mode;
  82                 };
  83         };
  84
  85         cluster1_opp: opp-table-1 {
  86                 compatible = "operating-points-v2";
  87                 opp-shared;
  88
  89                 opp-800000000 {
  90                         opp-hz = /bits/ 64 <800000000>;
  91                         opp-microvolt = <820000>;
  92                         clock-latency-ns = <300000>;
  93                 };
  94                 opp-1000000000 {
  95                         opp-hz = /bits/ 64 <1000000000>;
  96                         opp-microvolt = <820000>;
  97                         clock-latency-ns = <300000>;
  98                 };
  99                 opp-1200000000 {
 100                         opp-hz = /bits/ 64 <1200000000>;
 101                         opp-microvolt = <820000>;
 102                         clock-latency-ns = <300000>;
 103                 };
 104                 opp-1300000000 {
 105                         opp-hz = /bits/ 64 <1300000000>;
 106                         opp-microvolt = <820000>;
 107                         clock-latency-ns = <300000>;
 108                         turbo-mode;
 109                 };
 110         };
 111
 112         cpus {
 113                 #address-cells = <1>;
 114                 #size-cells = <0>;
 115
 116                 cpu-map {
 117                         cluster0 {
 118                                 core0 {
 119                                         cpu = <&a57_0>;
 120                                 };
 121                                 core1 {
 122                                         cpu = <&a57_1>;
 123                                 };
 124                         };
 125
 126                         cluster1 {
 127                                 core0 {
 128                                         cpu = <&a53_0>;
 129                                 };
 130                                 core1 {
 131                                         cpu = <&a53_1>;
 132                                 };
 133                                 core2 {
 134                                         cpu = <&a53_2>;
 135                                 };
 136                                 core3 {
 137                                         cpu = <&a53_3>;
 138                                 };
 139                         };
 140                 };
 141
 142                 a57_0: cpu@0 {
 143                         compatible = "arm,cortex-a57";
 144                         reg = <0x0>;
 145                         device_type = "cpu";
 146                         power-domains = <&sysc R8A77961_PD_CA57_CPU0>;
 147                         next-level-cache = <&L2_CA57>;
 148                         enable-method = "psci";
 149                         cpu-idle-states = <&CPU_SLEEP_0>;
 150                         dynamic-power-coefficient = <854>;
 151                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
 152                         operating-points-v2 = <&cluster0_opp>;
 153                         capacity-dmips-mhz = <1024>;
 154                         #cooling-cells = <2>;
 155                 };
 156
 157                 a57_1: cpu@1 {
 158                         compatible = "arm,cortex-a57";
 159                         reg = <0x1>;
 160                         device_type = "cpu";
 161                         power-domains = <&sysc R8A77961_PD_CA57_CPU1>;
 162                         next-level-cache = <&L2_CA57>;
 163                         enable-method = "psci";
 164                         cpu-idle-states = <&CPU_SLEEP_0>;
 165                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
 166                         operating-points-v2 = <&cluster0_opp>;
 167                         capacity-dmips-mhz = <1024>;
 168                         #cooling-cells = <2>;
 169                 };
 170
 171                 a53_0: cpu@100 {
 172                         compatible = "arm,cortex-a53";
 173                         reg = <0x100>;
 174                         device_type = "cpu";
 175                         power-domains = <&sysc R8A77961_PD_CA53_CPU0>;
 176                         next-level-cache = <&L2_CA53>;
 177                         enable-method = "psci";
 178                         cpu-idle-states = <&CPU_SLEEP_1>;
 179                         #cooling-cells = <2>;
 180                         dynamic-power-coefficient = <277>;
 181                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 182                         operating-points-v2 = <&cluster1_opp>;
 183                         capacity-dmips-mhz = <535>;
 184                 };
 185
 186                 a53_1: cpu@101 {
 187                         compatible = "arm,cortex-a53";
 188                         reg = <0x101>;
 189                         device_type = "cpu";
 190                         power-domains = <&sysc R8A77961_PD_CA53_CPU1>;
 191                         next-level-cache = <&L2_CA53>;
 192                         enable-method = "psci";
 193                         cpu-idle-states = <&CPU_SLEEP_1>;
 194                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 195                         operating-points-v2 = <&cluster1_opp>;
 196                         capacity-dmips-mhz = <535>;
 197                 };
 198
 199                 a53_2: cpu@102 {
 200                         compatible = "arm,cortex-a53";
 201                         reg = <0x102>;
 202                         device_type = "cpu";
 203                         power-domains = <&sysc R8A77961_PD_CA53_CPU2>;
 204                         next-level-cache = <&L2_CA53>;
 205                         enable-method = "psci";
 206                         cpu-idle-states = <&CPU_SLEEP_1>;
 207                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 208                         operating-points-v2 = <&cluster1_opp>;
 209                         capacity-dmips-mhz = <535>;
 210                 };
 211
 212                 a53_3: cpu@103 {
 213                         compatible = "arm,cortex-a53";
 214                         reg = <0x103>;
 215                         device_type = "cpu";
 216                         power-domains = <&sysc R8A77961_PD_CA53_CPU3>;
 217                         next-level-cache = <&L2_CA53>;
 218                         enable-method = "psci";
 219                         cpu-idle-states = <&CPU_SLEEP_1>;
 220                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 221                         operating-points-v2 = <&cluster1_opp>;
 222                         capacity-dmips-mhz = <535>;
 223                 };
 224
 225                 L2_CA57: cache-controller-0 {
 226                         compatible = "cache";
 227                         power-domains = <&sysc R8A77961_PD_CA57_SCU>;
 228                         cache-unified;
 229                         cache-level = <2>;
 230                 };
 231
 232                 L2_CA53: cache-controller-1 {
 233                         compatible = "cache";
 234                         power-domains = <&sysc R8A77961_PD_CA53_SCU>;
 235                         cache-unified;
 236                         cache-level = <2>;
 237                 };
 238
 239                 idle-states {
 240                         entry-method = "psci";
 241
 242                         CPU_SLEEP_0: cpu-sleep-0 {
 243                                 compatible = "arm,idle-state";
 244                                 arm,psci-suspend-param = <0x0010000>;
 245                                 local-timer-stop;
 246                                 entry-latency-us = <400>;
 247                                 exit-latency-us = <500>;
 248                                 min-residency-us = <4000>;
 249                         };
 250
 251                         CPU_SLEEP_1: cpu-sleep-1 {
 252                                 compatible = "arm,idle-state";
 253                                 arm,psci-suspend-param = <0x0010000>;
 254                                 local-timer-stop;
 255                                 entry-latency-us = <700>;
 256                                 exit-latency-us = <700>;
 257                                 min-residency-us = <5000>;
 258                         };
 259                 };
 260         };
 261
 262         extal_clk: extal {
 263                 compatible = "fixed-clock";
 264                 #clock-cells = <0>;
 265                 /* This value must be overridden by the board */
 266                 clock-frequency = <0>;
 267         };
 268
 269         extalr_clk: extalr {
 270                 compatible = "fixed-clock";
 271                 #clock-cells = <0>;
 272                 /* This value must be overridden by the board */
 273                 clock-frequency = <0>;
 274         };
 275
 276         /* External PCIe clock - can be overridden by the board */
 277         pcie_bus_clk: pcie_bus {
 278                 compatible = "fixed-clock";
 279                 #clock-cells = <0>;
 280                 clock-frequency = <0>;
 281         };
 282
 283         pmu_a53 {
 284                 compatible = "arm,cortex-a53-pmu";
 285                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 286                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 287                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 288                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 289                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 290         };
 291
 292         pmu_a57 {
 293                 compatible = "arm,cortex-a57-pmu";
 294                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 295                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 296                 interrupt-affinity = <&a57_0>, <&a57_1>;
 297         };
 298
 299         psci {
 300                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 301                 method = "smc";
 302         };
 303
 304         /* External SCIF clock - to be overridden by boards that provide it */
 305         scif_clk: scif {
 306                 compatible = "fixed-clock";
 307                 #clock-cells = <0>;
 308                 clock-frequency = <0>;
 309         };
 310
 311         soc {
 312                 compatible = "simple-bus";
 313                 interrupt-parent = <&gic>;
 314                 #address-cells = <2>;
 315                 #size-cells = <2>;
 316                 ranges;
 317
 318                 rwdt: watchdog@e6020000 {
 319                         compatible = "renesas,r8a77961-wdt",
 320                                      "renesas,rcar-gen3-wdt";
 321                         reg = <0 0xe6020000 0 0x0c>;
 322                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 323                         clocks = <&cpg CPG_MOD 402>;
 324                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 325                         resets = <&cpg 402>;
 326                         status = "disabled";
 327                 };
 328
 329                 gpio0: gpio@e6050000 {
 330                         compatible = "renesas,gpio-r8a77961",
 331                                      "renesas,rcar-gen3-gpio";
 332                         reg = <0 0xe6050000 0 0x50>;
 333                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 334                         #gpio-cells = <2>;
 335                         gpio-controller;
 336                         gpio-ranges = <&pfc 0 0 16>;
 337                         #interrupt-cells = <2>;
 338                         interrupt-controller;
 339                         clocks = <&cpg CPG_MOD 912>;
 340                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 341                         resets = <&cpg 912>;
 342                 };
 343
 344                 gpio1: gpio@e6051000 {
 345                         compatible = "renesas,gpio-r8a77961",
 346                                      "renesas,rcar-gen3-gpio";
 347                         reg = <0 0xe6051000 0 0x50>;
 348                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 349                         #gpio-cells = <2>;
 350                         gpio-controller;
 351                         gpio-ranges = <&pfc 0 32 29>;
 352                         #interrupt-cells = <2>;
 353                         interrupt-controller;
 354                         clocks = <&cpg CPG_MOD 911>;
 355                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 356                         resets = <&cpg 911>;
 357                 };
 358
 359                 gpio2: gpio@e6052000 {
 360                         compatible = "renesas,gpio-r8a77961",
 361                                      "renesas,rcar-gen3-gpio";
 362                         reg = <0 0xe6052000 0 0x50>;
 363                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 364                         #gpio-cells = <2>;
 365                         gpio-controller;
 366                         gpio-ranges = <&pfc 0 64 15>;
 367                         #interrupt-cells = <2>;
 368                         interrupt-controller;
 369                         clocks = <&cpg CPG_MOD 910>;
 370                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 371                         resets = <&cpg 910>;
 372                 };
 373
 374                 gpio3: gpio@e6053000 {
 375                         compatible = "renesas,gpio-r8a77961",
 376                                      "renesas,rcar-gen3-gpio";
 377                         reg = <0 0xe6053000 0 0x50>;
 378                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 379                         #gpio-cells = <2>;
 380                         gpio-controller;
 381                         gpio-ranges = <&pfc 0 96 16>;
 382                         #interrupt-cells = <2>;
 383                         interrupt-controller;
 384                         clocks = <&cpg CPG_MOD 909>;
 385                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 386                         resets = <&cpg 909>;
 387                 };
 388
 389                 gpio4: gpio@e6054000 {
 390                         compatible = "renesas,gpio-r8a77961",
 391                                      "renesas,rcar-gen3-gpio";
 392                         reg = <0 0xe6054000 0 0x50>;
 393                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 394                         #gpio-cells = <2>;
 395                         gpio-controller;
 396                         gpio-ranges = <&pfc 0 128 18>;
 397                         #interrupt-cells = <2>;
 398                         interrupt-controller;
 399                         clocks = <&cpg CPG_MOD 908>;
 400                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 401                         resets = <&cpg 908>;
 402                 };
 403
 404                 gpio5: gpio@e6055000 {
 405                         compatible = "renesas,gpio-r8a77961",
 406                                      "renesas,rcar-gen3-gpio";
 407                         reg = <0 0xe6055000 0 0x50>;
 408                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 409                         #gpio-cells = <2>;
 410                         gpio-controller;
 411                         gpio-ranges = <&pfc 0 160 26>;
 412                         #interrupt-cells = <2>;
 413                         interrupt-controller;
 414                         clocks = <&cpg CPG_MOD 907>;
 415                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 416                         resets = <&cpg 907>;
 417                 };
 418
 419                 gpio6: gpio@e6055400 {
 420                         compatible = "renesas,gpio-r8a77961",
 421                                      "renesas,rcar-gen3-gpio";
 422                         reg = <0 0xe6055400 0 0x50>;
 423                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 424                         #gpio-cells = <2>;
 425                         gpio-controller;
 426                         gpio-ranges = <&pfc 0 192 32>;
 427                         #interrupt-cells = <2>;
 428                         interrupt-controller;
 429                         clocks = <&cpg CPG_MOD 906>;
 430                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 431                         resets = <&cpg 906>;
 432                 };
 433
 434                 gpio7: gpio@e6055800 {
 435                         compatible = "renesas,gpio-r8a77961",
 436                                      "renesas,rcar-gen3-gpio";
 437                         reg = <0 0xe6055800 0 0x50>;
 438                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 439                         #gpio-cells = <2>;
 440                         gpio-controller;
 441                         gpio-ranges = <&pfc 0 224 4>;
 442                         #interrupt-cells = <2>;
 443                         interrupt-controller;
 444                         clocks = <&cpg CPG_MOD 905>;
 445                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 446                         resets = <&cpg 905>;
 447                 };
 448
 449                 pfc: pinctrl@e6060000 {
 450                         compatible = "renesas,pfc-r8a77961";
 451                         reg = <0 0xe6060000 0 0x50c>;
 452                 };
 453
 454                 cmt0: timer@e60f0000 {
 455                         compatible = "renesas,r8a77961-cmt0",
 456                                      "renesas,rcar-gen3-cmt0";
 457                         reg = <0 0xe60f0000 0 0x1004>;
 458                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 459                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 460                         clocks = <&cpg CPG_MOD 303>;
 461                         clock-names = "fck";
 462                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 463                         resets = <&cpg 303>;
 464                         status = "disabled";
 465                 };
 466
 467                 cmt1: timer@e6130000 {
 468                         compatible = "renesas,r8a77961-cmt1",
 469                                      "renesas,rcar-gen3-cmt1";
 470                         reg = <0 0xe6130000 0 0x1004>;
 471                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 472                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 473                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 474                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 475                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 476                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 477                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 478                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 479                         clocks = <&cpg CPG_MOD 302>;
 480                         clock-names = "fck";
 481                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 482                         resets = <&cpg 302>;
 483                         status = "disabled";
 484                 };
 485
 486                 cmt2: timer@e6140000 {
 487                         compatible = "renesas,r8a77961-cmt1",
 488                                      "renesas,rcar-gen3-cmt1";
 489                         reg = <0 0xe6140000 0 0x1004>;
 490                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 491                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 492                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 493                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 494                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 495                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 496                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 497                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 498                         clocks = <&cpg CPG_MOD 301>;
 499                         clock-names = "fck";
 500                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 501                         resets = <&cpg 301>;
 502                         status = "disabled";
 503                 };
 504
 505                 cmt3: timer@e6148000 {
 506                         compatible = "renesas,r8a77961-cmt1",
 507                                      "renesas,rcar-gen3-cmt1";
 508                         reg = <0 0xe6148000 0 0x1004>;
 509                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 510                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 511                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 512                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 513                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 514                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 515                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 516                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 517                         clocks = <&cpg CPG_MOD 300>;
 518                         clock-names = "fck";
 519                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 520                         resets = <&cpg 300>;
 521                         status = "disabled";
 522                 };
 523
 524                 cpg: clock-controller@e6150000 {
 525                         compatible = "renesas,r8a77961-cpg-mssr";
 526                         reg = <0 0xe6150000 0 0x1000>;
 527                         clocks = <&extal_clk>, <&extalr_clk>;
 528                         clock-names = "extal", "extalr";
 529                         #clock-cells = <2>;
 530                         #power-domain-cells = <0>;
 531                         #reset-cells = <1>;
 532                 };
 533
 534                 rst: reset-controller@e6160000 {
 535                         compatible = "renesas,r8a77961-rst";
 536                         reg = <0 0xe6160000 0 0x0200>;
 537                 };
 538
 539                 sysc: system-controller@e6180000 {
 540                         compatible = "renesas,r8a77961-sysc";
 541                         reg = <0 0xe6180000 0 0x0400>;
 542                         #power-domain-cells = <1>;
 543                 };
 544
 545                 tsc: thermal@e6198000 {
 546                         compatible = "renesas,r8a77961-thermal";
 547                         reg = <0 0xe6198000 0 0x100>,
 548                               <0 0xe61a0000 0 0x100>,
 549                               <0 0xe61a8000 0 0x100>;
 550                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 551                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 552                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 553                         clocks = <&cpg CPG_MOD 522>;
 554                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 555                         resets = <&cpg 522>;
 556                         #thermal-sensor-cells = <1>;
 557                 };
 558
 559                 intc_ex: interrupt-controller@e61c0000 {
 560                         compatible = "renesas,intc-ex-r8a77961", "renesas,irqc";
 561                         #interrupt-cells = <2>;
 562                         interrupt-controller;
 563                         reg = <0 0xe61c0000 0 0x200>;
 564                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 565                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 566                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 567                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 568                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 569                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 570                         clocks = <&cpg CPG_MOD 407>;
 571                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 572                         resets = <&cpg 407>;
 573                 };
 574
 575                 tmu0: timer@e61e0000 {
 576                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 577                         reg = <0 0xe61e0000 0 0x30>;
 578                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 579                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 580                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 581                         clocks = <&cpg CPG_MOD 125>;
 582                         clock-names = "fck";
 583                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 584                         resets = <&cpg 125>;
 585                         status = "disabled";
 586                 };
 587
 588                 tmu1: timer@e6fc0000 {
 589                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 590                         reg = <0 0xe6fc0000 0 0x30>;
 591                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 592                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 593                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 594                         clocks = <&cpg CPG_MOD 124>;
 595                         clock-names = "fck";
 596                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 597                         resets = <&cpg 124>;
 598                         status = "disabled";
 599                 };
 600
 601                 tmu2: timer@e6fd0000 {
 602                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 603                         reg = <0 0xe6fd0000 0 0x30>;
 604                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 605                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 606                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 607                         clocks = <&cpg CPG_MOD 123>;
 608                         clock-names = "fck";
 609                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 610                         resets = <&cpg 123>;
 611                         status = "disabled";
 612                 };
 613
 614                 tmu3: timer@e6fe0000 {
 615                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 616                         reg = <0 0xe6fe0000 0 0x30>;
 617                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 618                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 619                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 620                         clocks = <&cpg CPG_MOD 122>;
 621                         clock-names = "fck";
 622                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 623                         resets = <&cpg 122>;
 624                         status = "disabled";
 625                 };
 626
 627                 tmu4: timer@ffc00000 {
 628                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 629                         reg = <0 0xffc00000 0 0x30>;
 630                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 631                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 632                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 633                         clocks = <&cpg CPG_MOD 121>;
 634                         clock-names = "fck";
 635                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 636                         resets = <&cpg 121>;
 637                         status = "disabled";
 638                 };
 639
 640                 i2c0: i2c@e6500000 {
 641                         #address-cells = <1>;
 642                         #size-cells = <0>;
 643                         compatible = "renesas,i2c-r8a77961",
 644                                      "renesas,rcar-gen3-i2c";
 645                         reg = <0 0xe6500000 0 0x40>;
 646                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 647                         clocks = <&cpg CPG_MOD 931>;
 648                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 649                         resets = <&cpg 931>;
 650                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 651                                <&dmac2 0x91>, <&dmac2 0x90>;
 652                         dma-names = "tx", "rx", "tx", "rx";
 653                         i2c-scl-internal-delay-ns = <110>;
 654                         status = "disabled";
 655                 };
 656
 657                 i2c1: i2c@e6508000 {
 658                         #address-cells = <1>;
 659                         #size-cells = <0>;
 660                         compatible = "renesas,i2c-r8a77961",
 661                                      "renesas,rcar-gen3-i2c";
 662                         reg = <0 0xe6508000 0 0x40>;
 663                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 664                         clocks = <&cpg CPG_MOD 930>;
 665                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 666                         resets = <&cpg 930>;
 667                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 668                                <&dmac2 0x93>, <&dmac2 0x92>;
 669                         dma-names = "tx", "rx", "tx", "rx";
 670                         i2c-scl-internal-delay-ns = <6>;
 671                         status = "disabled";
 672                 };
 673
 674                 i2c2: i2c@e6510000 {
 675                         #address-cells = <1>;
 676                         #size-cells = <0>;
 677                         compatible = "renesas,i2c-r8a77961",
 678                                      "renesas,rcar-gen3-i2c";
 679                         reg = <0 0xe6510000 0 0x40>;
 680                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 681                         clocks = <&cpg CPG_MOD 929>;
 682                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 683                         resets = <&cpg 929>;
 684                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 685                                <&dmac2 0x95>, <&dmac2 0x94>;
 686                         dma-names = "tx", "rx", "tx", "rx";
 687                         i2c-scl-internal-delay-ns = <6>;
 688                         status = "disabled";
 689                 };
 690
 691                 i2c3: i2c@e66d0000 {
 692                         #address-cells = <1>;
 693                         #size-cells = <0>;
 694                         compatible = "renesas,i2c-r8a77961",
 695                                      "renesas,rcar-gen3-i2c";
 696                         reg = <0 0xe66d0000 0 0x40>;
 697                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 698                         clocks = <&cpg CPG_MOD 928>;
 699                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 700                         resets = <&cpg 928>;
 701                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 702                         dma-names = "tx", "rx";
 703                         i2c-scl-internal-delay-ns = <110>;
 704                         status = "disabled";
 705                 };
 706
 707                 i2c4: i2c@e66d8000 {
 708                         #address-cells = <1>;
 709                         #size-cells = <0>;
 710                         compatible = "renesas,i2c-r8a77961",
 711                                      "renesas,rcar-gen3-i2c";
 712                         reg = <0 0xe66d8000 0 0x40>;
 713                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 714                         clocks = <&cpg CPG_MOD 927>;
 715                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 716                         resets = <&cpg 927>;
 717                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 718                         dma-names = "tx", "rx";
 719                         i2c-scl-internal-delay-ns = <110>;
 720                         status = "disabled";
 721                 };
 722
 723                 i2c5: i2c@e66e0000 {
 724                         #address-cells = <1>;
 725                         #size-cells = <0>;
 726                         compatible = "renesas,i2c-r8a77961",
 727                                      "renesas,rcar-gen3-i2c";
 728                         reg = <0 0xe66e0000 0 0x40>;
 729                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 730                         clocks = <&cpg CPG_MOD 919>;
 731                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 732                         resets = <&cpg 919>;
 733                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 734                         dma-names = "tx", "rx";
 735                         i2c-scl-internal-delay-ns = <110>;
 736                         status = "disabled";
 737                 };
 738
 739                 i2c6: i2c@e66e8000 {
 740                         #address-cells = <1>;
 741                         #size-cells = <0>;
 742                         compatible = "renesas,i2c-r8a77961",
 743                                      "renesas,rcar-gen3-i2c";
 744                         reg = <0 0xe66e8000 0 0x40>;
 745                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 746                         clocks = <&cpg CPG_MOD 918>;
 747                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 748                         resets = <&cpg 918>;
 749                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 750                         dma-names = "tx", "rx";
 751                         i2c-scl-internal-delay-ns = <6>;
 752                         status = "disabled";
 753                 };
 754
 755                 i2c_dvfs: i2c@e60b0000 {
 756                         #address-cells = <1>;
 757                         #size-cells = <0>;
 758                         compatible = "renesas,iic-r8a77961",
 759                                      "renesas,rcar-gen3-iic",
 760                                      "renesas,rmobile-iic";
 761                         reg = <0 0xe60b0000 0 0x425>;
 762                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 763                         clocks = <&cpg CPG_MOD 926>;
 764                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 765                         resets = <&cpg 926>;
 766                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 767                         dma-names = "tx", "rx";
 768                         status = "disabled";
 769                 };
 770
 771                 hscif0: serial@e6540000 {
 772                         compatible = "renesas,hscif-r8a77961",
 773                                      "renesas,rcar-gen3-hscif",
 774                                      "renesas,hscif";
 775                         reg = <0 0xe6540000 0 0x60>;
 776                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 777                         clocks = <&cpg CPG_MOD 520>,
 778                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 779                                  <&scif_clk>;
 780                         clock-names = "fck", "brg_int", "scif_clk";
 781                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 782                                <&dmac2 0x31>, <&dmac2 0x30>;
 783                         dma-names = "tx", "rx", "tx", "rx";
 784                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 785                         resets = <&cpg 520>;
 786                         status = "disabled";
 787                 };
 788
 789                 hscif1: serial@e6550000 {
 790                         compatible = "renesas,hscif-r8a77961",
 791                                      "renesas,rcar-gen3-hscif",
 792                                      "renesas,hscif";
 793                         reg = <0 0xe6550000 0 0x60>;
 794                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 795                         clocks = <&cpg CPG_MOD 519>,
 796                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 797                                  <&scif_clk>;
 798                         clock-names = "fck", "brg_int", "scif_clk";
 799                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 800                                <&dmac2 0x33>, <&dmac2 0x32>;
 801                         dma-names = "tx", "rx", "tx", "rx";
 802                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 803                         resets = <&cpg 519>;
 804                         status = "disabled";
 805                 };
 806
 807                 hscif2: serial@e6560000 {
 808                         compatible = "renesas,hscif-r8a77961",
 809                                      "renesas,rcar-gen3-hscif",
 810                                      "renesas,hscif";
 811                         reg = <0 0xe6560000 0 0x60>;
 812                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 813                         clocks = <&cpg CPG_MOD 518>,
 814                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 815                                  <&scif_clk>;
 816                         clock-names = "fck", "brg_int", "scif_clk";
 817                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 818                                <&dmac2 0x35>, <&dmac2 0x34>;
 819                         dma-names = "tx", "rx", "tx", "rx";
 820                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 821                         resets = <&cpg 518>;
 822                         status = "disabled";
 823                 };
 824
 825                 hscif3: serial@e66a0000 {
 826                         compatible = "renesas,hscif-r8a77961",
 827                                      "renesas,rcar-gen3-hscif",
 828                                      "renesas,hscif";
 829                         reg = <0 0xe66a0000 0 0x60>;
 830                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 831                         clocks = <&cpg CPG_MOD 517>,
 832                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 833                                  <&scif_clk>;
 834                         clock-names = "fck", "brg_int", "scif_clk";
 835                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 836                         dma-names = "tx", "rx";
 837                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 838                         resets = <&cpg 517>;
 839                         status = "disabled";
 840                 };
 841
 842                 hscif4: serial@e66b0000 {
 843                         compatible = "renesas,hscif-r8a77961",
 844                                      "renesas,rcar-gen3-hscif",
 845                                      "renesas,hscif";
 846                         reg = <0 0xe66b0000 0 0x60>;
 847                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 848                         clocks = <&cpg CPG_MOD 516>,
 849                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 850                                  <&scif_clk>;
 851                         clock-names = "fck", "brg_int", "scif_clk";
 852                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 853                         dma-names = "tx", "rx";
 854                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 855                         resets = <&cpg 516>;
 856                         status = "disabled";
 857                 };
 858
 859                 hsusb: usb@e6590000 {
 860                         compatible = "renesas,usbhs-r8a77961",
 861                                      "renesas,rcar-gen3-usbhs";
 862                         reg = <0 0xe6590000 0 0x200>;
 863                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 864                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 865                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 866                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 867                         dma-names = "ch0", "ch1", "ch2", "ch3";
 868                         renesas,buswait = <11>;
 869                         phys = <&usb2_phy0 3>;
 870                         phy-names = "usb";
 871                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 872                         resets = <&cpg 704>, <&cpg 703>;
 873                         status = "disabled";
 874                 };
 875
 876                 usb_dmac0: dma-controller@e65a0000 {
 877                         compatible = "renesas,r8a77961-usb-dmac",
 878                                      "renesas,usb-dmac";
 879                         reg = <0 0xe65a0000 0 0x100>;
 880                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 881                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 882                         interrupt-names = "ch0", "ch1";
 883                         clocks = <&cpg CPG_MOD 330>;
 884                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 885                         resets = <&cpg 330>;
 886                         #dma-cells = <1>;
 887                         dma-channels = <2>;
 888                 };
 889
 890                 usb_dmac1: dma-controller@e65b0000 {
 891                         compatible = "renesas,r8a77961-usb-dmac",
 892                                      "renesas,usb-dmac";
 893                         reg = <0 0xe65b0000 0 0x100>;
 894                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 895                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 896                         interrupt-names = "ch0", "ch1";
 897                         clocks = <&cpg CPG_MOD 331>;
 898                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 899                         resets = <&cpg 331>;
 900                         #dma-cells = <1>;
 901                         dma-channels = <2>;
 902                 };
 903
 904                 usb3_phy0: usb-phy@e65ee000 {
 905                         compatible = "renesas,r8a77961-usb3-phy",
 906                                      "renesas,rcar-gen3-usb3-phy";
 907                         reg = <0 0xe65ee000 0 0x90>;
 908                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 909                                  <&usb_extal_clk>;
 910                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 911                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 912                         resets = <&cpg 328>;
 913                         #phy-cells = <0>;
 914                         status = "disabled";
 915                 };
 916
 917                 arm_cc630p: crypto@e6601000 {
 918                         compatible = "arm,cryptocell-630p-ree";
 919                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 920                         reg = <0x0 0xe6601000 0 0x1000>;
 921                         clocks = <&cpg CPG_MOD 229>;
 922                         resets = <&cpg 229>;
 923                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 924                 };
 925
 926                 dmac0: dma-controller@e6700000 {
 927                         compatible = "renesas,dmac-r8a77961",
 928                                      "renesas,rcar-dmac";
 929                         reg = <0 0xe6700000 0 0x10000>;
 930                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 931                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 932                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 933                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 934                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 935                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 936                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 937                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 938                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 939                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 940                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 941                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 942                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 943                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 944                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 945                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 946                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 947                         interrupt-names = "error",
 948                                         "ch0", "ch1", "ch2", "ch3",
 949                                         "ch4", "ch5", "ch6", "ch7",
 950                                         "ch8", "ch9", "ch10", "ch11",
 951                                         "ch12", "ch13", "ch14", "ch15";
 952                         clocks = <&cpg CPG_MOD 219>;
 953                         clock-names = "fck";
 954                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 955                         resets = <&cpg 219>;
 956                         #dma-cells = <1>;
 957                         dma-channels = <16>;
 958                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 959                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 960                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 961                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 962                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 963                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 964                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 965                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 966                 };
 967
 968                 dmac1: dma-controller@e7300000 {
 969                         compatible = "renesas,dmac-r8a77961",
 970                                      "renesas,rcar-dmac";
 971                         reg = <0 0xe7300000 0 0x10000>;
 972                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 973                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 974                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 975                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 976                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 977                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 978                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 979                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 980                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 981                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 982                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 983                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 984                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 985                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 986                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 987                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 988                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 989                         interrupt-names = "error",
 990                                         "ch0", "ch1", "ch2", "ch3",
 991                                         "ch4", "ch5", "ch6", "ch7",
 992                                         "ch8", "ch9", "ch10", "ch11",
 993                                         "ch12", "ch13", "ch14", "ch15";
 994                         clocks = <&cpg CPG_MOD 218>;
 995                         clock-names = "fck";
 996                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 997                         resets = <&cpg 218>;
 998                         #dma-cells = <1>;
 999                         dma-channels = <16>;
1000                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1001                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1002                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1003                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1004                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1005                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1006                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1007                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1008                 };
1009
1010                 dmac2: dma-controller@e7310000 {
1011                         compatible = "renesas,dmac-r8a77961",
1012                                      "renesas,rcar-dmac";
1013                         reg = <0 0xe7310000 0 0x10000>;
1014                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1015                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1016                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1017                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1018                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1019                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1020                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1021                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1022                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1023                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1024                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1025                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1026                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1027                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1028                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1029                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1030                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1031                         interrupt-names = "error",
1032                                         "ch0", "ch1", "ch2", "ch3",
1033                                         "ch4", "ch5", "ch6", "ch7",
1034                                         "ch8", "ch9", "ch10", "ch11",
1035                                         "ch12", "ch13", "ch14", "ch15";
1036                         clocks = <&cpg CPG_MOD 217>;
1037                         clock-names = "fck";
1038                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1039                         resets = <&cpg 217>;
1040                         #dma-cells = <1>;
1041                         dma-channels = <16>;
1042                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1043                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1044                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1045                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1046                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1047                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1048                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1049                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1050                 };
1051
1052                 ipmmu_ds0: iommu@e6740000 {
1053                         compatible = "renesas,ipmmu-r8a77961";
1054                         reg = <0 0xe6740000 0 0x1000>;
1055                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1056                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1057                         #iommu-cells = <1>;
1058                 };
1059
1060                 ipmmu_ds1: iommu@e7740000 {
1061                         compatible = "renesas,ipmmu-r8a77961";
1062                         reg = <0 0xe7740000 0 0x1000>;
1063                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1064                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1065                         #iommu-cells = <1>;
1066                 };
1067
1068                 ipmmu_hc: iommu@e6570000 {
1069                         compatible = "renesas,ipmmu-r8a77961";
1070                         reg = <0 0xe6570000 0 0x1000>;
1071                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1072                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1073                         #iommu-cells = <1>;
1074                 };
1075
1076                 ipmmu_ir: iommu@ff8b0000 {
1077                         compatible = "renesas,ipmmu-r8a77961";
1078                         reg = <0 0xff8b0000 0 0x1000>;
1079                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1080                         power-domains = <&sysc R8A77961_PD_A3IR>;
1081                         #iommu-cells = <1>;
1082                 };
1083
1084                 ipmmu_mm: iommu@e67b0000 {
1085                         compatible = "renesas,ipmmu-r8a77961";
1086                         reg = <0 0xe67b0000 0 0x1000>;
1087                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1088                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1089                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1090                         #iommu-cells = <1>;
1091                 };
1092
1093                 ipmmu_mp: iommu@ec670000 {
1094                         compatible = "renesas,ipmmu-r8a77961";
1095                         reg = <0 0xec670000 0 0x1000>;
1096                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1097                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1098                         #iommu-cells = <1>;
1099                 };
1100
1101                 ipmmu_pv0: iommu@fd800000 {
1102                         compatible = "renesas,ipmmu-r8a77961";
1103                         reg = <0 0xfd800000 0 0x1000>;
1104                         renesas,ipmmu-main = <&ipmmu_mm 5>;
1105                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1106                         #iommu-cells = <1>;
1107                 };
1108
1109                 ipmmu_pv1: iommu@fd950000 {
1110                         compatible = "renesas,ipmmu-r8a77961";
1111                         reg = <0 0xfd950000 0 0x1000>;
1112                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1113                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1114                         #iommu-cells = <1>;
1115                 };
1116
1117                 ipmmu_rt: iommu@ffc80000 {
1118                         compatible = "renesas,ipmmu-r8a77961";
1119                         reg = <0 0xffc80000 0 0x1000>;
1120                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1121                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1122                         #iommu-cells = <1>;
1123                 };
1124
1125                 ipmmu_vc0: iommu@fe6b0000 {
1126                         compatible = "renesas,ipmmu-r8a77961";
1127                         reg = <0 0xfe6b0000 0 0x1000>;
1128                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1129                         power-domains = <&sysc R8A77961_PD_A3VC>;
1130                         #iommu-cells = <1>;
1131                 };
1132
1133                 ipmmu_vi0: iommu@febd0000 {
1134                         compatible = "renesas,ipmmu-r8a77961";
1135                         reg = <0 0xfebd0000 0 0x1000>;
1136                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1137                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1138                         #iommu-cells = <1>;
1139                 };
1140
1141                 avb: ethernet@e6800000 {
1142                         compatible = "renesas,etheravb-r8a77961",
1143                                      "renesas,etheravb-rcar-gen3";
1144                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1145                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1146                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1147                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1148                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1149                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1150                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1151                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1152                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1153                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1154                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1155                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1156                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1157                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1158                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1159                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1160                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1161                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1162                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1163                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1164                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1165                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1166                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1167                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1168                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1169                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1170                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1171                                           "ch4", "ch5", "ch6", "ch7",
1172                                           "ch8", "ch9", "ch10", "ch11",
1173                                           "ch12", "ch13", "ch14", "ch15",
1174                                           "ch16", "ch17", "ch18", "ch19",
1175                                           "ch20", "ch21", "ch22", "ch23",
1176                                           "ch24";
1177                         clocks = <&cpg CPG_MOD 812>;
1178                         clock-names = "fck";
1179                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1180                         resets = <&cpg 812>;
1181                         phy-mode = "rgmii";
1182                         rx-internal-delay-ps = <0>;
1183                         tx-internal-delay-ps = <0>;
1184                         iommus = <&ipmmu_ds0 16>;
1185                         #address-cells = <1>;
1186                         #size-cells = <0>;
1187                         status = "disabled";
1188                 };
1189
1190                 can0: can@e6c30000 {
1191                         compatible = "renesas,can-r8a77961",
1192                                      "renesas,rcar-gen3-can";
1193                         reg = <0 0xe6c30000 0 0x1000>;
1194                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1195                         clocks = <&cpg CPG_MOD 916>,
1196                                <&cpg CPG_CORE R8A77961_CLK_CANFD>,
1197                                <&can_clk>;
1198                         clock-names = "clkp1", "clkp2", "can_clk";
1199                         assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1200                         assigned-clock-rates = <40000000>;
1201                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1202                         resets = <&cpg 916>;
1203                         status = "disabled";
1204                 };
1205
1206                 can1: can@e6c38000 {
1207                         compatible = "renesas,can-r8a77961",
1208                                      "renesas,rcar-gen3-can";
1209                         reg = <0 0xe6c38000 0 0x1000>;
1210                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1211                         clocks = <&cpg CPG_MOD 915>,
1212                                <&cpg CPG_CORE R8A77961_CLK_CANFD>,
1213                                <&can_clk>;
1214                         clock-names = "clkp1", "clkp2", "can_clk";
1215                         assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1216                         assigned-clock-rates = <40000000>;
1217                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1218                         resets = <&cpg 915>;
1219                         status = "disabled";
1220                 };
1221
1222                 canfd: can@e66c0000 {
1223                         compatible = "renesas,r8a77961-canfd",
1224                                      "renesas,rcar-gen3-canfd";
1225                         reg = <0 0xe66c0000 0 0x8000>;
1226                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1227                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1228                         interrupt-names = "ch_int", "g_int";
1229                         clocks = <&cpg CPG_MOD 914>,
1230                                <&cpg CPG_CORE R8A77961_CLK_CANFD>,
1231                                <&can_clk>;
1232                         clock-names = "fck", "canfd", "can_clk";
1233                         assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1234                         assigned-clock-rates = <40000000>;
1235                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1236                         resets = <&cpg 914>;
1237                         status = "disabled";
1238
1239                         channel0 {
1240                                 status = "disabled";
1241                         };
1242
1243                         channel1 {
1244                                 status = "disabled";
1245                         };
1246                 };
1247
1248                 pwm0: pwm@e6e30000 {
1249                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1250                         reg = <0 0xe6e30000 0 8>;
1251                         #pwm-cells = <2>;
1252                         clocks = <&cpg CPG_MOD 523>;
1253                         resets = <&cpg 523>;
1254                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1255                         status = "disabled";
1256                 };
1257
1258                 pwm1: pwm@e6e31000 {
1259                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1260                         reg = <0 0xe6e31000 0 8>;
1261                         #pwm-cells = <2>;
1262                         clocks = <&cpg CPG_MOD 523>;
1263                         resets = <&cpg 523>;
1264                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1265                         status = "disabled";
1266                 };
1267
1268                 pwm2: pwm@e6e32000 {
1269                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1270                         reg = <0 0xe6e32000 0 8>;
1271                         #pwm-cells = <2>;
1272                         clocks = <&cpg CPG_MOD 523>;
1273                         resets = <&cpg 523>;
1274                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1275                         status = "disabled";
1276                 };
1277
1278                 pwm3: pwm@e6e33000 {
1279                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1280                         reg = <0 0xe6e33000 0 8>;
1281                         #pwm-cells = <2>;
1282                         clocks = <&cpg CPG_MOD 523>;
1283                         resets = <&cpg 523>;
1284                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1285                         status = "disabled";
1286                 };
1287
1288                 pwm4: pwm@e6e34000 {
1289                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1290                         reg = <0 0xe6e34000 0 8>;
1291                         #pwm-cells = <2>;
1292                         clocks = <&cpg CPG_MOD 523>;
1293                         resets = <&cpg 523>;
1294                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1295                         status = "disabled";
1296                 };
1297
1298                 pwm5: pwm@e6e35000 {
1299                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1300                         reg = <0 0xe6e35000 0 8>;
1301                         #pwm-cells = <2>;
1302                         clocks = <&cpg CPG_MOD 523>;
1303                         resets = <&cpg 523>;
1304                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1305                         status = "disabled";
1306                 };
1307
1308                 pwm6: pwm@e6e36000 {
1309                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1310                         reg = <0 0xe6e36000 0 8>;
1311                         #pwm-cells = <2>;
1312                         clocks = <&cpg CPG_MOD 523>;
1313                         resets = <&cpg 523>;
1314                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1315                         status = "disabled";
1316                 };
1317
1318                 scif0: serial@e6e60000 {
1319                         compatible = "renesas,scif-r8a77961",
1320                                      "renesas,rcar-gen3-scif", "renesas,scif";
1321                         reg = <0 0xe6e60000 0 64>;
1322                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1323                         clocks = <&cpg CPG_MOD 207>,
1324                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1325                                  <&scif_clk>;
1326                         clock-names = "fck", "brg_int", "scif_clk";
1327                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1328                                <&dmac2 0x51>, <&dmac2 0x50>;
1329                         dma-names = "tx", "rx", "tx", "rx";
1330                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1331                         resets = <&cpg 207>;
1332                         status = "disabled";
1333                 };
1334
1335                 scif1: serial@e6e68000 {
1336                         compatible = "renesas,scif-r8a77961",
1337                                      "renesas,rcar-gen3-scif", "renesas,scif";
1338                         reg = <0 0xe6e68000 0 64>;
1339                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1340                         clocks = <&cpg CPG_MOD 206>,
1341                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1342                                  <&scif_clk>;
1343                         clock-names = "fck", "brg_int", "scif_clk";
1344                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1345                                <&dmac2 0x53>, <&dmac2 0x52>;
1346                         dma-names = "tx", "rx", "tx", "rx";
1347                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1348                         resets = <&cpg 206>;
1349                         status = "disabled";
1350                 };
1351
1352                 scif2: serial@e6e88000 {
1353                         compatible = "renesas,scif-r8a77961",
1354                                      "renesas,rcar-gen3-scif", "renesas,scif";
1355                         reg = <0 0xe6e88000 0 64>;
1356                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1357                         clocks = <&cpg CPG_MOD 310>,
1358                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1359                                  <&scif_clk>;
1360                         clock-names = "fck", "brg_int", "scif_clk";
1361                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1362                                <&dmac2 0x13>, <&dmac2 0x12>;
1363                         dma-names = "tx", "rx", "tx", "rx";
1364                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1365                         resets = <&cpg 310>;
1366                         status = "disabled";
1367                 };
1368
1369                 scif3: serial@e6c50000 {
1370                         compatible = "renesas,scif-r8a77961",
1371                                      "renesas,rcar-gen3-scif", "renesas,scif";
1372                         reg = <0 0xe6c50000 0 64>;
1373                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1374                         clocks = <&cpg CPG_MOD 204>,
1375                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1376                                  <&scif_clk>;
1377                         clock-names = "fck", "brg_int", "scif_clk";
1378                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1379                         dma-names = "tx", "rx";
1380                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1381                         resets = <&cpg 204>;
1382                         status = "disabled";
1383                 };
1384
1385                 scif4: serial@e6c40000 {
1386                         compatible = "renesas,scif-r8a77961",
1387                                      "renesas,rcar-gen3-scif", "renesas,scif";
1388                         reg = <0 0xe6c40000 0 64>;
1389                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1390                         clocks = <&cpg CPG_MOD 203>,
1391                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1392                                  <&scif_clk>;
1393                         clock-names = "fck", "brg_int", "scif_clk";
1394                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1395                         dma-names = "tx", "rx";
1396                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1397                         resets = <&cpg 203>;
1398                         status = "disabled";
1399                 };
1400
1401                 scif5: serial@e6f30000 {
1402                         compatible = "renesas,scif-r8a77961",
1403                                      "renesas,rcar-gen3-scif", "renesas,scif";
1404                         reg = <0 0xe6f30000 0 64>;
1405                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1406                         clocks = <&cpg CPG_MOD 202>,
1407                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1408                                  <&scif_clk>;
1409                         clock-names = "fck", "brg_int", "scif_clk";
1410                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1411                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1412                         dma-names = "tx", "rx", "tx", "rx";
1413                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1414                         resets = <&cpg 202>;
1415                         status = "disabled";
1416                 };
1417
1418                 tpu: pwm@e6e80000 {
1419                         compatible = "renesas,tpu-r8a77961", "renesas,tpu";
1420                         reg = <0 0xe6e80000 0 0x148>;
1421                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1422                         clocks = <&cpg CPG_MOD 304>;
1423                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1424                         resets = <&cpg 304>;
1425                         #pwm-cells = <3>;
1426                         status = "disabled";
1427                 };
1428
1429                 msiof0: spi@e6e90000 {
1430                         compatible = "renesas,msiof-r8a77961",
1431                                      "renesas,rcar-gen3-msiof";
1432                         reg = <0 0xe6e90000 0 0x0064>;
1433                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1434                         clocks = <&cpg CPG_MOD 211>;
1435                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1436                                <&dmac2 0x41>, <&dmac2 0x40>;
1437                         dma-names = "tx", "rx", "tx", "rx";
1438                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1439                         resets = <&cpg 211>;
1440                         #address-cells = <1>;
1441                         #size-cells = <0>;
1442                         status = "disabled";
1443                 };
1444
1445                 msiof1: spi@e6ea0000 {
1446                         compatible = "renesas,msiof-r8a77961",
1447                                      "renesas,rcar-gen3-msiof";
1448                         reg = <0 0xe6ea0000 0 0x0064>;
1449                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1450                         clocks = <&cpg CPG_MOD 210>;
1451                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1452                                <&dmac2 0x43>, <&dmac2 0x42>;
1453                         dma-names = "tx", "rx", "tx", "rx";
1454                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1455                         resets = <&cpg 210>;
1456                         #address-cells = <1>;
1457                         #size-cells = <0>;
1458                         status = "disabled";
1459                 };
1460
1461                 msiof2: spi@e6c00000 {
1462                         compatible = "renesas,msiof-r8a77961",
1463                                      "renesas,rcar-gen3-msiof";
1464                         reg = <0 0xe6c00000 0 0x0064>;
1465                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1466                         clocks = <&cpg CPG_MOD 209>;
1467                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1468                         dma-names = "tx", "rx";
1469                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1470                         resets = <&cpg 209>;
1471                         #address-cells = <1>;
1472                         #size-cells = <0>;
1473                         status = "disabled";
1474                 };
1475
1476                 msiof3: spi@e6c10000 {
1477                         compatible = "renesas,msiof-r8a77961",
1478                                      "renesas,rcar-gen3-msiof";
1479                         reg = <0 0xe6c10000 0 0x0064>;
1480                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1481                         clocks = <&cpg CPG_MOD 208>;
1482                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1483                         dma-names = "tx", "rx";
1484                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1485                         resets = <&cpg 208>;
1486                         #address-cells = <1>;
1487                         #size-cells = <0>;
1488                         status = "disabled";
1489                 };
1490
1491                 vin0: video@e6ef0000 {
1492                         compatible = "renesas,vin-r8a77961";
1493                         reg = <0 0xe6ef0000 0 0x1000>;
1494                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1495                         clocks = <&cpg CPG_MOD 811>;
1496                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1497                         resets = <&cpg 811>;
1498                         renesas,id = <0>;
1499                         status = "disabled";
1500
1501                         ports {
1502                                 #address-cells = <1>;
1503                                 #size-cells = <0>;
1504
1505                                 port@1 {
1506                                         #address-cells = <1>;
1507                                         #size-cells = <0>;
1508
1509                                         reg = <1>;
1510
1511                                         vin0csi20: endpoint@0 {
1512                                                 reg = <0>;
1513                                                 remote-endpoint = <&csi20vin0>;
1514                                         };
1515                                         vin0csi40: endpoint@2 {
1516                                                 reg = <2>;
1517                                                 remote-endpoint = <&csi40vin0>;
1518                                         };
1519                                 };
1520                         };
1521                 };
1522
1523                 vin1: video@e6ef1000 {
1524                         compatible = "renesas,vin-r8a77961";
1525                         reg = <0 0xe6ef1000 0 0x1000>;
1526                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1527                         clocks = <&cpg CPG_MOD 810>;
1528                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1529                         resets = <&cpg 810>;
1530                         renesas,id = <1>;
1531                         status = "disabled";
1532
1533                         ports {
1534                                 #address-cells = <1>;
1535                                 #size-cells = <0>;
1536
1537                                 port@1 {
1538                                         #address-cells = <1>;
1539                                         #size-cells = <0>;
1540
1541                                         reg = <1>;
1542
1543                                         vin1csi20: endpoint@0 {
1544                                                 reg = <0>;
1545                                                 remote-endpoint = <&csi20vin1>;
1546                                         };
1547                                         vin1csi40: endpoint@2 {
1548                                                 reg = <2>;
1549                                                 remote-endpoint = <&csi40vin1>;
1550                                         };
1551                                 };
1552                         };
1553                 };
1554
1555                 vin2: video@e6ef2000 {
1556                         compatible = "renesas,vin-r8a77961";
1557                         reg = <0 0xe6ef2000 0 0x1000>;
1558                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1559                         clocks = <&cpg CPG_MOD 809>;
1560                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1561                         resets = <&cpg 809>;
1562                         renesas,id = <2>;
1563                         status = "disabled";
1564
1565                         ports {
1566                                 #address-cells = <1>;
1567                                 #size-cells = <0>;
1568
1569                                 port@1 {
1570                                         #address-cells = <1>;
1571                                         #size-cells = <0>;
1572
1573                                         reg = <1>;
1574
1575                                         vin2csi20: endpoint@0 {
1576                                                 reg = <0>;
1577                                                 remote-endpoint = <&csi20vin2>;
1578                                         };
1579                                         vin2csi40: endpoint@2 {
1580                                                 reg = <2>;
1581                                                 remote-endpoint = <&csi40vin2>;
1582                                         };
1583                                 };
1584                         };
1585                 };
1586
1587                 vin3: video@e6ef3000 {
1588                         compatible = "renesas,vin-r8a77961";
1589                         reg = <0 0xe6ef3000 0 0x1000>;
1590                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1591                         clocks = <&cpg CPG_MOD 808>;
1592                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1593                         resets = <&cpg 808>;
1594                         renesas,id = <3>;
1595                         status = "disabled";
1596
1597                         ports {
1598                                 #address-cells = <1>;
1599                                 #size-cells = <0>;
1600
1601                                 port@1 {
1602                                         #address-cells = <1>;
1603                                         #size-cells = <0>;
1604
1605                                         reg = <1>;
1606
1607                                         vin3csi20: endpoint@0 {
1608                                                 reg = <0>;
1609                                                 remote-endpoint = <&csi20vin3>;
1610                                         };
1611                                         vin3csi40: endpoint@2 {
1612                                                 reg = <2>;
1613                                                 remote-endpoint = <&csi40vin3>;
1614                                         };
1615                                 };
1616                         };
1617                 };
1618
1619                 vin4: video@e6ef4000 {
1620                         compatible = "renesas,vin-r8a77961";
1621                         reg = <0 0xe6ef4000 0 0x1000>;
1622                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1623                         clocks = <&cpg CPG_MOD 807>;
1624                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1625                         resets = <&cpg 807>;
1626                         renesas,id = <4>;
1627                         status = "disabled";
1628
1629                         ports {
1630                                 #address-cells = <1>;
1631                                 #size-cells = <0>;
1632
1633                                 port@1 {
1634                                         #address-cells = <1>;
1635                                         #size-cells = <0>;
1636
1637                                         reg = <1>;
1638
1639                                         vin4csi20: endpoint@0 {
1640                                                 reg = <0>;
1641                                                 remote-endpoint = <&csi20vin4>;
1642                                         };
1643                                         vin4csi40: endpoint@2 {
1644                                                 reg = <2>;
1645                                                 remote-endpoint = <&csi40vin4>;
1646                                         };
1647                                 };
1648                         };
1649                 };
1650
1651                 vin5: video@e6ef5000 {
1652                         compatible = "renesas,vin-r8a77961";
1653                         reg = <0 0xe6ef5000 0 0x1000>;
1654                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1655                         clocks = <&cpg CPG_MOD 806>;
1656                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1657                         resets = <&cpg 806>;
1658                         renesas,id = <5>;
1659                         status = "disabled";
1660
1661                         ports {
1662                                 #address-cells = <1>;
1663                                 #size-cells = <0>;
1664
1665                                 port@1 {
1666                                         #address-cells = <1>;
1667                                         #size-cells = <0>;
1668
1669                                         reg = <1>;
1670
1671                                         vin5csi20: endpoint@0 {
1672                                                 reg = <0>;
1673                                                 remote-endpoint = <&csi20vin5>;
1674                                         };
1675                                         vin5csi40: endpoint@2 {
1676                                                 reg = <2>;
1677                                                 remote-endpoint = <&csi40vin5>;
1678                                         };
1679                                 };
1680                         };
1681                 };
1682
1683                 vin6: video@e6ef6000 {
1684                         compatible = "renesas,vin-r8a77961";
1685                         reg = <0 0xe6ef6000 0 0x1000>;
1686                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1687                         clocks = <&cpg CPG_MOD 805>;
1688                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1689                         resets = <&cpg 805>;
1690                         renesas,id = <6>;
1691                         status = "disabled";
1692
1693                         ports {
1694                                 #address-cells = <1>;
1695                                 #size-cells = <0>;
1696
1697                                 port@1 {
1698                                         #address-cells = <1>;
1699                                         #size-cells = <0>;
1700
1701                                         reg = <1>;
1702
1703                                         vin6csi20: endpoint@0 {
1704                                                 reg = <0>;
1705                                                 remote-endpoint = <&csi20vin6>;
1706                                         };
1707                                         vin6csi40: endpoint@2 {
1708                                                 reg = <2>;
1709                                                 remote-endpoint = <&csi40vin6>;
1710                                         };
1711                                 };
1712                         };
1713                 };
1714
1715                 vin7: video@e6ef7000 {
1716                         compatible = "renesas,vin-r8a77961";
1717                         reg = <0 0xe6ef7000 0 0x1000>;
1718                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1719                         clocks = <&cpg CPG_MOD 804>;
1720                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1721                         resets = <&cpg 804>;
1722                         renesas,id = <7>;
1723                         status = "disabled";
1724
1725                         ports {
1726                                 #address-cells = <1>;
1727                                 #size-cells = <0>;
1728
1729                                 port@1 {
1730                                         #address-cells = <1>;
1731                                         #size-cells = <0>;
1732
1733                                         reg = <1>;
1734
1735                                         vin7csi20: endpoint@0 {
1736                                                 reg = <0>;
1737                                                 remote-endpoint = <&csi20vin7>;
1738                                         };
1739                                         vin7csi40: endpoint@2 {
1740                                                 reg = <2>;
1741                                                 remote-endpoint = <&csi40vin7>;
1742                                         };
1743                                 };
1744                         };
1745                 };
1746
1747                 rcar_sound: sound@ec500000 {
1748                         /*
1749                          * #sound-dai-cells is required if simple-card
1750                          *
1751                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1752                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1753                          */
1754                         /*
1755                          * #clock-cells is required for audio_clkout0/1/2/3
1756                          *
1757                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1758                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1759                          */
1760                         compatible = "renesas,rcar_sound-r8a77961", "renesas,rcar_sound-gen3";
1761                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1762                               <0 0xec5a0000 0 0x100>,  /* ADG */
1763                               <0 0xec540000 0 0x1000>, /* SSIU */
1764                               <0 0xec541000 0 0x280>,  /* SSI */
1765                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1766                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1767
1768                         clocks = <&cpg CPG_MOD 1005>,
1769                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1770                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1771                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1772                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1773                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1774                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1775                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1776                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1777                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1778                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1779                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1780                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1781                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1782                                  <&audio_clk_a>, <&audio_clk_b>,
1783                                  <&audio_clk_c>,
1784                                  <&cpg CPG_MOD 922>;
1785                         clock-names = "ssi-all",
1786                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1787                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1788                                       "ssi.1", "ssi.0",
1789                                       "src.9", "src.8", "src.7", "src.6",
1790                                       "src.5", "src.4", "src.3", "src.2",
1791                                       "src.1", "src.0",
1792                                       "mix.1", "mix.0",
1793                                       "ctu.1", "ctu.0",
1794                                       "dvc.0", "dvc.1",
1795                                       "clk_a", "clk_b", "clk_c", "clk_i";
1796                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1797                         resets = <&cpg 1005>,
1798                                  <&cpg 1006>, <&cpg 1007>,
1799                                  <&cpg 1008>, <&cpg 1009>,
1800                                  <&cpg 1010>, <&cpg 1011>,
1801                                  <&cpg 1012>, <&cpg 1013>,
1802                                  <&cpg 1014>, <&cpg 1015>;
1803                         reset-names = "ssi-all",
1804                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1805                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1806                                       "ssi.1", "ssi.0";
1807                         status = "disabled";
1808
1809                         rcar_sound,ctu {
1810                                 ctu00: ctu-0 { };
1811                                 ctu01: ctu-1 { };
1812                                 ctu02: ctu-2 { };
1813                                 ctu03: ctu-3 { };
1814                                 ctu10: ctu-4 { };
1815                                 ctu11: ctu-5 { };
1816                                 ctu12: ctu-6 { };
1817                                 ctu13: ctu-7 { };
1818                         };
1819
1820                         rcar_sound,dvc {
1821                                 dvc0: dvc-0 {
1822                                         dmas = <&audma1 0xbc>;
1823                                         dma-names = "tx";
1824                                 };
1825                                 dvc1: dvc-1 {
1826                                         dmas = <&audma1 0xbe>;
1827                                         dma-names = "tx";
1828                                 };
1829                         };
1830
1831                         rcar_sound,mix {
1832                                 mix0: mix-0 { };
1833                                 mix1: mix-1 { };
1834                         };
1835
1836                         rcar_sound,src {
1837                                 src0: src-0 {
1838                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1839                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1840                                         dma-names = "rx", "tx";
1841                                 };
1842                                 src1: src-1 {
1843                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1844                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1845                                         dma-names = "rx", "tx";
1846                                 };
1847                                 src2: src-2 {
1848                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1849                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1850                                         dma-names = "rx", "tx";
1851                                 };
1852                                 src3: src-3 {
1853                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1854                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1855                                         dma-names = "rx", "tx";
1856                                 };
1857                                 src4: src-4 {
1858                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1859                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1860                                         dma-names = "rx", "tx";
1861                                 };
1862                                 src5: src-5 {
1863                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1864                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1865                                         dma-names = "rx", "tx";
1866                                 };
1867                                 src6: src-6 {
1868                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1869                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1870                                         dma-names = "rx", "tx";
1871                                 };
1872                                 src7: src-7 {
1873                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1874                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1875                                         dma-names = "rx", "tx";
1876                                 };
1877                                 src8: src-8 {
1878                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1879                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1880                                         dma-names = "rx", "tx";
1881                                 };
1882                                 src9: src-9 {
1883                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1884                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1885                                         dma-names = "rx", "tx";
1886                                 };
1887                         };
1888
1889                         rcar_sound,ssi {
1890                                 ssi0: ssi-0 {
1891                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1892                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
1893                                         dma-names = "rx", "tx";
1894                                 };
1895                                 ssi1: ssi-1 {
1896                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1897                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
1898                                         dma-names = "rx", "tx";
1899                                 };
1900                                 ssi2: ssi-2 {
1901                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1902                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
1903                                         dma-names = "rx", "tx";
1904                                 };
1905                                 ssi3: ssi-3 {
1906                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1907                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
1908                                         dma-names = "rx", "tx";
1909                                 };
1910                                 ssi4: ssi-4 {
1911                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1912                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
1913                                         dma-names = "rx", "tx";
1914                                 };
1915                                 ssi5: ssi-5 {
1916                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1917                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1918                                         dma-names = "rx", "tx";
1919                                 };
1920                                 ssi6: ssi-6 {
1921                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1922                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1923                                         dma-names = "rx", "tx";
1924                                 };
1925                                 ssi7: ssi-7 {
1926                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1927                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
1928                                         dma-names = "rx", "tx";
1929                                 };
1930                                 ssi8: ssi-8 {
1931                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1932                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
1933                                         dma-names = "rx", "tx";
1934                                 };
1935                                 ssi9: ssi-9 {
1936                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1937                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
1938                                         dma-names = "rx", "tx";
1939                                 };
1940                         };
1941
1942                         rcar_sound,ssiu {
1943                                 ssiu00: ssiu-0 {
1944                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
1945                                         dma-names = "rx", "tx";
1946                                 };
1947                                 ssiu01: ssiu-1 {
1948                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
1949                                         dma-names = "rx", "tx";
1950                                 };
1951                                 ssiu02: ssiu-2 {
1952                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
1953                                         dma-names = "rx", "tx";
1954                                 };
1955                                 ssiu03: ssiu-3 {
1956                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
1957                                         dma-names = "rx", "tx";
1958                                 };
1959                                 ssiu04: ssiu-4 {
1960                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
1961                                         dma-names = "rx", "tx";
1962                                 };
1963                                 ssiu05: ssiu-5 {
1964                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
1965                                         dma-names = "rx", "tx";
1966                                 };
1967                                 ssiu06: ssiu-6 {
1968                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
1969                                         dma-names = "rx", "tx";
1970                                 };
1971                                 ssiu07: ssiu-7 {
1972                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
1973                                         dma-names = "rx", "tx";
1974                                 };
1975                                 ssiu10: ssiu-8 {
1976                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
1977                                         dma-names = "rx", "tx";
1978                                 };
1979                                 ssiu11: ssiu-9 {
1980                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1981                                         dma-names = "rx", "tx";
1982                                 };
1983                                 ssiu12: ssiu-10 {
1984                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
1985                                         dma-names = "rx", "tx";
1986                                 };
1987                                 ssiu13: ssiu-11 {
1988                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
1989                                         dma-names = "rx", "tx";
1990                                 };
1991                                 ssiu14: ssiu-12 {
1992                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
1993                                         dma-names = "rx", "tx";
1994                                 };
1995                                 ssiu15: ssiu-13 {
1996                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
1997                                         dma-names = "rx", "tx";
1998                                 };
1999                                 ssiu16: ssiu-14 {
2000                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2001                                         dma-names = "rx", "tx";
2002                                 };
2003                                 ssiu17: ssiu-15 {
2004                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2005                                         dma-names = "rx", "tx";
2006                                 };
2007                                 ssiu20: ssiu-16 {
2008                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
2009                                         dma-names = "rx", "tx";
2010                                 };
2011                                 ssiu21: ssiu-17 {
2012                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
2013                                         dma-names = "rx", "tx";
2014                                 };
2015                                 ssiu22: ssiu-18 {
2016                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2017                                         dma-names = "rx", "tx";
2018                                 };
2019                                 ssiu23: ssiu-19 {
2020                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2021                                         dma-names = "rx", "tx";
2022                                 };
2023                                 ssiu24: ssiu-20 {
2024                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2025                                         dma-names = "rx", "tx";
2026                                 };
2027                                 ssiu25: ssiu-21 {
2028                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2029                                         dma-names = "rx", "tx";
2030                                 };
2031                                 ssiu26: ssiu-22 {
2032                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
2033                                         dma-names = "rx", "tx";
2034                                 };
2035                                 ssiu27: ssiu-23 {
2036                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2037                                         dma-names = "rx", "tx";
2038                                 };
2039                                 ssiu30: ssiu-24 {
2040                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
2041                                         dma-names = "rx", "tx";
2042                                 };
2043                                 ssiu31: ssiu-25 {
2044                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
2045                                         dma-names = "rx", "tx";
2046                                 };
2047                                 ssiu32: ssiu-26 {
2048                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
2049                                         dma-names = "rx", "tx";
2050                                 };
2051                                 ssiu33: ssiu-27 {
2052                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
2053                                         dma-names = "rx", "tx";
2054                                 };
2055                                 ssiu34: ssiu-28 {
2056                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
2057                                         dma-names = "rx", "tx";
2058                                 };
2059                                 ssiu35: ssiu-29 {
2060                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
2061                                         dma-names = "rx", "tx";
2062                                 };
2063                                 ssiu36: ssiu-30 {
2064                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2065                                         dma-names = "rx", "tx";
2066                                 };
2067                                 ssiu37: ssiu-31 {
2068                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2069                                         dma-names = "rx", "tx";
2070                                 };
2071                                 ssiu40: ssiu-32 {
2072                                         dmas = <&audma0 0x71>, <&audma1 0x72>;
2073                                         dma-names = "rx", "tx";
2074                                 };
2075                                 ssiu41: ssiu-33 {
2076                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2077                                         dma-names = "rx", "tx";
2078                                 };
2079                                 ssiu42: ssiu-34 {
2080                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2081                                         dma-names = "rx", "tx";
2082                                 };
2083                                 ssiu43: ssiu-35 {
2084                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2085                                         dma-names = "rx", "tx";
2086                                 };
2087                                 ssiu44: ssiu-36 {
2088                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2089                                         dma-names = "rx", "tx";
2090                                 };
2091                                 ssiu45: ssiu-37 {
2092                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2093                                         dma-names = "rx", "tx";
2094                                 };
2095                                 ssiu46: ssiu-38 {
2096                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2097                                         dma-names = "rx", "tx";
2098                                 };
2099                                 ssiu47: ssiu-39 {
2100                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2101                                         dma-names = "rx", "tx";
2102                                 };
2103                                 ssiu50: ssiu-40 {
2104                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2105                                         dma-names = "rx", "tx";
2106                                 };
2107                                 ssiu60: ssiu-41 {
2108                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2109                                         dma-names = "rx", "tx";
2110                                 };
2111                                 ssiu70: ssiu-42 {
2112                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2113                                         dma-names = "rx", "tx";
2114                                 };
2115                                 ssiu80: ssiu-43 {
2116                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2117                                         dma-names = "rx", "tx";
2118                                 };
2119                                 ssiu90: ssiu-44 {
2120                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2121                                         dma-names = "rx", "tx";
2122                                 };
2123                                 ssiu91: ssiu-45 {
2124                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2125                                         dma-names = "rx", "tx";
2126                                 };
2127                                 ssiu92: ssiu-46 {
2128                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2129                                         dma-names = "rx", "tx";
2130                                 };
2131                                 ssiu93: ssiu-47 {
2132                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2133                                         dma-names = "rx", "tx";
2134                                 };
2135                                 ssiu94: ssiu-48 {
2136                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2137                                         dma-names = "rx", "tx";
2138                                 };
2139                                 ssiu95: ssiu-49 {
2140                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2141                                         dma-names = "rx", "tx";
2142                                 };
2143                                 ssiu96: ssiu-50 {
2144                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2145                                         dma-names = "rx", "tx";
2146                                 };
2147                                 ssiu97: ssiu-51 {
2148                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2149                                         dma-names = "rx", "tx";
2150                                 };
2151                         };
2152                 };
2153
2154                 mlp: mlp@ec520000 {
2155                         compatible = "renesas,r8a77961-mlp",
2156                                      "renesas,rcar-gen3-mlp";
2157                         reg = <0 0xec520000 0 0x800>;
2158                         interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2159                                 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2160                         clocks = <&cpg CPG_MOD 802>;
2161                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2162                         resets = <&cpg 802>;
2163                         status = "disabled";
2164                 };
2165
2166                 audma0: dma-controller@ec700000 {
2167                         compatible = "renesas,dmac-r8a77961",
2168                                      "renesas,rcar-dmac";
2169                         reg = <0 0xec700000 0 0x10000>;
2170                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2171                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2172                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2173                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2174                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2175                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2176                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2177                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2178                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2179                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2180                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2181                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2182                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2183                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2184                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2185                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2186                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2187                         interrupt-names = "error",
2188                                         "ch0", "ch1", "ch2", "ch3",
2189                                         "ch4", "ch5", "ch6", "ch7",
2190                                         "ch8", "ch9", "ch10", "ch11",
2191                                         "ch12", "ch13", "ch14", "ch15";
2192                         clocks = <&cpg CPG_MOD 502>;
2193                         clock-names = "fck";
2194                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2195                         resets = <&cpg 502>;
2196                         #dma-cells = <1>;
2197                         dma-channels = <16>;
2198                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2199                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2200                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2201                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2202                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2203                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2204                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2205                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2206                 };
2207
2208                 audma1: dma-controller@ec720000 {
2209                         compatible = "renesas,dmac-r8a77961",
2210                                      "renesas,rcar-dmac";
2211                         reg = <0 0xec720000 0 0x10000>;
2212                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2213                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2214                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2215                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2216                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2217                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2218                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2219                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2220                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2221                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2222                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2223                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2224                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2225                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2226                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2227                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2228                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2229                         interrupt-names = "error",
2230                                         "ch0", "ch1", "ch2", "ch3",
2231                                         "ch4", "ch5", "ch6", "ch7",
2232                                         "ch8", "ch9", "ch10", "ch11",
2233                                         "ch12", "ch13", "ch14", "ch15";
2234                         clocks = <&cpg CPG_MOD 501>;
2235                         clock-names = "fck";
2236                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2237                         resets = <&cpg 501>;
2238                         #dma-cells = <1>;
2239                         dma-channels = <16>;
2240                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2241                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2242                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2243                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2244                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2245                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2246                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2247                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2248                 };
2249
2250                 xhci0: usb@ee000000 {
2251                         compatible = "renesas,xhci-r8a77961",
2252                                      "renesas,rcar-gen3-xhci";
2253                         reg = <0 0xee000000 0 0xc00>;
2254                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2255                         clocks = <&cpg CPG_MOD 328>;
2256                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2257                         resets = <&cpg 328>;
2258                         status = "disabled";
2259                 };
2260
2261                 usb3_peri0: usb@ee020000 {
2262                         compatible = "renesas,r8a77961-usb3-peri",
2263                                      "renesas,rcar-gen3-usb3-peri";
2264                         reg = <0 0xee020000 0 0x400>;
2265                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2266                         clocks = <&cpg CPG_MOD 328>;
2267                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2268                         resets = <&cpg 328>;
2269                         status = "disabled";
2270                 };
2271
2272                 ohci0: usb@ee080000 {
2273                         compatible = "generic-ohci";
2274                         reg = <0 0xee080000 0 0x100>;
2275                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2276                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2277                         phys = <&usb2_phy0 1>;
2278                         phy-names = "usb";
2279                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2280                         resets = <&cpg 703>, <&cpg 704>;
2281                         status = "disabled";
2282                 };
2283
2284                 ohci1: usb@ee0a0000 {
2285                         compatible = "generic-ohci";
2286                         reg = <0 0xee0a0000 0 0x100>;
2287                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2288                         clocks = <&cpg CPG_MOD 702>;
2289                         phys = <&usb2_phy1 1>;
2290                         phy-names = "usb";
2291                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2292                         resets = <&cpg 702>;
2293                         status = "disabled";
2294                 };
2295
2296                 ehci0: usb@ee080100 {
2297                         compatible = "generic-ehci";
2298                         reg = <0 0xee080100 0 0x100>;
2299                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2300                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2301                         phys = <&usb2_phy0 2>;
2302                         phy-names = "usb";
2303                         companion = <&ohci0>;
2304                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2305                         resets = <&cpg 703>, <&cpg 704>;
2306                         status = "disabled";
2307                 };
2308
2309                 ehci1: usb@ee0a0100 {
2310                         compatible = "generic-ehci";
2311                         reg = <0 0xee0a0100 0 0x100>;
2312                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2313                         clocks = <&cpg CPG_MOD 702>;
2314                         phys = <&usb2_phy1 2>;
2315                         phy-names = "usb";
2316                         companion = <&ohci1>;
2317                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2318                         resets = <&cpg 702>;
2319                         status = "disabled";
2320                 };
2321
2322                 usb2_phy0: usb-phy@ee080200 {
2323                         compatible = "renesas,usb2-phy-r8a77961",
2324                                      "renesas,rcar-gen3-usb2-phy";
2325                         reg = <0 0xee080200 0 0x700>;
2326                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2327                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2328                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2329                         resets = <&cpg 703>, <&cpg 704>;
2330                         #phy-cells = <1>;
2331                         status = "disabled";
2332                 };
2333
2334                 usb2_phy1: usb-phy@ee0a0200 {
2335                         compatible = "renesas,usb2-phy-r8a77961",
2336                                      "renesas,rcar-gen3-usb2-phy";
2337                         reg = <0 0xee0a0200 0 0x700>;
2338                         clocks = <&cpg CPG_MOD 702>;
2339                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2340                         resets = <&cpg 702>;
2341                         #phy-cells = <1>;
2342                         status = "disabled";
2343                 };
2344
2345                 sdhi0: mmc@ee100000 {
2346                         compatible = "renesas,sdhi-r8a77961",
2347                                      "renesas,rcar-gen3-sdhi";
2348                         reg = <0 0xee100000 0 0x2000>;
2349                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2350                         clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77961_CLK_SD0H>;
2351                         clock-names = "core", "clkh";
2352                         max-frequency = <200000000>;
2353                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2354                         resets = <&cpg 314>;
2355                         iommus = <&ipmmu_ds1 32>;
2356                         status = "disabled";
2357                 };
2358
2359                 sdhi1: mmc@ee120000 {
2360                         compatible = "renesas,sdhi-r8a77961",
2361                                      "renesas,rcar-gen3-sdhi";
2362                         reg = <0 0xee120000 0 0x2000>;
2363                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2364                         clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77961_CLK_SD1H>;
2365                         clock-names = "core", "clkh";
2366                         max-frequency = <200000000>;
2367                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2368                         resets = <&cpg 313>;
2369                         iommus = <&ipmmu_ds1 33>;
2370                         status = "disabled";
2371                 };
2372
2373                 sdhi2: mmc@ee140000 {
2374                         compatible = "renesas,sdhi-r8a77961",
2375                                      "renesas,rcar-gen3-sdhi";
2376                         reg = <0 0xee140000 0 0x2000>;
2377                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2378                         clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77961_CLK_SD2H>;
2379                         clock-names = "core", "clkh";
2380                         max-frequency = <200000000>;
2381                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2382                         resets = <&cpg 312>;
2383                         iommus = <&ipmmu_ds1 34>;
2384                         status = "disabled";
2385                 };
2386
2387                 sdhi3: mmc@ee160000 {
2388                         compatible = "renesas,sdhi-r8a77961",
2389                                      "renesas,rcar-gen3-sdhi";
2390                         reg = <0 0xee160000 0 0x2000>;
2391                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2392                         clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77961_CLK_SD3H>;
2393                         clock-names = "core", "clkh";
2394                         max-frequency = <200000000>;
2395                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2396                         resets = <&cpg 311>;
2397                         iommus = <&ipmmu_ds1 35>;
2398                         status = "disabled";
2399                 };
2400
2401                 rpc: spi@ee200000 {
2402                         compatible = "renesas,r8a77961-rpc-if",
2403                                      "renesas,rcar-gen3-rpc-if";
2404                         reg = <0 0xee200000 0 0x200>,
2405                               <0 0x08000000 0 0x04000000>,
2406                               <0 0xee208000 0 0x100>;
2407                         reg-names = "regs", "dirmap", "wbuf";
2408                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2409                         clocks = <&cpg CPG_MOD 917>;
2410                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2411                         resets = <&cpg 917>;
2412                         #address-cells = <1>;
2413                         #size-cells = <0>;
2414                         status = "disabled";
2415                 };
2416
2417                 gic: interrupt-controller@f1010000 {
2418                         compatible = "arm,gic-400";
2419                         #interrupt-cells = <3>;
2420                         #address-cells = <0>;
2421                         interrupt-controller;
2422                         reg = <0x0 0xf1010000 0 0x1000>,
2423                               <0x0 0xf1020000 0 0x20000>,
2424                               <0x0 0xf1040000 0 0x20000>,
2425                               <0x0 0xf1060000 0 0x20000>;
2426                         interrupts = <GIC_PPI 9
2427                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2428                         clocks = <&cpg CPG_MOD 408>;
2429                         clock-names = "clk";
2430                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2431                         resets = <&cpg 408>;
2432                 };
2433
2434                 pciec0: pcie@fe000000 {
2435                         compatible = "renesas,pcie-r8a77961",
2436                                      "renesas,pcie-rcar-gen3";
2437                         reg = <0 0xfe000000 0 0x80000>;
2438                         #address-cells = <3>;
2439                         #size-cells = <2>;
2440                         bus-range = <0x00 0xff>;
2441                         device_type = "pci";
2442                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2443                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2444                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2445                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2446                         /* Map all possible DDR/IOMMU as inbound ranges */
2447                         dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2448                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2449                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2450                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2451                         #interrupt-cells = <1>;
2452                         interrupt-map-mask = <0 0 0 0>;
2453                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2454                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2455                         clock-names = "pcie", "pcie_bus";
2456                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2457                         resets = <&cpg 319>;
2458                         iommu-map = <0 &ipmmu_hc 0 1>;
2459                         iommu-map-mask = <0>;
2460                         status = "disabled";
2461                 };
2462
2463                 pciec1: pcie@ee800000 {
2464                         compatible = "renesas,pcie-r8a77961",
2465                                      "renesas,pcie-rcar-gen3";
2466                         reg = <0 0xee800000 0 0x80000>;
2467                         #address-cells = <3>;
2468                         #size-cells = <2>;
2469                         bus-range = <0x00 0xff>;
2470                         device_type = "pci";
2471                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2472                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2473                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2474                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2475                         /* Map all possible DDR/IOMMU as inbound ranges */
2476                         dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
2477                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2478                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2479                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2480                         #interrupt-cells = <1>;
2481                         interrupt-map-mask = <0 0 0 0>;
2482                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2483                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2484                         clock-names = "pcie", "pcie_bus";
2485                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2486                         resets = <&cpg 318>;
2487                         iommu-map = <0 &ipmmu_hc 1 1>;
2488                         iommu-map-mask = <0>;
2489                         status = "disabled";
2490                 };
2491
2492                 fcpf0: fcp@fe950000 {
2493                         compatible = "renesas,fcpf";
2494                         reg = <0 0xfe950000 0 0x200>;
2495                         clocks = <&cpg CPG_MOD 615>;
2496                         power-domains = <&sysc R8A77961_PD_A3VC>;
2497                         resets = <&cpg 615>;
2498                 };
2499
2500                 fcpvb0: fcp@fe96f000 {
2501                         compatible = "renesas,fcpv";
2502                         reg = <0 0xfe96f000 0 0x200>;
2503                         clocks = <&cpg CPG_MOD 607>;
2504                         power-domains = <&sysc R8A77961_PD_A3VC>;
2505                         resets = <&cpg 607>;
2506                 };
2507
2508                 fcpvi0: fcp@fe9af000 {
2509                         compatible = "renesas,fcpv";
2510                         reg = <0 0xfe9af000 0 0x200>;
2511                         clocks = <&cpg CPG_MOD 611>;
2512                         power-domains = <&sysc R8A77961_PD_A3VC>;
2513                         resets = <&cpg 611>;
2514                         iommus = <&ipmmu_vc0 19>;
2515                 };
2516
2517                 fcpvd0: fcp@fea27000 {
2518                         compatible = "renesas,fcpv";
2519                         reg = <0 0xfea27000 0 0x200>;
2520                         clocks = <&cpg CPG_MOD 603>;
2521                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2522                         resets = <&cpg 603>;
2523                         iommus = <&ipmmu_vi0 8>;
2524                 };
2525
2526                 fcpvd1: fcp@fea2f000 {
2527                         compatible = "renesas,fcpv";
2528                         reg = <0 0xfea2f000 0 0x200>;
2529                         clocks = <&cpg CPG_MOD 602>;
2530                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2531                         resets = <&cpg 602>;
2532                         iommus = <&ipmmu_vi0 9>;
2533                 };
2534
2535                 fcpvd2: fcp@fea37000 {
2536                         compatible = "renesas,fcpv";
2537                         reg = <0 0xfea37000 0 0x200>;
2538                         clocks = <&cpg CPG_MOD 601>;
2539                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2540                         resets = <&cpg 601>;
2541                         iommus = <&ipmmu_vi0 10>;
2542                 };
2543
2544                 vspb: vsp@fe960000 {
2545                         compatible = "renesas,vsp2";
2546                         reg = <0 0xfe960000 0 0x8000>;
2547                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2548                         clocks = <&cpg CPG_MOD 626>;
2549                         power-domains = <&sysc R8A77961_PD_A3VC>;
2550                         resets = <&cpg 626>;
2551
2552                         renesas,fcp = <&fcpvb0>;
2553                 };
2554
2555                 vspd0: vsp@fea20000 {
2556                         compatible = "renesas,vsp2";
2557                         reg = <0 0xfea20000 0 0x5000>;
2558                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2559                         clocks = <&cpg CPG_MOD 623>;
2560                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2561                         resets = <&cpg 623>;
2562
2563                         renesas,fcp = <&fcpvd0>;
2564                 };
2565
2566                 vspd1: vsp@fea28000 {
2567                         compatible = "renesas,vsp2";
2568                         reg = <0 0xfea28000 0 0x5000>;
2569                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2570                         clocks = <&cpg CPG_MOD 622>;
2571                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2572                         resets = <&cpg 622>;
2573
2574                         renesas,fcp = <&fcpvd1>;
2575                 };
2576
2577                 vspd2: vsp@fea30000 {
2578                         compatible = "renesas,vsp2";
2579                         reg = <0 0xfea30000 0 0x5000>;
2580                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2581                         clocks = <&cpg CPG_MOD 621>;
2582                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2583                         resets = <&cpg 621>;
2584
2585                         renesas,fcp = <&fcpvd2>;
2586                 };
2587
2588                 vspi0: vsp@fe9a0000 {
2589                         compatible = "renesas,vsp2";
2590                         reg = <0 0xfe9a0000 0 0x8000>;
2591                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2592                         clocks = <&cpg CPG_MOD 631>;
2593                         power-domains = <&sysc R8A77961_PD_A3VC>;
2594                         resets = <&cpg 631>;
2595
2596                         renesas,fcp = <&fcpvi0>;
2597                 };
2598
2599                 csi20: csi2@fea80000 {
2600                         compatible = "renesas,r8a77961-csi2";
2601                         reg = <0 0xfea80000 0 0x10000>;
2602                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2603                         clocks = <&cpg CPG_MOD 714>;
2604                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2605                         resets = <&cpg 714>;
2606                         status = "disabled";
2607
2608                         ports {
2609                                 #address-cells = <1>;
2610                                 #size-cells = <0>;
2611
2612                                 port@0 {
2613                                         reg = <0>;
2614                                 };
2615
2616                                 port@1 {
2617                                         #address-cells = <1>;
2618                                         #size-cells = <0>;
2619
2620                                         reg = <1>;
2621
2622                                         csi20vin0: endpoint@0 {
2623                                                 reg = <0>;
2624                                                 remote-endpoint = <&vin0csi20>;
2625                                         };
2626                                         csi20vin1: endpoint@1 {
2627                                                 reg = <1>;
2628                                                 remote-endpoint = <&vin1csi20>;
2629                                         };
2630                                         csi20vin2: endpoint@2 {
2631                                                 reg = <2>;
2632                                                 remote-endpoint = <&vin2csi20>;
2633                                         };
2634                                         csi20vin3: endpoint@3 {
2635                                                 reg = <3>;
2636                                                 remote-endpoint = <&vin3csi20>;
2637                                         };
2638                                         csi20vin4: endpoint@4 {
2639                                                 reg = <4>;
2640                                                 remote-endpoint = <&vin4csi20>;
2641                                         };
2642                                         csi20vin5: endpoint@5 {
2643                                                 reg = <5>;
2644                                                 remote-endpoint = <&vin5csi20>;
2645                                         };
2646                                         csi20vin6: endpoint@6 {
2647                                                 reg = <6>;
2648                                                 remote-endpoint = <&vin6csi20>;
2649                                         };
2650                                         csi20vin7: endpoint@7 {
2651                                                 reg = <7>;
2652                                                 remote-endpoint = <&vin7csi20>;
2653                                         };
2654                                 };
2655                         };
2656                 };
2657
2658                 csi40: csi2@feaa0000 {
2659                         compatible = "renesas,r8a77961-csi2";
2660                         reg = <0 0xfeaa0000 0 0x10000>;
2661                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2662                         clocks = <&cpg CPG_MOD 716>;
2663                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2664                         resets = <&cpg 716>;
2665                         status = "disabled";
2666
2667                         ports {
2668                                 #address-cells = <1>;
2669                                 #size-cells = <0>;
2670
2671                                 port@0 {
2672                                         reg = <0>;
2673                                 };
2674
2675                                 port@1 {
2676                                         #address-cells = <1>;
2677                                         #size-cells = <0>;
2678
2679                                         reg = <1>;
2680
2681                                         csi40vin0: endpoint@0 {
2682                                                 reg = <0>;
2683                                                 remote-endpoint = <&vin0csi40>;
2684                                         };
2685                                         csi40vin1: endpoint@1 {
2686                                                 reg = <1>;
2687                                                 remote-endpoint = <&vin1csi40>;
2688                                         };
2689                                         csi40vin2: endpoint@2 {
2690                                                 reg = <2>;
2691                                                 remote-endpoint = <&vin2csi40>;
2692                                         };
2693                                         csi40vin3: endpoint@3 {
2694                                                 reg = <3>;
2695                                                 remote-endpoint = <&vin3csi40>;
2696                                         };
2697                                         csi40vin4: endpoint@4 {
2698                                                 reg = <4>;
2699                                                 remote-endpoint = <&vin4csi40>;
2700                                         };
2701                                         csi40vin5: endpoint@5 {
2702                                                 reg = <5>;
2703                                                 remote-endpoint = <&vin5csi40>;
2704                                         };
2705                                         csi40vin6: endpoint@6 {
2706                                                 reg = <6>;
2707                                                 remote-endpoint = <&vin6csi40>;
2708                                         };
2709                                         csi40vin7: endpoint@7 {
2710                                                 reg = <7>;
2711                                                 remote-endpoint = <&vin7csi40>;
2712                                         };
2713                                 };
2714
2715                         };
2716                 };
2717
2718                 hdmi0: hdmi@fead0000 {
2719                         compatible = "renesas,r8a77961-hdmi", "renesas,rcar-gen3-hdmi";
2720                         reg = <0 0xfead0000 0 0x10000>;
2721                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2722                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A77961_CLK_HDMI>;
2723                         clock-names = "iahb", "isfr";
2724                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2725                         resets = <&cpg 729>;
2726                         status = "disabled";
2727
2728                         ports {
2729                                 #address-cells = <1>;
2730                                 #size-cells = <0>;
2731                                 port@0 {
2732                                         reg = <0>;
2733                                         dw_hdmi0_in: endpoint {
2734                                                 remote-endpoint = <&du_out_hdmi0>;
2735                                         };
2736                                 };
2737                                 port@1 {
2738                                         reg = <1>;
2739                                 };
2740                                 port@2 {
2741                                         /* HDMI sound */
2742                                         reg = <2>;
2743                                 };
2744                         };
2745                 };
2746
2747                 du: display@feb00000 {
2748                         compatible = "renesas,du-r8a77961";
2749                         reg = <0 0xfeb00000 0 0x70000>;
2750                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2751                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2752                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2753                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2754                                  <&cpg CPG_MOD 722>;
2755                         clock-names = "du.0", "du.1", "du.2";
2756                         resets = <&cpg 724>, <&cpg 722>;
2757                         reset-names = "du.0", "du.2";
2758
2759                         renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2760                         status = "disabled";
2761
2762                         ports {
2763                                 #address-cells = <1>;
2764                                 #size-cells = <0>;
2765
2766                                 port@0 {
2767                                         reg = <0>;
2768                                 };
2769                                 port@1 {
2770                                         reg = <1>;
2771                                         du_out_hdmi0: endpoint {
2772                                                 remote-endpoint = <&dw_hdmi0_in>;
2773                                         };
2774                                 };
2775                                 port@2 {
2776                                         reg = <2>;
2777                                         du_out_lvds0: endpoint {
2778                                                 remote-endpoint = <&lvds0_in>;
2779                                         };
2780                                 };
2781                         };
2782                 };
2783
2784                 lvds0: lvds@feb90000 {
2785                         compatible = "renesas,r8a77961-lvds";
2786                         reg = <0 0xfeb90000 0 0x14>;
2787                         clocks = <&cpg CPG_MOD 727>;
2788                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2789                         resets = <&cpg 727>;
2790                         status = "disabled";
2791
2792                         ports {
2793                                 #address-cells = <1>;
2794                                 #size-cells = <0>;
2795
2796                                 port@0 {
2797                                         reg = <0>;
2798                                         lvds0_in: endpoint {
2799                                                 remote-endpoint = <&du_out_lvds0>;
2800                                         };
2801                                 };
2802                                 port@1 {
2803                                         reg = <1>;
2804                                 };
2805                         };
2806                 };
2807
2808                 prr: chipid@fff00044 {
2809                         compatible = "renesas,prr";
2810                         reg = <0 0xfff00044 0 4>;
2811                 };
2812         };
2813
2814         thermal-zones {
2815                 sensor1_thermal: sensor1-thermal {
2816                         polling-delay-passive = <250>;
2817                         polling-delay = <1000>;
2818                         thermal-sensors = <&tsc 0>;
2819                         sustainable-power = <3874>;
2820
2821                         trips {
2822                                 sensor1_crit: sensor1-crit {
2823                                         temperature = <120000>;
2824                                         hysteresis = <1000>;
2825                                         type = "critical";
2826                                 };
2827                         };
2828                 };
2829
2830                 sensor2_thermal: sensor2-thermal {
2831                         polling-delay-passive = <250>;
2832                         polling-delay = <1000>;
2833                         thermal-sensors = <&tsc 1>;
2834                         sustainable-power = <3874>;
2835
2836                         trips {
2837                                 sensor2_crit: sensor2-crit {
2838                                         temperature = <120000>;
2839                                         hysteresis = <1000>;
2840                                         type = "critical";
2841                                 };
2842                         };
2843                 };
2844
2845                 sensor3_thermal: sensor3-thermal {
2846                         polling-delay-passive = <250>;
2847                         polling-delay = <1000>;
2848                         thermal-sensors = <&tsc 2>;
2849                         sustainable-power = <3874>;
2850
2851                         cooling-maps {
2852                                 map0 {
2853                                         trip = <&target>;
2854                                         cooling-device = <&a57_0 2 4>;
2855                                         contribution = <1024>;
2856                                 };
2857                                 map1 {
2858                                         trip = <&target>;
2859                                         cooling-device = <&a53_0 0 2>;
2860                                         contribution = <1024>;
2861                                 };
2862                         };
2863                         trips {
2864                                 target: trip-point1 {
2865                                         temperature = <100000>;
2866                                         hysteresis = <1000>;
2867                                         type = "passive";
2868                                 };
2869
2870                                 sensor3_crit: sensor3-crit {
2871                                         temperature = <120000>;
2872                                         hysteresis = <1000>;
2873                                         type = "critical";
2874                                 };
2875                         };
2876                 };
2877         };
2878
2879         timer {
2880                 compatible = "arm,armv8-timer";
2881                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2882                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2883                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2884                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2885         };
2886
2887         /* External USB clocks - can be overridden by the board */
2888         usb3s0_clk: usb3s0 {
2889                 compatible = "fixed-clock";
2890                 #clock-cells = <0>;
2891                 clock-frequency = <0>;
2892         };
2893
2894         usb_extal_clk: usb_extal {
2895                 compatible = "fixed-clock";
2896                 #clock-cells = <0>;
2897                 clock-frequency = <0>;
2898         };
2899 };