arch/arm64/boot/dts/renesas/r8a77961.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
   4  *
   5  * Copyright (C) 2016-2017 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a77961-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A77961_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a77961";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         /*
  20          * The external audio clocks are configured as 0 Hz fixed frequency
  21          * clocks by default.
  22          * Boards that provide audio clocks should override them.
  23          */
  24         audio_clk_a: audio_clk_a {
  25                 compatible = "fixed-clock";
  26                 #clock-cells = <0>;
  27                 clock-frequency = <0>;
  28         };
  29
  30         audio_clk_b: audio_clk_b {
  31                 compatible = "fixed-clock";
  32                 #clock-cells = <0>;
  33                 clock-frequency = <0>;
  34         };
  35
  36         audio_clk_c: audio_clk_c {
  37                 compatible = "fixed-clock";
  38                 #clock-cells = <0>;
  39                 clock-frequency = <0>;
  40         };
  41
  42         /* External CAN clock - to be overridden by boards that provide it */
  43         can_clk: can {
  44                 compatible = "fixed-clock";
  45                 #clock-cells = <0>;
  46                 clock-frequency = <0>;
  47         };
  48
  49         cluster0_opp: opp-table-0 {
  50                 compatible = "operating-points-v2";
  51                 opp-shared;
  52
  53                 opp-500000000 {
  54                         opp-hz = /bits/ 64 <500000000>;
  55                         opp-microvolt = <830000>;
  56                         clock-latency-ns = <300000>;
  57                 };
  58                 opp-1000000000 {
  59                         opp-hz = /bits/ 64 <1000000000>;
  60                         opp-microvolt = <830000>;
  61                         clock-latency-ns = <300000>;
  62                 };
  63                 opp-1500000000 {
  64                         opp-hz = /bits/ 64 <1500000000>;
  65                         opp-microvolt = <830000>;
  66                         clock-latency-ns = <300000>;
  67                         opp-suspend;
  68                 };
  69                 opp-1600000000 {
  70                         opp-hz = /bits/ 64 <1600000000>;
  71                         opp-microvolt = <900000>;
  72                         clock-latency-ns = <300000>;
  73                         turbo-mode;
  74                 };
  75                 opp-1700000000 {
  76                         opp-hz = /bits/ 64 <1700000000>;
  77                         opp-microvolt = <900000>;
  78                         clock-latency-ns = <300000>;
  79                         turbo-mode;
  80                 };
  81                 opp-1800000000 {
  82                         opp-hz = /bits/ 64 <1800000000>;
  83                         opp-microvolt = <960000>;
  84                         clock-latency-ns = <300000>;
  85                         turbo-mode;
  86                 };
  87         };
  88
  89         cluster1_opp: opp-table-1 {
  90                 compatible = "operating-points-v2";
  91                 opp-shared;
  92
  93                 opp-800000000 {
  94                         opp-hz = /bits/ 64 <800000000>;
  95                         opp-microvolt = <820000>;
  96                         clock-latency-ns = <300000>;
  97                 };
  98                 opp-1000000000 {
  99                         opp-hz = /bits/ 64 <1000000000>;
 100                         opp-microvolt = <820000>;
 101                         clock-latency-ns = <300000>;
 102                 };
 103                 opp-1200000000 {
 104                         opp-hz = /bits/ 64 <1200000000>;
 105                         opp-microvolt = <820000>;
 106                         clock-latency-ns = <300000>;
 107                 };
 108                 opp-1300000000 {
 109                         opp-hz = /bits/ 64 <1300000000>;
 110                         opp-microvolt = <820000>;
 111                         clock-latency-ns = <300000>;
 112                         turbo-mode;
 113                 };
 114         };
 115
 116         cpus {
 117                 #address-cells = <1>;
 118                 #size-cells = <0>;
 119
 120                 cpu-map {
 121                         cluster0 {
 122                                 core0 {
 123                                         cpu = <&a57_0>;
 124                                 };
 125                                 core1 {
 126                                         cpu = <&a57_1>;
 127                                 };
 128                         };
 129
 130                         cluster1 {
 131                                 core0 {
 132                                         cpu = <&a53_0>;
 133                                 };
 134                                 core1 {
 135                                         cpu = <&a53_1>;
 136                                 };
 137                                 core2 {
 138                                         cpu = <&a53_2>;
 139                                 };
 140                                 core3 {
 141                                         cpu = <&a53_3>;
 142                                 };
 143                         };
 144                 };
 145
 146                 a57_0: cpu@0 {
 147                         compatible = "arm,cortex-a57";
 148                         reg = <0x0>;
 149                         device_type = "cpu";
 150                         power-domains = <&sysc R8A77961_PD_CA57_CPU0>;
 151                         next-level-cache = <&L2_CA57>;
 152                         enable-method = "psci";
 153                         cpu-idle-states = <&CPU_SLEEP_0>;
 154                         dynamic-power-coefficient = <854>;
 155                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
 156                         operating-points-v2 = <&cluster0_opp>;
 157                         capacity-dmips-mhz = <1024>;
 158                         #cooling-cells = <2>;
 159                 };
 160
 161                 a57_1: cpu@1 {
 162                         compatible = "arm,cortex-a57";
 163                         reg = <0x1>;
 164                         device_type = "cpu";
 165                         power-domains = <&sysc R8A77961_PD_CA57_CPU1>;
 166                         next-level-cache = <&L2_CA57>;
 167                         enable-method = "psci";
 168                         cpu-idle-states = <&CPU_SLEEP_0>;
 169                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z>;
 170                         operating-points-v2 = <&cluster0_opp>;
 171                         capacity-dmips-mhz = <1024>;
 172                         #cooling-cells = <2>;
 173                 };
 174
 175                 a53_0: cpu@100 {
 176                         compatible = "arm,cortex-a53";
 177                         reg = <0x100>;
 178                         device_type = "cpu";
 179                         power-domains = <&sysc R8A77961_PD_CA53_CPU0>;
 180                         next-level-cache = <&L2_CA53>;
 181                         enable-method = "psci";
 182                         cpu-idle-states = <&CPU_SLEEP_1>;
 183                         #cooling-cells = <2>;
 184                         dynamic-power-coefficient = <277>;
 185                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 186                         operating-points-v2 = <&cluster1_opp>;
 187                         capacity-dmips-mhz = <535>;
 188                 };
 189
 190                 a53_1: cpu@101 {
 191                         compatible = "arm,cortex-a53";
 192                         reg = <0x101>;
 193                         device_type = "cpu";
 194                         power-domains = <&sysc R8A77961_PD_CA53_CPU1>;
 195                         next-level-cache = <&L2_CA53>;
 196                         enable-method = "psci";
 197                         cpu-idle-states = <&CPU_SLEEP_1>;
 198                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 199                         operating-points-v2 = <&cluster1_opp>;
 200                         capacity-dmips-mhz = <535>;
 201                 };
 202
 203                 a53_2: cpu@102 {
 204                         compatible = "arm,cortex-a53";
 205                         reg = <0x102>;
 206                         device_type = "cpu";
 207                         power-domains = <&sysc R8A77961_PD_CA53_CPU2>;
 208                         next-level-cache = <&L2_CA53>;
 209                         enable-method = "psci";
 210                         cpu-idle-states = <&CPU_SLEEP_1>;
 211                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 212                         operating-points-v2 = <&cluster1_opp>;
 213                         capacity-dmips-mhz = <535>;
 214                 };
 215
 216                 a53_3: cpu@103 {
 217                         compatible = "arm,cortex-a53";
 218                         reg = <0x103>;
 219                         device_type = "cpu";
 220                         power-domains = <&sysc R8A77961_PD_CA53_CPU3>;
 221                         next-level-cache = <&L2_CA53>;
 222                         enable-method = "psci";
 223                         cpu-idle-states = <&CPU_SLEEP_1>;
 224                         clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>;
 225                         operating-points-v2 = <&cluster1_opp>;
 226                         capacity-dmips-mhz = <535>;
 227                 };
 228
 229                 L2_CA57: cache-controller-0 {
 230                         compatible = "cache";
 231                         power-domains = <&sysc R8A77961_PD_CA57_SCU>;
 232                         cache-unified;
 233                         cache-level = <2>;
 234                 };
 235
 236                 L2_CA53: cache-controller-1 {
 237                         compatible = "cache";
 238                         power-domains = <&sysc R8A77961_PD_CA53_SCU>;
 239                         cache-unified;
 240                         cache-level = <2>;
 241                 };
 242
 243                 idle-states {
 244                         entry-method = "psci";
 245
 246                         CPU_SLEEP_0: cpu-sleep-0 {
 247                                 compatible = "arm,idle-state";
 248                                 arm,psci-suspend-param = <0x0010000>;
 249                                 local-timer-stop;
 250                                 entry-latency-us = <400>;
 251                                 exit-latency-us = <500>;
 252                                 min-residency-us = <4000>;
 253                         };
 254
 255                         CPU_SLEEP_1: cpu-sleep-1 {
 256                                 compatible = "arm,idle-state";
 257                                 arm,psci-suspend-param = <0x0010000>;
 258                                 local-timer-stop;
 259                                 entry-latency-us = <700>;
 260                                 exit-latency-us = <700>;
 261                                 min-residency-us = <5000>;
 262                         };
 263                 };
 264         };
 265
 266         extal_clk: extal {
 267                 compatible = "fixed-clock";
 268                 #clock-cells = <0>;
 269                 /* This value must be overridden by the board */
 270                 clock-frequency = <0>;
 271         };
 272
 273         extalr_clk: extalr {
 274                 compatible = "fixed-clock";
 275                 #clock-cells = <0>;
 276                 /* This value must be overridden by the board */
 277                 clock-frequency = <0>;
 278         };
 279
 280         /* External PCIe clock - can be overridden by the board */
 281         pcie_bus_clk: pcie_bus {
 282                 compatible = "fixed-clock";
 283                 #clock-cells = <0>;
 284                 clock-frequency = <0>;
 285         };
 286
 287         pmu_a53 {
 288                 compatible = "arm,cortex-a53-pmu";
 289                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 290                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 291                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 292                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 293                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 294         };
 295
 296         pmu_a57 {
 297                 compatible = "arm,cortex-a57-pmu";
 298                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 299                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 300                 interrupt-affinity = <&a57_0>, <&a57_1>;
 301         };
 302
 303         psci {
 304                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 305                 method = "smc";
 306         };
 307
 308         /* External SCIF clock - to be overridden by boards that provide it */
 309         scif_clk: scif {
 310                 compatible = "fixed-clock";
 311                 #clock-cells = <0>;
 312                 clock-frequency = <0>;
 313         };
 314
 315         soc {
 316                 compatible = "simple-bus";
 317                 interrupt-parent = <&gic>;
 318                 #address-cells = <2>;
 319                 #size-cells = <2>;
 320                 ranges;
 321
 322                 rwdt: watchdog@e6020000 {
 323                         compatible = "renesas,r8a77961-wdt",
 324                                      "renesas,rcar-gen3-wdt";
 325                         reg = <0 0xe6020000 0 0x0c>;
 326                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 327                         clocks = <&cpg CPG_MOD 402>;
 328                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 329                         resets = <&cpg 402>;
 330                         status = "disabled";
 331                 };
 332
 333                 gpio0: gpio@e6050000 {
 334                         compatible = "renesas,gpio-r8a77961",
 335                                      "renesas,rcar-gen3-gpio";
 336                         reg = <0 0xe6050000 0 0x50>;
 337                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 338                         #gpio-cells = <2>;
 339                         gpio-controller;
 340                         gpio-ranges = <&pfc 0 0 16>;
 341                         #interrupt-cells = <2>;
 342                         interrupt-controller;
 343                         clocks = <&cpg CPG_MOD 912>;
 344                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 345                         resets = <&cpg 912>;
 346                 };
 347
 348                 gpio1: gpio@e6051000 {
 349                         compatible = "renesas,gpio-r8a77961",
 350                                      "renesas,rcar-gen3-gpio";
 351                         reg = <0 0xe6051000 0 0x50>;
 352                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 353                         #gpio-cells = <2>;
 354                         gpio-controller;
 355                         gpio-ranges = <&pfc 0 32 29>;
 356                         #interrupt-cells = <2>;
 357                         interrupt-controller;
 358                         clocks = <&cpg CPG_MOD 911>;
 359                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 360                         resets = <&cpg 911>;
 361                 };
 362
 363                 gpio2: gpio@e6052000 {
 364                         compatible = "renesas,gpio-r8a77961",
 365                                      "renesas,rcar-gen3-gpio";
 366                         reg = <0 0xe6052000 0 0x50>;
 367                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 368                         #gpio-cells = <2>;
 369                         gpio-controller;
 370                         gpio-ranges = <&pfc 0 64 15>;
 371                         #interrupt-cells = <2>;
 372                         interrupt-controller;
 373                         clocks = <&cpg CPG_MOD 910>;
 374                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 375                         resets = <&cpg 910>;
 376                 };
 377
 378                 gpio3: gpio@e6053000 {
 379                         compatible = "renesas,gpio-r8a77961",
 380                                      "renesas,rcar-gen3-gpio";
 381                         reg = <0 0xe6053000 0 0x50>;
 382                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 383                         #gpio-cells = <2>;
 384                         gpio-controller;
 385                         gpio-ranges = <&pfc 0 96 16>;
 386                         #interrupt-cells = <2>;
 387                         interrupt-controller;
 388                         clocks = <&cpg CPG_MOD 909>;
 389                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 390                         resets = <&cpg 909>;
 391                 };
 392
 393                 gpio4: gpio@e6054000 {
 394                         compatible = "renesas,gpio-r8a77961",
 395                                      "renesas,rcar-gen3-gpio";
 396                         reg = <0 0xe6054000 0 0x50>;
 397                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 398                         #gpio-cells = <2>;
 399                         gpio-controller;
 400                         gpio-ranges = <&pfc 0 128 18>;
 401                         #interrupt-cells = <2>;
 402                         interrupt-controller;
 403                         clocks = <&cpg CPG_MOD 908>;
 404                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 405                         resets = <&cpg 908>;
 406                 };
 407
 408                 gpio5: gpio@e6055000 {
 409                         compatible = "renesas,gpio-r8a77961",
 410                                      "renesas,rcar-gen3-gpio";
 411                         reg = <0 0xe6055000 0 0x50>;
 412                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 413                         #gpio-cells = <2>;
 414                         gpio-controller;
 415                         gpio-ranges = <&pfc 0 160 26>;
 416                         #interrupt-cells = <2>;
 417                         interrupt-controller;
 418                         clocks = <&cpg CPG_MOD 907>;
 419                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 420                         resets = <&cpg 907>;
 421                 };
 422
 423                 gpio6: gpio@e6055400 {
 424                         compatible = "renesas,gpio-r8a77961",
 425                                      "renesas,rcar-gen3-gpio";
 426                         reg = <0 0xe6055400 0 0x50>;
 427                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 428                         #gpio-cells = <2>;
 429                         gpio-controller;
 430                         gpio-ranges = <&pfc 0 192 32>;
 431                         #interrupt-cells = <2>;
 432                         interrupt-controller;
 433                         clocks = <&cpg CPG_MOD 906>;
 434                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 435                         resets = <&cpg 906>;
 436                 };
 437
 438                 gpio7: gpio@e6055800 {
 439                         compatible = "renesas,gpio-r8a77961",
 440                                      "renesas,rcar-gen3-gpio";
 441                         reg = <0 0xe6055800 0 0x50>;
 442                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 443                         #gpio-cells = <2>;
 444                         gpio-controller;
 445                         gpio-ranges = <&pfc 0 224 4>;
 446                         #interrupt-cells = <2>;
 447                         interrupt-controller;
 448                         clocks = <&cpg CPG_MOD 905>;
 449                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 450                         resets = <&cpg 905>;
 451                 };
 452
 453                 pfc: pinctrl@e6060000 {
 454                         compatible = "renesas,pfc-r8a77961";
 455                         reg = <0 0xe6060000 0 0x50c>;
 456                 };
 457
 458                 cmt0: timer@e60f0000 {
 459                         compatible = "renesas,r8a77961-cmt0",
 460                                      "renesas,rcar-gen3-cmt0";
 461                         reg = <0 0xe60f0000 0 0x1004>;
 462                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 463                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 464                         clocks = <&cpg CPG_MOD 303>;
 465                         clock-names = "fck";
 466                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 467                         resets = <&cpg 303>;
 468                         status = "disabled";
 469                 };
 470
 471                 cmt1: timer@e6130000 {
 472                         compatible = "renesas,r8a77961-cmt1",
 473                                      "renesas,rcar-gen3-cmt1";
 474                         reg = <0 0xe6130000 0 0x1004>;
 475                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 476                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 477                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 478                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 479                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 480                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 481                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 482                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 483                         clocks = <&cpg CPG_MOD 302>;
 484                         clock-names = "fck";
 485                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 486                         resets = <&cpg 302>;
 487                         status = "disabled";
 488                 };
 489
 490                 cmt2: timer@e6140000 {
 491                         compatible = "renesas,r8a77961-cmt1",
 492                                      "renesas,rcar-gen3-cmt1";
 493                         reg = <0 0xe6140000 0 0x1004>;
 494                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 495                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 496                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 497                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 498                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 499                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 500                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 501                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 502                         clocks = <&cpg CPG_MOD 301>;
 503                         clock-names = "fck";
 504                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 505                         resets = <&cpg 301>;
 506                         status = "disabled";
 507                 };
 508
 509                 cmt3: timer@e6148000 {
 510                         compatible = "renesas,r8a77961-cmt1",
 511                                      "renesas,rcar-gen3-cmt1";
 512                         reg = <0 0xe6148000 0 0x1004>;
 513                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 514                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 515                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 516                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 517                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 518                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 519                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 520                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 521                         clocks = <&cpg CPG_MOD 300>;
 522                         clock-names = "fck";
 523                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 524                         resets = <&cpg 300>;
 525                         status = "disabled";
 526                 };
 527
 528                 cpg: clock-controller@e6150000 {
 529                         compatible = "renesas,r8a77961-cpg-mssr";
 530                         reg = <0 0xe6150000 0 0x1000>;
 531                         clocks = <&extal_clk>, <&extalr_clk>;
 532                         clock-names = "extal", "extalr";
 533                         #clock-cells = <2>;
 534                         #power-domain-cells = <0>;
 535                         #reset-cells = <1>;
 536                 };
 537
 538                 rst: reset-controller@e6160000 {
 539                         compatible = "renesas,r8a77961-rst";
 540                         reg = <0 0xe6160000 0 0x0200>;
 541                 };
 542
 543                 sysc: system-controller@e6180000 {
 544                         compatible = "renesas,r8a77961-sysc";
 545                         reg = <0 0xe6180000 0 0x0400>;
 546                         #power-domain-cells = <1>;
 547                 };
 548
 549                 tsc: thermal@e6198000 {
 550                         compatible = "renesas,r8a77961-thermal";
 551                         reg = <0 0xe6198000 0 0x100>,
 552                               <0 0xe61a0000 0 0x100>,
 553                               <0 0xe61a8000 0 0x100>;
 554                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 555                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 556                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 557                         clocks = <&cpg CPG_MOD 522>;
 558                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 559                         resets = <&cpg 522>;
 560                         #thermal-sensor-cells = <1>;
 561                 };
 562
 563                 intc_ex: interrupt-controller@e61c0000 {
 564                         compatible = "renesas,intc-ex-r8a77961", "renesas,irqc";
 565                         #interrupt-cells = <2>;
 566                         interrupt-controller;
 567                         reg = <0 0xe61c0000 0 0x200>;
 568                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 569                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 570                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 571                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 572                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 573                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 574                         clocks = <&cpg CPG_MOD 407>;
 575                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 576                         resets = <&cpg 407>;
 577                 };
 578
 579                 tmu0: timer@e61e0000 {
 580                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 581                         reg = <0 0xe61e0000 0 0x30>;
 582                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 583                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 584                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 585                         clocks = <&cpg CPG_MOD 125>;
 586                         clock-names = "fck";
 587                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 588                         resets = <&cpg 125>;
 589                         status = "disabled";
 590                 };
 591
 592                 tmu1: timer@e6fc0000 {
 593                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 594                         reg = <0 0xe6fc0000 0 0x30>;
 595                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 596                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 597                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 598                         clocks = <&cpg CPG_MOD 124>;
 599                         clock-names = "fck";
 600                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 601                         resets = <&cpg 124>;
 602                         status = "disabled";
 603                 };
 604
 605                 tmu2: timer@e6fd0000 {
 606                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 607                         reg = <0 0xe6fd0000 0 0x30>;
 608                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 611                         clocks = <&cpg CPG_MOD 123>;
 612                         clock-names = "fck";
 613                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 614                         resets = <&cpg 123>;
 615                         status = "disabled";
 616                 };
 617
 618                 tmu3: timer@e6fe0000 {
 619                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 620                         reg = <0 0xe6fe0000 0 0x30>;
 621                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 622                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 623                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 624                         clocks = <&cpg CPG_MOD 122>;
 625                         clock-names = "fck";
 626                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 627                         resets = <&cpg 122>;
 628                         status = "disabled";
 629                 };
 630
 631                 tmu4: timer@ffc00000 {
 632                         compatible = "renesas,tmu-r8a77961", "renesas,tmu";
 633                         reg = <0 0xffc00000 0 0x30>;
 634                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 635                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 636                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 637                         clocks = <&cpg CPG_MOD 121>;
 638                         clock-names = "fck";
 639                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 640                         resets = <&cpg 121>;
 641                         status = "disabled";
 642                 };
 643
 644                 i2c0: i2c@e6500000 {
 645                         #address-cells = <1>;
 646                         #size-cells = <0>;
 647                         compatible = "renesas,i2c-r8a77961",
 648                                      "renesas,rcar-gen3-i2c";
 649                         reg = <0 0xe6500000 0 0x40>;
 650                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 651                         clocks = <&cpg CPG_MOD 931>;
 652                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 653                         resets = <&cpg 931>;
 654                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 655                                <&dmac2 0x91>, <&dmac2 0x90>;
 656                         dma-names = "tx", "rx", "tx", "rx";
 657                         i2c-scl-internal-delay-ns = <110>;
 658                         status = "disabled";
 659                 };
 660
 661                 i2c1: i2c@e6508000 {
 662                         #address-cells = <1>;
 663                         #size-cells = <0>;
 664                         compatible = "renesas,i2c-r8a77961",
 665                                      "renesas,rcar-gen3-i2c";
 666                         reg = <0 0xe6508000 0 0x40>;
 667                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 668                         clocks = <&cpg CPG_MOD 930>;
 669                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 670                         resets = <&cpg 930>;
 671                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 672                                <&dmac2 0x93>, <&dmac2 0x92>;
 673                         dma-names = "tx", "rx", "tx", "rx";
 674                         i2c-scl-internal-delay-ns = <6>;
 675                         status = "disabled";
 676                 };
 677
 678                 i2c2: i2c@e6510000 {
 679                         #address-cells = <1>;
 680                         #size-cells = <0>;
 681                         compatible = "renesas,i2c-r8a77961",
 682                                      "renesas,rcar-gen3-i2c";
 683                         reg = <0 0xe6510000 0 0x40>;
 684                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 685                         clocks = <&cpg CPG_MOD 929>;
 686                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 687                         resets = <&cpg 929>;
 688                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 689                                <&dmac2 0x95>, <&dmac2 0x94>;
 690                         dma-names = "tx", "rx", "tx", "rx";
 691                         i2c-scl-internal-delay-ns = <6>;
 692                         status = "disabled";
 693                 };
 694
 695                 i2c3: i2c@e66d0000 {
 696                         #address-cells = <1>;
 697                         #size-cells = <0>;
 698                         compatible = "renesas,i2c-r8a77961",
 699                                      "renesas,rcar-gen3-i2c";
 700                         reg = <0 0xe66d0000 0 0x40>;
 701                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 702                         clocks = <&cpg CPG_MOD 928>;
 703                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 704                         resets = <&cpg 928>;
 705                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 706                         dma-names = "tx", "rx";
 707                         i2c-scl-internal-delay-ns = <110>;
 708                         status = "disabled";
 709                 };
 710
 711                 i2c4: i2c@e66d8000 {
 712                         #address-cells = <1>;
 713                         #size-cells = <0>;
 714                         compatible = "renesas,i2c-r8a77961",
 715                                      "renesas,rcar-gen3-i2c";
 716                         reg = <0 0xe66d8000 0 0x40>;
 717                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 718                         clocks = <&cpg CPG_MOD 927>;
 719                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 720                         resets = <&cpg 927>;
 721                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 722                         dma-names = "tx", "rx";
 723                         i2c-scl-internal-delay-ns = <110>;
 724                         status = "disabled";
 725                 };
 726
 727                 i2c5: i2c@e66e0000 {
 728                         #address-cells = <1>;
 729                         #size-cells = <0>;
 730                         compatible = "renesas,i2c-r8a77961",
 731                                      "renesas,rcar-gen3-i2c";
 732                         reg = <0 0xe66e0000 0 0x40>;
 733                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 734                         clocks = <&cpg CPG_MOD 919>;
 735                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 736                         resets = <&cpg 919>;
 737                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 738                         dma-names = "tx", "rx";
 739                         i2c-scl-internal-delay-ns = <110>;
 740                         status = "disabled";
 741                 };
 742
 743                 i2c6: i2c@e66e8000 {
 744                         #address-cells = <1>;
 745                         #size-cells = <0>;
 746                         compatible = "renesas,i2c-r8a77961",
 747                                      "renesas,rcar-gen3-i2c";
 748                         reg = <0 0xe66e8000 0 0x40>;
 749                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 750                         clocks = <&cpg CPG_MOD 918>;
 751                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 752                         resets = <&cpg 918>;
 753                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 754                         dma-names = "tx", "rx";
 755                         i2c-scl-internal-delay-ns = <6>;
 756                         status = "disabled";
 757                 };
 758
 759                 i2c_dvfs: i2c@e60b0000 {
 760                         #address-cells = <1>;
 761                         #size-cells = <0>;
 762                         compatible = "renesas,iic-r8a77961",
 763                                      "renesas,rcar-gen3-iic",
 764                                      "renesas,rmobile-iic";
 765                         reg = <0 0xe60b0000 0 0x425>;
 766                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 767                         clocks = <&cpg CPG_MOD 926>;
 768                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 769                         resets = <&cpg 926>;
 770                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 771                         dma-names = "tx", "rx";
 772                         status = "disabled";
 773                 };
 774
 775                 hscif0: serial@e6540000 {
 776                         compatible = "renesas,hscif-r8a77961",
 777                                      "renesas,rcar-gen3-hscif",
 778                                      "renesas,hscif";
 779                         reg = <0 0xe6540000 0 0x60>;
 780                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 781                         clocks = <&cpg CPG_MOD 520>,
 782                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 783                                  <&scif_clk>;
 784                         clock-names = "fck", "brg_int", "scif_clk";
 785                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 786                                <&dmac2 0x31>, <&dmac2 0x30>;
 787                         dma-names = "tx", "rx", "tx", "rx";
 788                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 789                         resets = <&cpg 520>;
 790                         status = "disabled";
 791                 };
 792
 793                 hscif1: serial@e6550000 {
 794                         compatible = "renesas,hscif-r8a77961",
 795                                      "renesas,rcar-gen3-hscif",
 796                                      "renesas,hscif";
 797                         reg = <0 0xe6550000 0 0x60>;
 798                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 799                         clocks = <&cpg CPG_MOD 519>,
 800                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 801                                  <&scif_clk>;
 802                         clock-names = "fck", "brg_int", "scif_clk";
 803                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 804                                <&dmac2 0x33>, <&dmac2 0x32>;
 805                         dma-names = "tx", "rx", "tx", "rx";
 806                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 807                         resets = <&cpg 519>;
 808                         status = "disabled";
 809                 };
 810
 811                 hscif2: serial@e6560000 {
 812                         compatible = "renesas,hscif-r8a77961",
 813                                      "renesas,rcar-gen3-hscif",
 814                                      "renesas,hscif";
 815                         reg = <0 0xe6560000 0 0x60>;
 816                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 817                         clocks = <&cpg CPG_MOD 518>,
 818                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 819                                  <&scif_clk>;
 820                         clock-names = "fck", "brg_int", "scif_clk";
 821                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 822                                <&dmac2 0x35>, <&dmac2 0x34>;
 823                         dma-names = "tx", "rx", "tx", "rx";
 824                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 825                         resets = <&cpg 518>;
 826                         status = "disabled";
 827                 };
 828
 829                 hscif3: serial@e66a0000 {
 830                         compatible = "renesas,hscif-r8a77961",
 831                                      "renesas,rcar-gen3-hscif",
 832                                      "renesas,hscif";
 833                         reg = <0 0xe66a0000 0 0x60>;
 834                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 835                         clocks = <&cpg CPG_MOD 517>,
 836                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 837                                  <&scif_clk>;
 838                         clock-names = "fck", "brg_int", "scif_clk";
 839                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 840                         dma-names = "tx", "rx";
 841                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 842                         resets = <&cpg 517>;
 843                         status = "disabled";
 844                 };
 845
 846                 hscif4: serial@e66b0000 {
 847                         compatible = "renesas,hscif-r8a77961",
 848                                      "renesas,rcar-gen3-hscif",
 849                                      "renesas,hscif";
 850                         reg = <0 0xe66b0000 0 0x60>;
 851                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 852                         clocks = <&cpg CPG_MOD 516>,
 853                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
 854                                  <&scif_clk>;
 855                         clock-names = "fck", "brg_int", "scif_clk";
 856                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 857                         dma-names = "tx", "rx";
 858                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 859                         resets = <&cpg 516>;
 860                         status = "disabled";
 861                 };
 862
 863                 hsusb: usb@e6590000 {
 864                         compatible = "renesas,usbhs-r8a77961",
 865                                      "renesas,rcar-gen3-usbhs";
 866                         reg = <0 0xe6590000 0 0x200>;
 867                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 868                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 869                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 870                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 871                         dma-names = "ch0", "ch1", "ch2", "ch3";
 872                         renesas,buswait = <11>;
 873                         phys = <&usb2_phy0 3>;
 874                         phy-names = "usb";
 875                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 876                         resets = <&cpg 704>, <&cpg 703>;
 877                         status = "disabled";
 878                 };
 879
 880                 usb_dmac0: dma-controller@e65a0000 {
 881                         compatible = "renesas,r8a77961-usb-dmac",
 882                                      "renesas,usb-dmac";
 883                         reg = <0 0xe65a0000 0 0x100>;
 884                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 885                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 886                         interrupt-names = "ch0", "ch1";
 887                         clocks = <&cpg CPG_MOD 330>;
 888                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 889                         resets = <&cpg 330>;
 890                         #dma-cells = <1>;
 891                         dma-channels = <2>;
 892                 };
 893
 894                 usb_dmac1: dma-controller@e65b0000 {
 895                         compatible = "renesas,r8a77961-usb-dmac",
 896                                      "renesas,usb-dmac";
 897                         reg = <0 0xe65b0000 0 0x100>;
 898                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 899                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 900                         interrupt-names = "ch0", "ch1";
 901                         clocks = <&cpg CPG_MOD 331>;
 902                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 903                         resets = <&cpg 331>;
 904                         #dma-cells = <1>;
 905                         dma-channels = <2>;
 906                 };
 907
 908                 usb3_phy0: usb-phy@e65ee000 {
 909                         compatible = "renesas,r8a77961-usb3-phy",
 910                                      "renesas,rcar-gen3-usb3-phy";
 911                         reg = <0 0xe65ee000 0 0x90>;
 912                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 913                                  <&usb_extal_clk>;
 914                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 915                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 916                         resets = <&cpg 328>;
 917                         #phy-cells = <0>;
 918                         status = "disabled";
 919                 };
 920
 921                 arm_cc630p: crypto@e6601000 {
 922                         compatible = "arm,cryptocell-630p-ree";
 923                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 924                         reg = <0x0 0xe6601000 0 0x1000>;
 925                         clocks = <&cpg CPG_MOD 229>;
 926                         resets = <&cpg 229>;
 927                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 928                 };
 929
 930                 dmac0: dma-controller@e6700000 {
 931                         compatible = "renesas,dmac-r8a77961",
 932                                      "renesas,rcar-dmac";
 933                         reg = <0 0xe6700000 0 0x10000>;
 934                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 935                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 936                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 937                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 938                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 939                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 940                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 941                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 942                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 943                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 944                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 945                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 946                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 947                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 948                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 949                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 950                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 951                         interrupt-names = "error",
 952                                         "ch0", "ch1", "ch2", "ch3",
 953                                         "ch4", "ch5", "ch6", "ch7",
 954                                         "ch8", "ch9", "ch10", "ch11",
 955                                         "ch12", "ch13", "ch14", "ch15";
 956                         clocks = <&cpg CPG_MOD 219>;
 957                         clock-names = "fck";
 958                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
 959                         resets = <&cpg 219>;
 960                         #dma-cells = <1>;
 961                         dma-channels = <16>;
 962                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 963                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 964                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 965                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 966                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 967                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 968                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 969                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 970                 };
 971
 972                 dmac1: dma-controller@e7300000 {
 973                         compatible = "renesas,dmac-r8a77961",
 974                                      "renesas,rcar-dmac";
 975                         reg = <0 0xe7300000 0 0x10000>;
 976                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 977                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 978                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 979                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 980                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 981                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 982                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 983                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 984                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 985                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 986                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 987                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 988                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 989                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 990                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 991                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 992                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 993                         interrupt-names = "error",
 994                                         "ch0", "ch1", "ch2", "ch3",
 995                                         "ch4", "ch5", "ch6", "ch7",
 996                                         "ch8", "ch9", "ch10", "ch11",
 997                                         "ch12", "ch13", "ch14", "ch15";
 998                         clocks = <&cpg CPG_MOD 218>;
 999                         clock-names = "fck";
1000                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1001                         resets = <&cpg 218>;
1002                         #dma-cells = <1>;
1003                         dma-channels = <16>;
1004                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1005                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1006                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1007                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1008                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1009                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1010                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1011                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1012                 };
1013
1014                 dmac2: dma-controller@e7310000 {
1015                         compatible = "renesas,dmac-r8a77961",
1016                                      "renesas,rcar-dmac";
1017                         reg = <0 0xe7310000 0 0x10000>;
1018                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1019                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1020                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1021                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1022                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1023                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1024                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1025                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1026                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1027                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1028                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1029                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1030                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1031                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1032                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1033                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1034                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1035                         interrupt-names = "error",
1036                                         "ch0", "ch1", "ch2", "ch3",
1037                                         "ch4", "ch5", "ch6", "ch7",
1038                                         "ch8", "ch9", "ch10", "ch11",
1039                                         "ch12", "ch13", "ch14", "ch15";
1040                         clocks = <&cpg CPG_MOD 217>;
1041                         clock-names = "fck";
1042                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1043                         resets = <&cpg 217>;
1044                         #dma-cells = <1>;
1045                         dma-channels = <16>;
1046                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1047                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1048                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1049                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1050                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1051                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1052                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1053                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1054                 };
1055
1056                 ipmmu_ds0: iommu@e6740000 {
1057                         compatible = "renesas,ipmmu-r8a77961";
1058                         reg = <0 0xe6740000 0 0x1000>;
1059                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1060                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1061                         #iommu-cells = <1>;
1062                 };
1063
1064                 ipmmu_ds1: iommu@e7740000 {
1065                         compatible = "renesas,ipmmu-r8a77961";
1066                         reg = <0 0xe7740000 0 0x1000>;
1067                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1068                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1069                         #iommu-cells = <1>;
1070                 };
1071
1072                 ipmmu_hc: iommu@e6570000 {
1073                         compatible = "renesas,ipmmu-r8a77961";
1074                         reg = <0 0xe6570000 0 0x1000>;
1075                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1076                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1077                         #iommu-cells = <1>;
1078                 };
1079
1080                 ipmmu_ir: iommu@ff8b0000 {
1081                         compatible = "renesas,ipmmu-r8a77961";
1082                         reg = <0 0xff8b0000 0 0x1000>;
1083                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1084                         power-domains = <&sysc R8A77961_PD_A3IR>;
1085                         #iommu-cells = <1>;
1086                 };
1087
1088                 ipmmu_mm: iommu@e67b0000 {
1089                         compatible = "renesas,ipmmu-r8a77961";
1090                         reg = <0 0xe67b0000 0 0x1000>;
1091                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1092                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1093                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1094                         #iommu-cells = <1>;
1095                 };
1096
1097                 ipmmu_mp: iommu@ec670000 {
1098                         compatible = "renesas,ipmmu-r8a77961";
1099                         reg = <0 0xec670000 0 0x1000>;
1100                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1101                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1102                         #iommu-cells = <1>;
1103                 };
1104
1105                 ipmmu_pv0: iommu@fd800000 {
1106                         compatible = "renesas,ipmmu-r8a77961";
1107                         reg = <0 0xfd800000 0 0x1000>;
1108                         renesas,ipmmu-main = <&ipmmu_mm 5>;
1109                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1110                         #iommu-cells = <1>;
1111                 };
1112
1113                 ipmmu_pv1: iommu@fd950000 {
1114                         compatible = "renesas,ipmmu-r8a77961";
1115                         reg = <0 0xfd950000 0 0x1000>;
1116                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1117                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1118                         #iommu-cells = <1>;
1119                 };
1120
1121                 ipmmu_rt: iommu@ffc80000 {
1122                         compatible = "renesas,ipmmu-r8a77961";
1123                         reg = <0 0xffc80000 0 0x1000>;
1124                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1125                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1126                         #iommu-cells = <1>;
1127                 };
1128
1129                 ipmmu_vc0: iommu@fe6b0000 {
1130                         compatible = "renesas,ipmmu-r8a77961";
1131                         reg = <0 0xfe6b0000 0 0x1000>;
1132                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1133                         power-domains = <&sysc R8A77961_PD_A3VC>;
1134                         #iommu-cells = <1>;
1135                 };
1136
1137                 ipmmu_vi0: iommu@febd0000 {
1138                         compatible = "renesas,ipmmu-r8a77961";
1139                         reg = <0 0xfebd0000 0 0x1000>;
1140                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1141                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1142                         #iommu-cells = <1>;
1143                 };
1144
1145                 avb: ethernet@e6800000 {
1146                         compatible = "renesas,etheravb-r8a77961",
1147                                      "renesas,etheravb-rcar-gen3";
1148                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1149                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1150                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1151                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1152                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1153                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1154                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1155                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1156                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1157                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1158                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1159                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1160                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1161                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1162                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1163                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1164                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1165                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1166                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1167                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1168                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1169                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1170                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1171                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1172                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1173                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1174                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1175                                           "ch4", "ch5", "ch6", "ch7",
1176                                           "ch8", "ch9", "ch10", "ch11",
1177                                           "ch12", "ch13", "ch14", "ch15",
1178                                           "ch16", "ch17", "ch18", "ch19",
1179                                           "ch20", "ch21", "ch22", "ch23",
1180                                           "ch24";
1181                         clocks = <&cpg CPG_MOD 812>;
1182                         clock-names = "fck";
1183                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1184                         resets = <&cpg 812>;
1185                         phy-mode = "rgmii";
1186                         rx-internal-delay-ps = <0>;
1187                         tx-internal-delay-ps = <0>;
1188                         iommus = <&ipmmu_ds0 16>;
1189                         #address-cells = <1>;
1190                         #size-cells = <0>;
1191                         status = "disabled";
1192                 };
1193
1194                 can0: can@e6c30000 {
1195                         compatible = "renesas,can-r8a77961",
1196                                      "renesas,rcar-gen3-can";
1197                         reg = <0 0xe6c30000 0 0x1000>;
1198                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1199                         clocks = <&cpg CPG_MOD 916>,
1200                                <&cpg CPG_CORE R8A77961_CLK_CANFD>,
1201                                <&can_clk>;
1202                         clock-names = "clkp1", "clkp2", "can_clk";
1203                         assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1204                         assigned-clock-rates = <40000000>;
1205                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1206                         resets = <&cpg 916>;
1207                         status = "disabled";
1208                 };
1209
1210                 can1: can@e6c38000 {
1211                         compatible = "renesas,can-r8a77961",
1212                                      "renesas,rcar-gen3-can";
1213                         reg = <0 0xe6c38000 0 0x1000>;
1214                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1215                         clocks = <&cpg CPG_MOD 915>,
1216                                <&cpg CPG_CORE R8A77961_CLK_CANFD>,
1217                                <&can_clk>;
1218                         clock-names = "clkp1", "clkp2", "can_clk";
1219                         assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1220                         assigned-clock-rates = <40000000>;
1221                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1222                         resets = <&cpg 915>;
1223                         status = "disabled";
1224                 };
1225
1226                 canfd: can@e66c0000 {
1227                         compatible = "renesas,r8a77961-canfd",
1228                                      "renesas,rcar-gen3-canfd";
1229                         reg = <0 0xe66c0000 0 0x8000>;
1230                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1231                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1232                         interrupt-names = "ch_int", "g_int";
1233                         clocks = <&cpg CPG_MOD 914>,
1234                                <&cpg CPG_CORE R8A77961_CLK_CANFD>,
1235                                <&can_clk>;
1236                         clock-names = "fck", "canfd", "can_clk";
1237                         assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>;
1238                         assigned-clock-rates = <40000000>;
1239                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1240                         resets = <&cpg 914>;
1241                         status = "disabled";
1242
1243                         channel0 {
1244                                 status = "disabled";
1245                         };
1246
1247                         channel1 {
1248                                 status = "disabled";
1249                         };
1250                 };
1251
1252                 pwm0: pwm@e6e30000 {
1253                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1254                         reg = <0 0xe6e30000 0 8>;
1255                         #pwm-cells = <2>;
1256                         clocks = <&cpg CPG_MOD 523>;
1257                         resets = <&cpg 523>;
1258                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1259                         status = "disabled";
1260                 };
1261
1262                 pwm1: pwm@e6e31000 {
1263                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1264                         reg = <0 0xe6e31000 0 8>;
1265                         #pwm-cells = <2>;
1266                         clocks = <&cpg CPG_MOD 523>;
1267                         resets = <&cpg 523>;
1268                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1269                         status = "disabled";
1270                 };
1271
1272                 pwm2: pwm@e6e32000 {
1273                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1274                         reg = <0 0xe6e32000 0 8>;
1275                         #pwm-cells = <2>;
1276                         clocks = <&cpg CPG_MOD 523>;
1277                         resets = <&cpg 523>;
1278                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1279                         status = "disabled";
1280                 };
1281
1282                 pwm3: pwm@e6e33000 {
1283                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1284                         reg = <0 0xe6e33000 0 8>;
1285                         #pwm-cells = <2>;
1286                         clocks = <&cpg CPG_MOD 523>;
1287                         resets = <&cpg 523>;
1288                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1289                         status = "disabled";
1290                 };
1291
1292                 pwm4: pwm@e6e34000 {
1293                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1294                         reg = <0 0xe6e34000 0 8>;
1295                         #pwm-cells = <2>;
1296                         clocks = <&cpg CPG_MOD 523>;
1297                         resets = <&cpg 523>;
1298                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1299                         status = "disabled";
1300                 };
1301
1302                 pwm5: pwm@e6e35000 {
1303                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1304                         reg = <0 0xe6e35000 0 8>;
1305                         #pwm-cells = <2>;
1306                         clocks = <&cpg CPG_MOD 523>;
1307                         resets = <&cpg 523>;
1308                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1309                         status = "disabled";
1310                 };
1311
1312                 pwm6: pwm@e6e36000 {
1313                         compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar";
1314                         reg = <0 0xe6e36000 0 8>;
1315                         #pwm-cells = <2>;
1316                         clocks = <&cpg CPG_MOD 523>;
1317                         resets = <&cpg 523>;
1318                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1319                         status = "disabled";
1320                 };
1321
1322                 scif0: serial@e6e60000 {
1323                         compatible = "renesas,scif-r8a77961",
1324                                      "renesas,rcar-gen3-scif", "renesas,scif";
1325                         reg = <0 0xe6e60000 0 64>;
1326                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1327                         clocks = <&cpg CPG_MOD 207>,
1328                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1329                                  <&scif_clk>;
1330                         clock-names = "fck", "brg_int", "scif_clk";
1331                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1332                                <&dmac2 0x51>, <&dmac2 0x50>;
1333                         dma-names = "tx", "rx", "tx", "rx";
1334                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1335                         resets = <&cpg 207>;
1336                         status = "disabled";
1337                 };
1338
1339                 scif1: serial@e6e68000 {
1340                         compatible = "renesas,scif-r8a77961",
1341                                      "renesas,rcar-gen3-scif", "renesas,scif";
1342                         reg = <0 0xe6e68000 0 64>;
1343                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1344                         clocks = <&cpg CPG_MOD 206>,
1345                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1346                                  <&scif_clk>;
1347                         clock-names = "fck", "brg_int", "scif_clk";
1348                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1349                                <&dmac2 0x53>, <&dmac2 0x52>;
1350                         dma-names = "tx", "rx", "tx", "rx";
1351                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1352                         resets = <&cpg 206>;
1353                         status = "disabled";
1354                 };
1355
1356                 scif2: serial@e6e88000 {
1357                         compatible = "renesas,scif-r8a77961",
1358                                      "renesas,rcar-gen3-scif", "renesas,scif";
1359                         reg = <0 0xe6e88000 0 64>;
1360                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1361                         clocks = <&cpg CPG_MOD 310>,
1362                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1363                                  <&scif_clk>;
1364                         clock-names = "fck", "brg_int", "scif_clk";
1365                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1366                                <&dmac2 0x13>, <&dmac2 0x12>;
1367                         dma-names = "tx", "rx", "tx", "rx";
1368                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1369                         resets = <&cpg 310>;
1370                         status = "disabled";
1371                 };
1372
1373                 scif3: serial@e6c50000 {
1374                         compatible = "renesas,scif-r8a77961",
1375                                      "renesas,rcar-gen3-scif", "renesas,scif";
1376                         reg = <0 0xe6c50000 0 64>;
1377                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1378                         clocks = <&cpg CPG_MOD 204>,
1379                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1380                                  <&scif_clk>;
1381                         clock-names = "fck", "brg_int", "scif_clk";
1382                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1383                         dma-names = "tx", "rx";
1384                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1385                         resets = <&cpg 204>;
1386                         status = "disabled";
1387                 };
1388
1389                 scif4: serial@e6c40000 {
1390                         compatible = "renesas,scif-r8a77961",
1391                                      "renesas,rcar-gen3-scif", "renesas,scif";
1392                         reg = <0 0xe6c40000 0 64>;
1393                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1394                         clocks = <&cpg CPG_MOD 203>,
1395                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1396                                  <&scif_clk>;
1397                         clock-names = "fck", "brg_int", "scif_clk";
1398                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1399                         dma-names = "tx", "rx";
1400                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1401                         resets = <&cpg 203>;
1402                         status = "disabled";
1403                 };
1404
1405                 scif5: serial@e6f30000 {
1406                         compatible = "renesas,scif-r8a77961",
1407                                      "renesas,rcar-gen3-scif", "renesas,scif";
1408                         reg = <0 0xe6f30000 0 64>;
1409                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1410                         clocks = <&cpg CPG_MOD 202>,
1411                                  <&cpg CPG_CORE R8A77961_CLK_S3D1>,
1412                                  <&scif_clk>;
1413                         clock-names = "fck", "brg_int", "scif_clk";
1414                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1415                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1416                         dma-names = "tx", "rx", "tx", "rx";
1417                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1418                         resets = <&cpg 202>;
1419                         status = "disabled";
1420                 };
1421
1422                 tpu: pwm@e6e80000 {
1423                         compatible = "renesas,tpu-r8a77961", "renesas,tpu";
1424                         reg = <0 0xe6e80000 0 0x148>;
1425                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1426                         clocks = <&cpg CPG_MOD 304>;
1427                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1428                         resets = <&cpg 304>;
1429                         #pwm-cells = <3>;
1430                         status = "disabled";
1431                 };
1432
1433                 msiof0: spi@e6e90000 {
1434                         compatible = "renesas,msiof-r8a77961",
1435                                      "renesas,rcar-gen3-msiof";
1436                         reg = <0 0xe6e90000 0 0x0064>;
1437                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1438                         clocks = <&cpg CPG_MOD 211>;
1439                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1440                                <&dmac2 0x41>, <&dmac2 0x40>;
1441                         dma-names = "tx", "rx", "tx", "rx";
1442                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1443                         resets = <&cpg 211>;
1444                         #address-cells = <1>;
1445                         #size-cells = <0>;
1446                         status = "disabled";
1447                 };
1448
1449                 msiof1: spi@e6ea0000 {
1450                         compatible = "renesas,msiof-r8a77961",
1451                                      "renesas,rcar-gen3-msiof";
1452                         reg = <0 0xe6ea0000 0 0x0064>;
1453                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1454                         clocks = <&cpg CPG_MOD 210>;
1455                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1456                                <&dmac2 0x43>, <&dmac2 0x42>;
1457                         dma-names = "tx", "rx", "tx", "rx";
1458                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1459                         resets = <&cpg 210>;
1460                         #address-cells = <1>;
1461                         #size-cells = <0>;
1462                         status = "disabled";
1463                 };
1464
1465                 msiof2: spi@e6c00000 {
1466                         compatible = "renesas,msiof-r8a77961",
1467                                      "renesas,rcar-gen3-msiof";
1468                         reg = <0 0xe6c00000 0 0x0064>;
1469                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1470                         clocks = <&cpg CPG_MOD 209>;
1471                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1472                         dma-names = "tx", "rx";
1473                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1474                         resets = <&cpg 209>;
1475                         #address-cells = <1>;
1476                         #size-cells = <0>;
1477                         status = "disabled";
1478                 };
1479
1480                 msiof3: spi@e6c10000 {
1481                         compatible = "renesas,msiof-r8a77961",
1482                                      "renesas,rcar-gen3-msiof";
1483                         reg = <0 0xe6c10000 0 0x0064>;
1484                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1485                         clocks = <&cpg CPG_MOD 208>;
1486                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1487                         dma-names = "tx", "rx";
1488                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1489                         resets = <&cpg 208>;
1490                         #address-cells = <1>;
1491                         #size-cells = <0>;
1492                         status = "disabled";
1493                 };
1494
1495                 vin0: video@e6ef0000 {
1496                         compatible = "renesas,vin-r8a77961";
1497                         reg = <0 0xe6ef0000 0 0x1000>;
1498                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1499                         clocks = <&cpg CPG_MOD 811>;
1500                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1501                         resets = <&cpg 811>;
1502                         renesas,id = <0>;
1503                         status = "disabled";
1504
1505                         ports {
1506                                 #address-cells = <1>;
1507                                 #size-cells = <0>;
1508
1509                                 port@1 {
1510                                         #address-cells = <1>;
1511                                         #size-cells = <0>;
1512
1513                                         reg = <1>;
1514
1515                                         vin0csi20: endpoint@0 {
1516                                                 reg = <0>;
1517                                                 remote-endpoint = <&csi20vin0>;
1518                                         };
1519                                         vin0csi40: endpoint@2 {
1520                                                 reg = <2>;
1521                                                 remote-endpoint = <&csi40vin0>;
1522                                         };
1523                                 };
1524                         };
1525                 };
1526
1527                 vin1: video@e6ef1000 {
1528                         compatible = "renesas,vin-r8a77961";
1529                         reg = <0 0xe6ef1000 0 0x1000>;
1530                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1531                         clocks = <&cpg CPG_MOD 810>;
1532                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1533                         resets = <&cpg 810>;
1534                         renesas,id = <1>;
1535                         status = "disabled";
1536
1537                         ports {
1538                                 #address-cells = <1>;
1539                                 #size-cells = <0>;
1540
1541                                 port@1 {
1542                                         #address-cells = <1>;
1543                                         #size-cells = <0>;
1544
1545                                         reg = <1>;
1546
1547                                         vin1csi20: endpoint@0 {
1548                                                 reg = <0>;
1549                                                 remote-endpoint = <&csi20vin1>;
1550                                         };
1551                                         vin1csi40: endpoint@2 {
1552                                                 reg = <2>;
1553                                                 remote-endpoint = <&csi40vin1>;
1554                                         };
1555                                 };
1556                         };
1557                 };
1558
1559                 vin2: video@e6ef2000 {
1560                         compatible = "renesas,vin-r8a77961";
1561                         reg = <0 0xe6ef2000 0 0x1000>;
1562                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1563                         clocks = <&cpg CPG_MOD 809>;
1564                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1565                         resets = <&cpg 809>;
1566                         renesas,id = <2>;
1567                         status = "disabled";
1568
1569                         ports {
1570                                 #address-cells = <1>;
1571                                 #size-cells = <0>;
1572
1573                                 port@1 {
1574                                         #address-cells = <1>;
1575                                         #size-cells = <0>;
1576
1577                                         reg = <1>;
1578
1579                                         vin2csi20: endpoint@0 {
1580                                                 reg = <0>;
1581                                                 remote-endpoint = <&csi20vin2>;
1582                                         };
1583                                         vin2csi40: endpoint@2 {
1584                                                 reg = <2>;
1585                                                 remote-endpoint = <&csi40vin2>;
1586                                         };
1587                                 };
1588                         };
1589                 };
1590
1591                 vin3: video@e6ef3000 {
1592                         compatible = "renesas,vin-r8a77961";
1593                         reg = <0 0xe6ef3000 0 0x1000>;
1594                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1595                         clocks = <&cpg CPG_MOD 808>;
1596                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1597                         resets = <&cpg 808>;
1598                         renesas,id = <3>;
1599                         status = "disabled";
1600
1601                         ports {
1602                                 #address-cells = <1>;
1603                                 #size-cells = <0>;
1604
1605                                 port@1 {
1606                                         #address-cells = <1>;
1607                                         #size-cells = <0>;
1608
1609                                         reg = <1>;
1610
1611                                         vin3csi20: endpoint@0 {
1612                                                 reg = <0>;
1613                                                 remote-endpoint = <&csi20vin3>;
1614                                         };
1615                                         vin3csi40: endpoint@2 {
1616                                                 reg = <2>;
1617                                                 remote-endpoint = <&csi40vin3>;
1618                                         };
1619                                 };
1620                         };
1621                 };
1622
1623                 vin4: video@e6ef4000 {
1624                         compatible = "renesas,vin-r8a77961";
1625                         reg = <0 0xe6ef4000 0 0x1000>;
1626                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1627                         clocks = <&cpg CPG_MOD 807>;
1628                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1629                         resets = <&cpg 807>;
1630                         renesas,id = <4>;
1631                         status = "disabled";
1632
1633                         ports {
1634                                 #address-cells = <1>;
1635                                 #size-cells = <0>;
1636
1637                                 port@1 {
1638                                         #address-cells = <1>;
1639                                         #size-cells = <0>;
1640
1641                                         reg = <1>;
1642
1643                                         vin4csi20: endpoint@0 {
1644                                                 reg = <0>;
1645                                                 remote-endpoint = <&csi20vin4>;
1646                                         };
1647                                         vin4csi40: endpoint@2 {
1648                                                 reg = <2>;
1649                                                 remote-endpoint = <&csi40vin4>;
1650                                         };
1651                                 };
1652                         };
1653                 };
1654
1655                 vin5: video@e6ef5000 {
1656                         compatible = "renesas,vin-r8a77961";
1657                         reg = <0 0xe6ef5000 0 0x1000>;
1658                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1659                         clocks = <&cpg CPG_MOD 806>;
1660                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1661                         resets = <&cpg 806>;
1662                         renesas,id = <5>;
1663                         status = "disabled";
1664
1665                         ports {
1666                                 #address-cells = <1>;
1667                                 #size-cells = <0>;
1668
1669                                 port@1 {
1670                                         #address-cells = <1>;
1671                                         #size-cells = <0>;
1672
1673                                         reg = <1>;
1674
1675                                         vin5csi20: endpoint@0 {
1676                                                 reg = <0>;
1677                                                 remote-endpoint = <&csi20vin5>;
1678                                         };
1679                                         vin5csi40: endpoint@2 {
1680                                                 reg = <2>;
1681                                                 remote-endpoint = <&csi40vin5>;
1682                                         };
1683                                 };
1684                         };
1685                 };
1686
1687                 vin6: video@e6ef6000 {
1688                         compatible = "renesas,vin-r8a77961";
1689                         reg = <0 0xe6ef6000 0 0x1000>;
1690                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1691                         clocks = <&cpg CPG_MOD 805>;
1692                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1693                         resets = <&cpg 805>;
1694                         renesas,id = <6>;
1695                         status = "disabled";
1696
1697                         ports {
1698                                 #address-cells = <1>;
1699                                 #size-cells = <0>;
1700
1701                                 port@1 {
1702                                         #address-cells = <1>;
1703                                         #size-cells = <0>;
1704
1705                                         reg = <1>;
1706
1707                                         vin6csi20: endpoint@0 {
1708                                                 reg = <0>;
1709                                                 remote-endpoint = <&csi20vin6>;
1710                                         };
1711                                         vin6csi40: endpoint@2 {
1712                                                 reg = <2>;
1713                                                 remote-endpoint = <&csi40vin6>;
1714                                         };
1715                                 };
1716                         };
1717                 };
1718
1719                 vin7: video@e6ef7000 {
1720                         compatible = "renesas,vin-r8a77961";
1721                         reg = <0 0xe6ef7000 0 0x1000>;
1722                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1723                         clocks = <&cpg CPG_MOD 804>;
1724                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1725                         resets = <&cpg 804>;
1726                         renesas,id = <7>;
1727                         status = "disabled";
1728
1729                         ports {
1730                                 #address-cells = <1>;
1731                                 #size-cells = <0>;
1732
1733                                 port@1 {
1734                                         #address-cells = <1>;
1735                                         #size-cells = <0>;
1736
1737                                         reg = <1>;
1738
1739                                         vin7csi20: endpoint@0 {
1740                                                 reg = <0>;
1741                                                 remote-endpoint = <&csi20vin7>;
1742                                         };
1743                                         vin7csi40: endpoint@2 {
1744                                                 reg = <2>;
1745                                                 remote-endpoint = <&csi40vin7>;
1746                                         };
1747                                 };
1748                         };
1749                 };
1750
1751                 rcar_sound: sound@ec500000 {
1752                         /*
1753                          * #sound-dai-cells is required
1754                          *
1755                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1756                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1757                          */
1758                         /*
1759                          * #clock-cells is required for audio_clkout0/1/2/3
1760                          *
1761                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1762                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1763                          */
1764                         compatible = "renesas,rcar_sound-r8a77961", "renesas,rcar_sound-gen3";
1765                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1766                               <0 0xec5a0000 0 0x100>,  /* ADG */
1767                               <0 0xec540000 0 0x1000>, /* SSIU */
1768                               <0 0xec541000 0 0x280>,  /* SSI */
1769                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1770                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1771
1772                         clocks = <&cpg CPG_MOD 1005>,
1773                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1774                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1775                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1776                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1777                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1778                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1779                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1780                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1781                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1782                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1783                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1784                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1785                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1786                                  <&audio_clk_a>, <&audio_clk_b>,
1787                                  <&audio_clk_c>,
1788                                  <&cpg CPG_CORE R8A77961_CLK_S0D4>;
1789                         clock-names = "ssi-all",
1790                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1791                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1792                                       "ssi.1", "ssi.0",
1793                                       "src.9", "src.8", "src.7", "src.6",
1794                                       "src.5", "src.4", "src.3", "src.2",
1795                                       "src.1", "src.0",
1796                                       "mix.1", "mix.0",
1797                                       "ctu.1", "ctu.0",
1798                                       "dvc.0", "dvc.1",
1799                                       "clk_a", "clk_b", "clk_c", "clk_i";
1800                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
1801                         resets = <&cpg 1005>,
1802                                  <&cpg 1006>, <&cpg 1007>,
1803                                  <&cpg 1008>, <&cpg 1009>,
1804                                  <&cpg 1010>, <&cpg 1011>,
1805                                  <&cpg 1012>, <&cpg 1013>,
1806                                  <&cpg 1014>, <&cpg 1015>;
1807                         reset-names = "ssi-all",
1808                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1809                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1810                                       "ssi.1", "ssi.0";
1811                         status = "disabled";
1812
1813                         rcar_sound,ctu {
1814                                 ctu00: ctu-0 { };
1815                                 ctu01: ctu-1 { };
1816                                 ctu02: ctu-2 { };
1817                                 ctu03: ctu-3 { };
1818                                 ctu10: ctu-4 { };
1819                                 ctu11: ctu-5 { };
1820                                 ctu12: ctu-6 { };
1821                                 ctu13: ctu-7 { };
1822                         };
1823
1824                         rcar_sound,dvc {
1825                                 dvc0: dvc-0 {
1826                                         dmas = <&audma1 0xbc>;
1827                                         dma-names = "tx";
1828                                 };
1829                                 dvc1: dvc-1 {
1830                                         dmas = <&audma1 0xbe>;
1831                                         dma-names = "tx";
1832                                 };
1833                         };
1834
1835                         rcar_sound,mix {
1836                                 mix0: mix-0 { };
1837                                 mix1: mix-1 { };
1838                         };
1839
1840                         rcar_sound,src {
1841                                 src0: src-0 {
1842                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1843                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1844                                         dma-names = "rx", "tx";
1845                                 };
1846                                 src1: src-1 {
1847                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1848                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1849                                         dma-names = "rx", "tx";
1850                                 };
1851                                 src2: src-2 {
1852                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1853                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1854                                         dma-names = "rx", "tx";
1855                                 };
1856                                 src3: src-3 {
1857                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1858                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1859                                         dma-names = "rx", "tx";
1860                                 };
1861                                 src4: src-4 {
1862                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1863                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1864                                         dma-names = "rx", "tx";
1865                                 };
1866                                 src5: src-5 {
1867                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1868                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1869                                         dma-names = "rx", "tx";
1870                                 };
1871                                 src6: src-6 {
1872                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1873                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1874                                         dma-names = "rx", "tx";
1875                                 };
1876                                 src7: src-7 {
1877                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1878                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1879                                         dma-names = "rx", "tx";
1880                                 };
1881                                 src8: src-8 {
1882                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1883                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
1884                                         dma-names = "rx", "tx";
1885                                 };
1886                                 src9: src-9 {
1887                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1888                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
1889                                         dma-names = "rx", "tx";
1890                                 };
1891                         };
1892
1893                         rcar_sound,ssi {
1894                                 ssi0: ssi-0 {
1895                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1896                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
1897                                         dma-names = "rx", "tx";
1898                                 };
1899                                 ssi1: ssi-1 {
1900                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1901                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
1902                                         dma-names = "rx", "tx";
1903                                 };
1904                                 ssi2: ssi-2 {
1905                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1906                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
1907                                         dma-names = "rx", "tx";
1908                                 };
1909                                 ssi3: ssi-3 {
1910                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1911                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
1912                                         dma-names = "rx", "tx";
1913                                 };
1914                                 ssi4: ssi-4 {
1915                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1916                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
1917                                         dma-names = "rx", "tx";
1918                                 };
1919                                 ssi5: ssi-5 {
1920                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1921                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
1922                                         dma-names = "rx", "tx";
1923                                 };
1924                                 ssi6: ssi-6 {
1925                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1926                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
1927                                         dma-names = "rx", "tx";
1928                                 };
1929                                 ssi7: ssi-7 {
1930                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1931                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
1932                                         dma-names = "rx", "tx";
1933                                 };
1934                                 ssi8: ssi-8 {
1935                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1936                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
1937                                         dma-names = "rx", "tx";
1938                                 };
1939                                 ssi9: ssi-9 {
1940                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1941                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
1942                                         dma-names = "rx", "tx";
1943                                 };
1944                         };
1945
1946                         rcar_sound,ssiu {
1947                                 ssiu00: ssiu-0 {
1948                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
1949                                         dma-names = "rx", "tx";
1950                                 };
1951                                 ssiu01: ssiu-1 {
1952                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
1953                                         dma-names = "rx", "tx";
1954                                 };
1955                                 ssiu02: ssiu-2 {
1956                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
1957                                         dma-names = "rx", "tx";
1958                                 };
1959                                 ssiu03: ssiu-3 {
1960                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
1961                                         dma-names = "rx", "tx";
1962                                 };
1963                                 ssiu04: ssiu-4 {
1964                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
1965                                         dma-names = "rx", "tx";
1966                                 };
1967                                 ssiu05: ssiu-5 {
1968                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
1969                                         dma-names = "rx", "tx";
1970                                 };
1971                                 ssiu06: ssiu-6 {
1972                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
1973                                         dma-names = "rx", "tx";
1974                                 };
1975                                 ssiu07: ssiu-7 {
1976                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
1977                                         dma-names = "rx", "tx";
1978                                 };
1979                                 ssiu10: ssiu-8 {
1980                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
1981                                         dma-names = "rx", "tx";
1982                                 };
1983                                 ssiu11: ssiu-9 {
1984                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
1985                                         dma-names = "rx", "tx";
1986                                 };
1987                                 ssiu12: ssiu-10 {
1988                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
1989                                         dma-names = "rx", "tx";
1990                                 };
1991                                 ssiu13: ssiu-11 {
1992                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
1993                                         dma-names = "rx", "tx";
1994                                 };
1995                                 ssiu14: ssiu-12 {
1996                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
1997                                         dma-names = "rx", "tx";
1998                                 };
1999                                 ssiu15: ssiu-13 {
2000                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2001                                         dma-names = "rx", "tx";
2002                                 };
2003                                 ssiu16: ssiu-14 {
2004                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2005                                         dma-names = "rx", "tx";
2006                                 };
2007                                 ssiu17: ssiu-15 {
2008                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2009                                         dma-names = "rx", "tx";
2010                                 };
2011                                 ssiu20: ssiu-16 {
2012                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
2013                                         dma-names = "rx", "tx";
2014                                 };
2015                                 ssiu21: ssiu-17 {
2016                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
2017                                         dma-names = "rx", "tx";
2018                                 };
2019                                 ssiu22: ssiu-18 {
2020                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2021                                         dma-names = "rx", "tx";
2022                                 };
2023                                 ssiu23: ssiu-19 {
2024                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2025                                         dma-names = "rx", "tx";
2026                                 };
2027                                 ssiu24: ssiu-20 {
2028                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2029                                         dma-names = "rx", "tx";
2030                                 };
2031                                 ssiu25: ssiu-21 {
2032                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2033                                         dma-names = "rx", "tx";
2034                                 };
2035                                 ssiu26: ssiu-22 {
2036                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
2037                                         dma-names = "rx", "tx";
2038                                 };
2039                                 ssiu27: ssiu-23 {
2040                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2041                                         dma-names = "rx", "tx";
2042                                 };
2043                                 ssiu30: ssiu-24 {
2044                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
2045                                         dma-names = "rx", "tx";
2046                                 };
2047                                 ssiu31: ssiu-25 {
2048                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
2049                                         dma-names = "rx", "tx";
2050                                 };
2051                                 ssiu32: ssiu-26 {
2052                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
2053                                         dma-names = "rx", "tx";
2054                                 };
2055                                 ssiu33: ssiu-27 {
2056                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
2057                                         dma-names = "rx", "tx";
2058                                 };
2059                                 ssiu34: ssiu-28 {
2060                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
2061                                         dma-names = "rx", "tx";
2062                                 };
2063                                 ssiu35: ssiu-29 {
2064                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
2065                                         dma-names = "rx", "tx";
2066                                 };
2067                                 ssiu36: ssiu-30 {
2068                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2069                                         dma-names = "rx", "tx";
2070                                 };
2071                                 ssiu37: ssiu-31 {
2072                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2073                                         dma-names = "rx", "tx";
2074                                 };
2075                                 ssiu40: ssiu-32 {
2076                                         dmas = <&audma0 0x71>, <&audma1 0x72>;
2077                                         dma-names = "rx", "tx";
2078                                 };
2079                                 ssiu41: ssiu-33 {
2080                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2081                                         dma-names = "rx", "tx";
2082                                 };
2083                                 ssiu42: ssiu-34 {
2084                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2085                                         dma-names = "rx", "tx";
2086                                 };
2087                                 ssiu43: ssiu-35 {
2088                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2089                                         dma-names = "rx", "tx";
2090                                 };
2091                                 ssiu44: ssiu-36 {
2092                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2093                                         dma-names = "rx", "tx";
2094                                 };
2095                                 ssiu45: ssiu-37 {
2096                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2097                                         dma-names = "rx", "tx";
2098                                 };
2099                                 ssiu46: ssiu-38 {
2100                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2101                                         dma-names = "rx", "tx";
2102                                 };
2103                                 ssiu47: ssiu-39 {
2104                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2105                                         dma-names = "rx", "tx";
2106                                 };
2107                                 ssiu50: ssiu-40 {
2108                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2109                                         dma-names = "rx", "tx";
2110                                 };
2111                                 ssiu60: ssiu-41 {
2112                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2113                                         dma-names = "rx", "tx";
2114                                 };
2115                                 ssiu70: ssiu-42 {
2116                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2117                                         dma-names = "rx", "tx";
2118                                 };
2119                                 ssiu80: ssiu-43 {
2120                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2121                                         dma-names = "rx", "tx";
2122                                 };
2123                                 ssiu90: ssiu-44 {
2124                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2125                                         dma-names = "rx", "tx";
2126                                 };
2127                                 ssiu91: ssiu-45 {
2128                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2129                                         dma-names = "rx", "tx";
2130                                 };
2131                                 ssiu92: ssiu-46 {
2132                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2133                                         dma-names = "rx", "tx";
2134                                 };
2135                                 ssiu93: ssiu-47 {
2136                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2137                                         dma-names = "rx", "tx";
2138                                 };
2139                                 ssiu94: ssiu-48 {
2140                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2141                                         dma-names = "rx", "tx";
2142                                 };
2143                                 ssiu95: ssiu-49 {
2144                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2145                                         dma-names = "rx", "tx";
2146                                 };
2147                                 ssiu96: ssiu-50 {
2148                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2149                                         dma-names = "rx", "tx";
2150                                 };
2151                                 ssiu97: ssiu-51 {
2152                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2153                                         dma-names = "rx", "tx";
2154                                 };
2155                         };
2156                 };
2157
2158                 mlp: mlp@ec520000 {
2159                         compatible = "renesas,r8a77961-mlp",
2160                                      "renesas,rcar-gen3-mlp";
2161                         reg = <0 0xec520000 0 0x800>;
2162                         interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2163                                 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2164                         clocks = <&cpg CPG_MOD 802>;
2165                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2166                         resets = <&cpg 802>;
2167                         status = "disabled";
2168                 };
2169
2170                 audma0: dma-controller@ec700000 {
2171                         compatible = "renesas,dmac-r8a77961",
2172                                      "renesas,rcar-dmac";
2173                         reg = <0 0xec700000 0 0x10000>;
2174                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2175                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2176                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2177                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2178                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2179                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2180                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2181                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2182                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2183                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2184                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2185                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2186                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2187                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2188                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2189                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2190                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2191                         interrupt-names = "error",
2192                                         "ch0", "ch1", "ch2", "ch3",
2193                                         "ch4", "ch5", "ch6", "ch7",
2194                                         "ch8", "ch9", "ch10", "ch11",
2195                                         "ch12", "ch13", "ch14", "ch15";
2196                         clocks = <&cpg CPG_MOD 502>;
2197                         clock-names = "fck";
2198                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2199                         resets = <&cpg 502>;
2200                         #dma-cells = <1>;
2201                         dma-channels = <16>;
2202                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2203                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2204                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2205                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2206                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2207                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2208                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2209                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2210                 };
2211
2212                 audma1: dma-controller@ec720000 {
2213                         compatible = "renesas,dmac-r8a77961",
2214                                      "renesas,rcar-dmac";
2215                         reg = <0 0xec720000 0 0x10000>;
2216                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2217                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2218                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2219                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2220                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2221                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2222                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2223                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2224                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2225                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2226                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2227                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2228                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2229                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2230                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2231                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2232                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2233                         interrupt-names = "error",
2234                                         "ch0", "ch1", "ch2", "ch3",
2235                                         "ch4", "ch5", "ch6", "ch7",
2236                                         "ch8", "ch9", "ch10", "ch11",
2237                                         "ch12", "ch13", "ch14", "ch15";
2238                         clocks = <&cpg CPG_MOD 501>;
2239                         clock-names = "fck";
2240                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2241                         resets = <&cpg 501>;
2242                         #dma-cells = <1>;
2243                         dma-channels = <16>;
2244                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2245                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2246                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2247                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2248                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2249                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2250                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2251                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2252                 };
2253
2254                 xhci0: usb@ee000000 {
2255                         compatible = "renesas,xhci-r8a77961",
2256                                      "renesas,rcar-gen3-xhci";
2257                         reg = <0 0xee000000 0 0xc00>;
2258                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2259                         clocks = <&cpg CPG_MOD 328>;
2260                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2261                         resets = <&cpg 328>;
2262                         status = "disabled";
2263                 };
2264
2265                 usb3_peri0: usb@ee020000 {
2266                         compatible = "renesas,r8a77961-usb3-peri",
2267                                      "renesas,rcar-gen3-usb3-peri";
2268                         reg = <0 0xee020000 0 0x400>;
2269                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2270                         clocks = <&cpg CPG_MOD 328>;
2271                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2272                         resets = <&cpg 328>;
2273                         status = "disabled";
2274                 };
2275
2276                 ohci0: usb@ee080000 {
2277                         compatible = "generic-ohci";
2278                         reg = <0 0xee080000 0 0x100>;
2279                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2280                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2281                         phys = <&usb2_phy0 1>;
2282                         phy-names = "usb";
2283                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2284                         resets = <&cpg 703>, <&cpg 704>;
2285                         status = "disabled";
2286                 };
2287
2288                 ohci1: usb@ee0a0000 {
2289                         compatible = "generic-ohci";
2290                         reg = <0 0xee0a0000 0 0x100>;
2291                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2292                         clocks = <&cpg CPG_MOD 702>;
2293                         phys = <&usb2_phy1 1>;
2294                         phy-names = "usb";
2295                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2296                         resets = <&cpg 702>;
2297                         status = "disabled";
2298                 };
2299
2300                 ehci0: usb@ee080100 {
2301                         compatible = "generic-ehci";
2302                         reg = <0 0xee080100 0 0x100>;
2303                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2304                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2305                         phys = <&usb2_phy0 2>;
2306                         phy-names = "usb";
2307                         companion = <&ohci0>;
2308                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2309                         resets = <&cpg 703>, <&cpg 704>;
2310                         status = "disabled";
2311                 };
2312
2313                 ehci1: usb@ee0a0100 {
2314                         compatible = "generic-ehci";
2315                         reg = <0 0xee0a0100 0 0x100>;
2316                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2317                         clocks = <&cpg CPG_MOD 702>;
2318                         phys = <&usb2_phy1 2>;
2319                         phy-names = "usb";
2320                         companion = <&ohci1>;
2321                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2322                         resets = <&cpg 702>;
2323                         status = "disabled";
2324                 };
2325
2326                 usb2_phy0: usb-phy@ee080200 {
2327                         compatible = "renesas,usb2-phy-r8a77961",
2328                                      "renesas,rcar-gen3-usb2-phy";
2329                         reg = <0 0xee080200 0 0x700>;
2330                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2331                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2332                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2333                         resets = <&cpg 703>, <&cpg 704>;
2334                         #phy-cells = <1>;
2335                         status = "disabled";
2336                 };
2337
2338                 usb2_phy1: usb-phy@ee0a0200 {
2339                         compatible = "renesas,usb2-phy-r8a77961",
2340                                      "renesas,rcar-gen3-usb2-phy";
2341                         reg = <0 0xee0a0200 0 0x700>;
2342                         clocks = <&cpg CPG_MOD 702>;
2343                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2344                         resets = <&cpg 702>;
2345                         #phy-cells = <1>;
2346                         status = "disabled";
2347                 };
2348
2349                 sdhi0: mmc@ee100000 {
2350                         compatible = "renesas,sdhi-r8a77961",
2351                                      "renesas,rcar-gen3-sdhi";
2352                         reg = <0 0xee100000 0 0x2000>;
2353                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2354                         clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77961_CLK_SD0H>;
2355                         clock-names = "core", "clkh";
2356                         max-frequency = <200000000>;
2357                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2358                         resets = <&cpg 314>;
2359                         iommus = <&ipmmu_ds1 32>;
2360                         status = "disabled";
2361                 };
2362
2363                 sdhi1: mmc@ee120000 {
2364                         compatible = "renesas,sdhi-r8a77961",
2365                                      "renesas,rcar-gen3-sdhi";
2366                         reg = <0 0xee120000 0 0x2000>;
2367                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2368                         clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77961_CLK_SD1H>;
2369                         clock-names = "core", "clkh";
2370                         max-frequency = <200000000>;
2371                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2372                         resets = <&cpg 313>;
2373                         iommus = <&ipmmu_ds1 33>;
2374                         status = "disabled";
2375                 };
2376
2377                 sdhi2: mmc@ee140000 {
2378                         compatible = "renesas,sdhi-r8a77961",
2379                                      "renesas,rcar-gen3-sdhi";
2380                         reg = <0 0xee140000 0 0x2000>;
2381                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2382                         clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77961_CLK_SD2H>;
2383                         clock-names = "core", "clkh";
2384                         max-frequency = <200000000>;
2385                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2386                         resets = <&cpg 312>;
2387                         iommus = <&ipmmu_ds1 34>;
2388                         status = "disabled";
2389                 };
2390
2391                 sdhi3: mmc@ee160000 {
2392                         compatible = "renesas,sdhi-r8a77961",
2393                                      "renesas,rcar-gen3-sdhi";
2394                         reg = <0 0xee160000 0 0x2000>;
2395                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2396                         clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77961_CLK_SD3H>;
2397                         clock-names = "core", "clkh";
2398                         max-frequency = <200000000>;
2399                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2400                         resets = <&cpg 311>;
2401                         iommus = <&ipmmu_ds1 35>;
2402                         status = "disabled";
2403                 };
2404
2405                 rpc: spi@ee200000 {
2406                         compatible = "renesas,r8a77961-rpc-if",
2407                                      "renesas,rcar-gen3-rpc-if";
2408                         reg = <0 0xee200000 0 0x200>,
2409                               <0 0x08000000 0 0x04000000>,
2410                               <0 0xee208000 0 0x100>;
2411                         reg-names = "regs", "dirmap", "wbuf";
2412                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2413                         clocks = <&cpg CPG_MOD 917>;
2414                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2415                         resets = <&cpg 917>;
2416                         #address-cells = <1>;
2417                         #size-cells = <0>;
2418                         status = "disabled";
2419                 };
2420
2421                 gic: interrupt-controller@f1010000 {
2422                         compatible = "arm,gic-400";
2423                         #interrupt-cells = <3>;
2424                         #address-cells = <0>;
2425                         interrupt-controller;
2426                         reg = <0x0 0xf1010000 0 0x1000>,
2427                               <0x0 0xf1020000 0 0x20000>,
2428                               <0x0 0xf1040000 0 0x20000>,
2429                               <0x0 0xf1060000 0 0x20000>;
2430                         interrupts = <GIC_PPI 9
2431                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2432                         clocks = <&cpg CPG_MOD 408>;
2433                         clock-names = "clk";
2434                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2435                         resets = <&cpg 408>;
2436                 };
2437
2438                 pciec0: pcie@fe000000 {
2439                         compatible = "renesas,pcie-r8a77961",
2440                                      "renesas,pcie-rcar-gen3";
2441                         reg = <0 0xfe000000 0 0x80000>;
2442                         #address-cells = <3>;
2443                         #size-cells = <2>;
2444                         bus-range = <0x00 0xff>;
2445                         device_type = "pci";
2446                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2447                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2448                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2449                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2450                         /* Map all possible DDR as inbound ranges */
2451                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2452                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2453                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2454                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2455                         #interrupt-cells = <1>;
2456                         interrupt-map-mask = <0 0 0 0>;
2457                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2458                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2459                         clock-names = "pcie", "pcie_bus";
2460                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2461                         resets = <&cpg 319>;
2462                         status = "disabled";
2463                 };
2464
2465                 pciec1: pcie@ee800000 {
2466                         compatible = "renesas,pcie-r8a77961",
2467                                      "renesas,pcie-rcar-gen3";
2468                         reg = <0 0xee800000 0 0x80000>;
2469                         #address-cells = <3>;
2470                         #size-cells = <2>;
2471                         bus-range = <0x00 0xff>;
2472                         device_type = "pci";
2473                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2474                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2475                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2476                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2477                         /* Map all possible DDR as inbound ranges */
2478                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2479                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2480                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2481                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2482                         #interrupt-cells = <1>;
2483                         interrupt-map-mask = <0 0 0 0>;
2484                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2485                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2486                         clock-names = "pcie", "pcie_bus";
2487                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2488                         resets = <&cpg 318>;
2489                         status = "disabled";
2490                 };
2491
2492                 fcpf0: fcp@fe950000 {
2493                         compatible = "renesas,fcpf";
2494                         reg = <0 0xfe950000 0 0x200>;
2495                         clocks = <&cpg CPG_MOD 615>;
2496                         power-domains = <&sysc R8A77961_PD_A3VC>;
2497                         resets = <&cpg 615>;
2498                 };
2499
2500                 fcpvb0: fcp@fe96f000 {
2501                         compatible = "renesas,fcpv";
2502                         reg = <0 0xfe96f000 0 0x200>;
2503                         clocks = <&cpg CPG_MOD 607>;
2504                         power-domains = <&sysc R8A77961_PD_A3VC>;
2505                         resets = <&cpg 607>;
2506                 };
2507
2508                 fcpvi0: fcp@fe9af000 {
2509                         compatible = "renesas,fcpv";
2510                         reg = <0 0xfe9af000 0 0x200>;
2511                         clocks = <&cpg CPG_MOD 611>;
2512                         power-domains = <&sysc R8A77961_PD_A3VC>;
2513                         resets = <&cpg 611>;
2514                         iommus = <&ipmmu_vc0 19>;
2515                 };
2516
2517                 fcpvd0: fcp@fea27000 {
2518                         compatible = "renesas,fcpv";
2519                         reg = <0 0xfea27000 0 0x200>;
2520                         clocks = <&cpg CPG_MOD 603>;
2521                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2522                         resets = <&cpg 603>;
2523                         iommus = <&ipmmu_vi0 8>;
2524                 };
2525
2526                 fcpvd1: fcp@fea2f000 {
2527                         compatible = "renesas,fcpv";
2528                         reg = <0 0xfea2f000 0 0x200>;
2529                         clocks = <&cpg CPG_MOD 602>;
2530                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2531                         resets = <&cpg 602>;
2532                         iommus = <&ipmmu_vi0 9>;
2533                 };
2534
2535                 fcpvd2: fcp@fea37000 {
2536                         compatible = "renesas,fcpv";
2537                         reg = <0 0xfea37000 0 0x200>;
2538                         clocks = <&cpg CPG_MOD 601>;
2539                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2540                         resets = <&cpg 601>;
2541                         iommus = <&ipmmu_vi0 10>;
2542                 };
2543
2544                 vspb: vsp@fe960000 {
2545                         compatible = "renesas,vsp2";
2546                         reg = <0 0xfe960000 0 0x8000>;
2547                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2548                         clocks = <&cpg CPG_MOD 626>;
2549                         power-domains = <&sysc R8A77961_PD_A3VC>;
2550                         resets = <&cpg 626>;
2551
2552                         renesas,fcp = <&fcpvb0>;
2553                 };
2554
2555                 vspd0: vsp@fea20000 {
2556                         compatible = "renesas,vsp2";
2557                         reg = <0 0xfea20000 0 0x5000>;
2558                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2559                         clocks = <&cpg CPG_MOD 623>;
2560                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2561                         resets = <&cpg 623>;
2562
2563                         renesas,fcp = <&fcpvd0>;
2564                 };
2565
2566                 vspd1: vsp@fea28000 {
2567                         compatible = "renesas,vsp2";
2568                         reg = <0 0xfea28000 0 0x5000>;
2569                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2570                         clocks = <&cpg CPG_MOD 622>;
2571                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2572                         resets = <&cpg 622>;
2573
2574                         renesas,fcp = <&fcpvd1>;
2575                 };
2576
2577                 vspd2: vsp@fea30000 {
2578                         compatible = "renesas,vsp2";
2579                         reg = <0 0xfea30000 0 0x5000>;
2580                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2581                         clocks = <&cpg CPG_MOD 621>;
2582                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2583                         resets = <&cpg 621>;
2584
2585                         renesas,fcp = <&fcpvd2>;
2586                 };
2587
2588                 vspi0: vsp@fe9a0000 {
2589                         compatible = "renesas,vsp2";
2590                         reg = <0 0xfe9a0000 0 0x8000>;
2591                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2592                         clocks = <&cpg CPG_MOD 631>;
2593                         power-domains = <&sysc R8A77961_PD_A3VC>;
2594                         resets = <&cpg 631>;
2595
2596                         renesas,fcp = <&fcpvi0>;
2597                 };
2598
2599                 csi20: csi2@fea80000 {
2600                         compatible = "renesas,r8a77961-csi2";
2601                         reg = <0 0xfea80000 0 0x10000>;
2602                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2603                         clocks = <&cpg CPG_MOD 714>;
2604                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2605                         resets = <&cpg 714>;
2606                         status = "disabled";
2607
2608                         ports {
2609                                 #address-cells = <1>;
2610                                 #size-cells = <0>;
2611
2612                                 port@0 {
2613                                         reg = <0>;
2614                                 };
2615
2616                                 port@1 {
2617                                         #address-cells = <1>;
2618                                         #size-cells = <0>;
2619
2620                                         reg = <1>;
2621
2622                                         csi20vin0: endpoint@0 {
2623                                                 reg = <0>;
2624                                                 remote-endpoint = <&vin0csi20>;
2625                                         };
2626                                         csi20vin1: endpoint@1 {
2627                                                 reg = <1>;
2628                                                 remote-endpoint = <&vin1csi20>;
2629                                         };
2630                                         csi20vin2: endpoint@2 {
2631                                                 reg = <2>;
2632                                                 remote-endpoint = <&vin2csi20>;
2633                                         };
2634                                         csi20vin3: endpoint@3 {
2635                                                 reg = <3>;
2636                                                 remote-endpoint = <&vin3csi20>;
2637                                         };
2638                                         csi20vin4: endpoint@4 {
2639                                                 reg = <4>;
2640                                                 remote-endpoint = <&vin4csi20>;
2641                                         };
2642                                         csi20vin5: endpoint@5 {
2643                                                 reg = <5>;
2644                                                 remote-endpoint = <&vin5csi20>;
2645                                         };
2646                                         csi20vin6: endpoint@6 {
2647                                                 reg = <6>;
2648                                                 remote-endpoint = <&vin6csi20>;
2649                                         };
2650                                         csi20vin7: endpoint@7 {
2651                                                 reg = <7>;
2652                                                 remote-endpoint = <&vin7csi20>;
2653                                         };
2654                                 };
2655                         };
2656                 };
2657
2658                 csi40: csi2@feaa0000 {
2659                         compatible = "renesas,r8a77961-csi2";
2660                         reg = <0 0xfeaa0000 0 0x10000>;
2661                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2662                         clocks = <&cpg CPG_MOD 716>;
2663                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2664                         resets = <&cpg 716>;
2665                         status = "disabled";
2666
2667                         ports {
2668                                 #address-cells = <1>;
2669                                 #size-cells = <0>;
2670
2671                                 port@0 {
2672                                         reg = <0>;
2673                                 };
2674
2675                                 port@1 {
2676                                         #address-cells = <1>;
2677                                         #size-cells = <0>;
2678
2679                                         reg = <1>;
2680
2681                                         csi40vin0: endpoint@0 {
2682                                                 reg = <0>;
2683                                                 remote-endpoint = <&vin0csi40>;
2684                                         };
2685                                         csi40vin1: endpoint@1 {
2686                                                 reg = <1>;
2687                                                 remote-endpoint = <&vin1csi40>;
2688                                         };
2689                                         csi40vin2: endpoint@2 {
2690                                                 reg = <2>;
2691                                                 remote-endpoint = <&vin2csi40>;
2692                                         };
2693                                         csi40vin3: endpoint@3 {
2694                                                 reg = <3>;
2695                                                 remote-endpoint = <&vin3csi40>;
2696                                         };
2697                                         csi40vin4: endpoint@4 {
2698                                                 reg = <4>;
2699                                                 remote-endpoint = <&vin4csi40>;
2700                                         };
2701                                         csi40vin5: endpoint@5 {
2702                                                 reg = <5>;
2703                                                 remote-endpoint = <&vin5csi40>;
2704                                         };
2705                                         csi40vin6: endpoint@6 {
2706                                                 reg = <6>;
2707                                                 remote-endpoint = <&vin6csi40>;
2708                                         };
2709                                         csi40vin7: endpoint@7 {
2710                                                 reg = <7>;
2711                                                 remote-endpoint = <&vin7csi40>;
2712                                         };
2713                                 };
2714
2715                         };
2716                 };
2717
2718                 hdmi0: hdmi@fead0000 {
2719                         compatible = "renesas,r8a77961-hdmi", "renesas,rcar-gen3-hdmi";
2720                         reg = <0 0xfead0000 0 0x10000>;
2721                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2722                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A77961_CLK_HDMI>;
2723                         clock-names = "iahb", "isfr";
2724                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2725                         resets = <&cpg 729>;
2726                         status = "disabled";
2727
2728                         ports {
2729                                 #address-cells = <1>;
2730                                 #size-cells = <0>;
2731                                 port@0 {
2732                                         reg = <0>;
2733                                         dw_hdmi0_in: endpoint {
2734                                                 remote-endpoint = <&du_out_hdmi0>;
2735                                         };
2736                                 };
2737                                 port@1 {
2738                                         reg = <1>;
2739                                 };
2740                                 port@2 {
2741                                         /* HDMI sound */
2742                                         reg = <2>;
2743                                 };
2744                         };
2745                 };
2746
2747                 du: display@feb00000 {
2748                         compatible = "renesas,du-r8a77961";
2749                         reg = <0 0xfeb00000 0 0x70000>;
2750                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2751                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2752                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2753                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2754                                  <&cpg CPG_MOD 722>;
2755                         clock-names = "du.0", "du.1", "du.2";
2756                         resets = <&cpg 724>, <&cpg 722>;
2757                         reset-names = "du.0", "du.2";
2758
2759                         renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2760                         status = "disabled";
2761
2762                         ports {
2763                                 #address-cells = <1>;
2764                                 #size-cells = <0>;
2765
2766                                 port@0 {
2767                                         reg = <0>;
2768                                 };
2769                                 port@1 {
2770                                         reg = <1>;
2771                                         du_out_hdmi0: endpoint {
2772                                                 remote-endpoint = <&dw_hdmi0_in>;
2773                                         };
2774                                 };
2775                                 port@2 {
2776                                         reg = <2>;
2777                                         du_out_lvds0: endpoint {
2778                                                 remote-endpoint = <&lvds0_in>;
2779                                         };
2780                                 };
2781                         };
2782                 };
2783
2784                 lvds0: lvds@feb90000 {
2785                         compatible = "renesas,r8a77961-lvds";
2786                         reg = <0 0xfeb90000 0 0x14>;
2787                         clocks = <&cpg CPG_MOD 727>;
2788                         power-domains = <&sysc R8A77961_PD_ALWAYS_ON>;
2789                         resets = <&cpg 727>;
2790                         status = "disabled";
2791
2792                         ports {
2793                                 #address-cells = <1>;
2794                                 #size-cells = <0>;
2795
2796                                 port@0 {
2797                                         reg = <0>;
2798                                         lvds0_in: endpoint {
2799                                                 remote-endpoint = <&du_out_lvds0>;
2800                                         };
2801                                 };
2802                                 port@1 {
2803                                         reg = <1>;
2804                                 };
2805                         };
2806                 };
2807
2808                 prr: chipid@fff00044 {
2809                         compatible = "renesas,prr";
2810                         reg = <0 0xfff00044 0 4>;
2811                 };
2812         };
2813
2814         thermal-zones {
2815                 sensor1_thermal: sensor1-thermal {
2816                         polling-delay-passive = <250>;
2817                         polling-delay = <1000>;
2818                         thermal-sensors = <&tsc 0>;
2819                         sustainable-power = <3874>;
2820
2821                         trips {
2822                                 sensor1_crit: sensor1-crit {
2823                                         temperature = <120000>;
2824                                         hysteresis = <1000>;
2825                                         type = "critical";
2826                                 };
2827                         };
2828                 };
2829
2830                 sensor2_thermal: sensor2-thermal {
2831                         polling-delay-passive = <250>;
2832                         polling-delay = <1000>;
2833                         thermal-sensors = <&tsc 1>;
2834                         sustainable-power = <3874>;
2835
2836                         trips {
2837                                 sensor2_crit: sensor2-crit {
2838                                         temperature = <120000>;
2839                                         hysteresis = <1000>;
2840                                         type = "critical";
2841                                 };
2842                         };
2843                 };
2844
2845                 sensor3_thermal: sensor3-thermal {
2846                         polling-delay-passive = <250>;
2847                         polling-delay = <1000>;
2848                         thermal-sensors = <&tsc 2>;
2849                         sustainable-power = <3874>;
2850
2851                         cooling-maps {
2852                                 map0 {
2853                                         trip = <&target>;
2854                                         cooling-device = <&a57_0 2 4>;
2855                                         contribution = <1024>;
2856                                 };
2857                                 map1 {
2858                                         trip = <&target>;
2859                                         cooling-device = <&a53_0 0 2>;
2860                                         contribution = <1024>;
2861                                 };
2862                         };
2863                         trips {
2864                                 target: trip-point1 {
2865                                         temperature = <100000>;
2866                                         hysteresis = <1000>;
2867                                         type = "passive";
2868                                 };
2869
2870                                 sensor3_crit: sensor3-crit {
2871                                         temperature = <120000>;
2872                                         hysteresis = <1000>;
2873                                         type = "critical";
2874                                 };
2875                         };
2876                 };
2877         };
2878
2879         timer {
2880                 compatible = "arm,armv8-timer";
2881                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2882                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2883                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
2884                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
2885         };
2886
2887         /* External USB clocks - can be overridden by the board */
2888         usb3s0_clk: usb3s0 {
2889                 compatible = "fixed-clock";
2890                 #clock-cells = <0>;
2891                 clock-frequency = <0>;
2892         };
2893
2894         usb_extal_clk: usb_extal {
2895                 compatible = "fixed-clock";
2896                 #clock-cells = <0>;
2897                 clock-frequency = <0>;
2898         };
2899 };