arch/arm64/boot/dts/renesas/r8a77960.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car M3-W (R8A77960) SoC
   4  *
   5  * Copyright (C) 2016-2017 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7796-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7796_CLK_S0D4
  13
  14 / {
  15         compatible = "renesas,r8a7796";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         /*
  20          * The external audio clocks are configured as 0 Hz fixed frequency
  21          * clocks by default.
  22          * Boards that provide audio clocks should override them.
  23          */
  24         audio_clk_a: audio_clk_a {
  25                 compatible = "fixed-clock";
  26                 #clock-cells = <0>;
  27                 clock-frequency = <0>;
  28         };
  29
  30         audio_clk_b: audio_clk_b {
  31                 compatible = "fixed-clock";
  32                 #clock-cells = <0>;
  33                 clock-frequency = <0>;
  34         };
  35
  36         audio_clk_c: audio_clk_c {
  37                 compatible = "fixed-clock";
  38                 #clock-cells = <0>;
  39                 clock-frequency = <0>;
  40         };
  41
  42         /* External CAN clock - to be overridden by boards that provide it */
  43         can_clk: can {
  44                 compatible = "fixed-clock";
  45                 #clock-cells = <0>;
  46                 clock-frequency = <0>;
  47         };
  48
  49         cluster0_opp: opp-table-0 {
  50                 compatible = "operating-points-v2";
  51                 opp-shared;
  52
  53                 opp-500000000 {
  54                         opp-hz = /bits/ 64 <500000000>;
  55                         opp-microvolt = <830000>;
  56                         clock-latency-ns = <300000>;
  57                 };
  58                 opp-1000000000 {
  59                         opp-hz = /bits/ 64 <1000000000>;
  60                         opp-microvolt = <830000>;
  61                         clock-latency-ns = <300000>;
  62                 };
  63                 opp-1500000000 {
  64                         opp-hz = /bits/ 64 <1500000000>;
  65                         opp-microvolt = <830000>;
  66                         clock-latency-ns = <300000>;
  67                         opp-suspend;
  68                 };
  69                 opp-1600000000 {
  70                         opp-hz = /bits/ 64 <1600000000>;
  71                         opp-microvolt = <900000>;
  72                         clock-latency-ns = <300000>;
  73                         turbo-mode;
  74                 };
  75                 opp-1700000000 {
  76                         opp-hz = /bits/ 64 <1700000000>;
  77                         opp-microvolt = <900000>;
  78                         clock-latency-ns = <300000>;
  79                         turbo-mode;
  80                 };
  81                 opp-1800000000 {
  82                         opp-hz = /bits/ 64 <1800000000>;
  83                         opp-microvolt = <960000>;
  84                         clock-latency-ns = <300000>;
  85                         turbo-mode;
  86                 };
  87         };
  88
  89         cluster1_opp: opp-table-1 {
  90                 compatible = "operating-points-v2";
  91                 opp-shared;
  92
  93                 opp-800000000 {
  94                         opp-hz = /bits/ 64 <800000000>;
  95                         opp-microvolt = <820000>;
  96                         clock-latency-ns = <300000>;
  97                 };
  98                 opp-1000000000 {
  99                         opp-hz = /bits/ 64 <1000000000>;
 100                         opp-microvolt = <820000>;
 101                         clock-latency-ns = <300000>;
 102                 };
 103                 opp-1200000000 {
 104                         opp-hz = /bits/ 64 <1200000000>;
 105                         opp-microvolt = <820000>;
 106                         clock-latency-ns = <300000>;
 107                 };
 108                 opp-1300000000 {
 109                         opp-hz = /bits/ 64 <1300000000>;
 110                         opp-microvolt = <820000>;
 111                         clock-latency-ns = <300000>;
 112                         turbo-mode;
 113                 };
 114         };
 115
 116         cpus {
 117                 #address-cells = <1>;
 118                 #size-cells = <0>;
 119
 120                 cpu-map {
 121                         cluster0 {
 122                                 core0 {
 123                                         cpu = <&a57_0>;
 124                                 };
 125                                 core1 {
 126                                         cpu = <&a57_1>;
 127                                 };
 128                         };
 129
 130                         cluster1 {
 131                                 core0 {
 132                                         cpu = <&a53_0>;
 133                                 };
 134                                 core1 {
 135                                         cpu = <&a53_1>;
 136                                 };
 137                                 core2 {
 138                                         cpu = <&a53_2>;
 139                                 };
 140                                 core3 {
 141                                         cpu = <&a53_3>;
 142                                 };
 143                         };
 144                 };
 145
 146                 a57_0: cpu@0 {
 147                         compatible = "arm,cortex-a57";
 148                         reg = <0x0>;
 149                         device_type = "cpu";
 150                         power-domains = <&sysc R8A7796_PD_CA57_CPU0>;
 151                         next-level-cache = <&L2_CA57>;
 152                         enable-method = "psci";
 153                         cpu-idle-states = <&CPU_SLEEP_0>;
 154                         dynamic-power-coefficient = <854>;
 155                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
 156                         operating-points-v2 = <&cluster0_opp>;
 157                         capacity-dmips-mhz = <1024>;
 158                         #cooling-cells = <2>;
 159                 };
 160
 161                 a57_1: cpu@1 {
 162                         compatible = "arm,cortex-a57";
 163                         reg = <0x1>;
 164                         device_type = "cpu";
 165                         power-domains = <&sysc R8A7796_PD_CA57_CPU1>;
 166                         next-level-cache = <&L2_CA57>;
 167                         enable-method = "psci";
 168                         cpu-idle-states = <&CPU_SLEEP_0>;
 169                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z>;
 170                         operating-points-v2 = <&cluster0_opp>;
 171                         capacity-dmips-mhz = <1024>;
 172                         #cooling-cells = <2>;
 173                 };
 174
 175                 a53_0: cpu@100 {
 176                         compatible = "arm,cortex-a53";
 177                         reg = <0x100>;
 178                         device_type = "cpu";
 179                         power-domains = <&sysc R8A7796_PD_CA53_CPU0>;
 180                         next-level-cache = <&L2_CA53>;
 181                         enable-method = "psci";
 182                         cpu-idle-states = <&CPU_SLEEP_1>;
 183                         #cooling-cells = <2>;
 184                         dynamic-power-coefficient = <277>;
 185                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 186                         operating-points-v2 = <&cluster1_opp>;
 187                         capacity-dmips-mhz = <535>;
 188                 };
 189
 190                 a53_1: cpu@101 {
 191                         compatible = "arm,cortex-a53";
 192                         reg = <0x101>;
 193                         device_type = "cpu";
 194                         power-domains = <&sysc R8A7796_PD_CA53_CPU1>;
 195                         next-level-cache = <&L2_CA53>;
 196                         enable-method = "psci";
 197                         cpu-idle-states = <&CPU_SLEEP_1>;
 198                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 199                         operating-points-v2 = <&cluster1_opp>;
 200                         capacity-dmips-mhz = <535>;
 201                 };
 202
 203                 a53_2: cpu@102 {
 204                         compatible = "arm,cortex-a53";
 205                         reg = <0x102>;
 206                         device_type = "cpu";
 207                         power-domains = <&sysc R8A7796_PD_CA53_CPU2>;
 208                         next-level-cache = <&L2_CA53>;
 209                         enable-method = "psci";
 210                         cpu-idle-states = <&CPU_SLEEP_1>;
 211                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 212                         operating-points-v2 = <&cluster1_opp>;
 213                         capacity-dmips-mhz = <535>;
 214                 };
 215
 216                 a53_3: cpu@103 {
 217                         compatible = "arm,cortex-a53";
 218                         reg = <0x103>;
 219                         device_type = "cpu";
 220                         power-domains = <&sysc R8A7796_PD_CA53_CPU3>;
 221                         next-level-cache = <&L2_CA53>;
 222                         enable-method = "psci";
 223                         cpu-idle-states = <&CPU_SLEEP_1>;
 224                         clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>;
 225                         operating-points-v2 = <&cluster1_opp>;
 226                         capacity-dmips-mhz = <535>;
 227                 };
 228
 229                 L2_CA57: cache-controller-0 {
 230                         compatible = "cache";
 231                         power-domains = <&sysc R8A7796_PD_CA57_SCU>;
 232                         cache-unified;
 233                         cache-level = <2>;
 234                 };
 235
 236                 L2_CA53: cache-controller-1 {
 237                         compatible = "cache";
 238                         power-domains = <&sysc R8A7796_PD_CA53_SCU>;
 239                         cache-unified;
 240                         cache-level = <2>;
 241                 };
 242
 243                 idle-states {
 244                         entry-method = "psci";
 245
 246                         CPU_SLEEP_0: cpu-sleep-0 {
 247                                 compatible = "arm,idle-state";
 248                                 arm,psci-suspend-param = <0x0010000>;
 249                                 local-timer-stop;
 250                                 entry-latency-us = <400>;
 251                                 exit-latency-us = <500>;
 252                                 min-residency-us = <4000>;
 253                         };
 254
 255                         CPU_SLEEP_1: cpu-sleep-1 {
 256                                 compatible = "arm,idle-state";
 257                                 arm,psci-suspend-param = <0x0010000>;
 258                                 local-timer-stop;
 259                                 entry-latency-us = <700>;
 260                                 exit-latency-us = <700>;
 261                                 min-residency-us = <5000>;
 262                         };
 263                 };
 264         };
 265
 266         extal_clk: extal {
 267                 compatible = "fixed-clock";
 268                 #clock-cells = <0>;
 269                 /* This value must be overridden by the board */
 270                 clock-frequency = <0>;
 271         };
 272
 273         extalr_clk: extalr {
 274                 compatible = "fixed-clock";
 275                 #clock-cells = <0>;
 276                 /* This value must be overridden by the board */
 277                 clock-frequency = <0>;
 278         };
 279
 280         /* External PCIe clock - can be overridden by the board */
 281         pcie_bus_clk: pcie_bus {
 282                 compatible = "fixed-clock";
 283                 #clock-cells = <0>;
 284                 clock-frequency = <0>;
 285         };
 286
 287         pmu_a53 {
 288                 compatible = "arm,cortex-a53-pmu";
 289                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 290                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 291                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 292                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 293                 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
 294         };
 295
 296         pmu_a57 {
 297                 compatible = "arm,cortex-a57-pmu";
 298                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 299                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 300                 interrupt-affinity = <&a57_0>, <&a57_1>;
 301         };
 302
 303         psci {
 304                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 305                 method = "smc";
 306         };
 307
 308         /* External SCIF clock - to be overridden by boards that provide it */
 309         scif_clk: scif {
 310                 compatible = "fixed-clock";
 311                 #clock-cells = <0>;
 312                 clock-frequency = <0>;
 313         };
 314
 315         soc {
 316                 compatible = "simple-bus";
 317                 interrupt-parent = <&gic>;
 318                 #address-cells = <2>;
 319                 #size-cells = <2>;
 320                 ranges;
 321
 322                 rwdt: watchdog@e6020000 {
 323                         compatible = "renesas,r8a7796-wdt",
 324                                      "renesas,rcar-gen3-wdt";
 325                         reg = <0 0xe6020000 0 0x0c>;
 326                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 327                         clocks = <&cpg CPG_MOD 402>;
 328                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 329                         resets = <&cpg 402>;
 330                         status = "disabled";
 331                 };
 332
 333                 gpio0: gpio@e6050000 {
 334                         compatible = "renesas,gpio-r8a7796",
 335                                      "renesas,rcar-gen3-gpio";
 336                         reg = <0 0xe6050000 0 0x50>;
 337                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 338                         #gpio-cells = <2>;
 339                         gpio-controller;
 340                         gpio-ranges = <&pfc 0 0 16>;
 341                         #interrupt-cells = <2>;
 342                         interrupt-controller;
 343                         clocks = <&cpg CPG_MOD 912>;
 344                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 345                         resets = <&cpg 912>;
 346                 };
 347
 348                 gpio1: gpio@e6051000 {
 349                         compatible = "renesas,gpio-r8a7796",
 350                                      "renesas,rcar-gen3-gpio";
 351                         reg = <0 0xe6051000 0 0x50>;
 352                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 353                         #gpio-cells = <2>;
 354                         gpio-controller;
 355                         gpio-ranges = <&pfc 0 32 29>;
 356                         #interrupt-cells = <2>;
 357                         interrupt-controller;
 358                         clocks = <&cpg CPG_MOD 911>;
 359                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 360                         resets = <&cpg 911>;
 361                 };
 362
 363                 gpio2: gpio@e6052000 {
 364                         compatible = "renesas,gpio-r8a7796",
 365                                      "renesas,rcar-gen3-gpio";
 366                         reg = <0 0xe6052000 0 0x50>;
 367                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 368                         #gpio-cells = <2>;
 369                         gpio-controller;
 370                         gpio-ranges = <&pfc 0 64 15>;
 371                         #interrupt-cells = <2>;
 372                         interrupt-controller;
 373                         clocks = <&cpg CPG_MOD 910>;
 374                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 375                         resets = <&cpg 910>;
 376                 };
 377
 378                 gpio3: gpio@e6053000 {
 379                         compatible = "renesas,gpio-r8a7796",
 380                                      "renesas,rcar-gen3-gpio";
 381                         reg = <0 0xe6053000 0 0x50>;
 382                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 383                         #gpio-cells = <2>;
 384                         gpio-controller;
 385                         gpio-ranges = <&pfc 0 96 16>;
 386                         #interrupt-cells = <2>;
 387                         interrupt-controller;
 388                         clocks = <&cpg CPG_MOD 909>;
 389                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 390                         resets = <&cpg 909>;
 391                 };
 392
 393                 gpio4: gpio@e6054000 {
 394                         compatible = "renesas,gpio-r8a7796",
 395                                      "renesas,rcar-gen3-gpio";
 396                         reg = <0 0xe6054000 0 0x50>;
 397                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 398                         #gpio-cells = <2>;
 399                         gpio-controller;
 400                         gpio-ranges = <&pfc 0 128 18>;
 401                         #interrupt-cells = <2>;
 402                         interrupt-controller;
 403                         clocks = <&cpg CPG_MOD 908>;
 404                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 405                         resets = <&cpg 908>;
 406                 };
 407
 408                 gpio5: gpio@e6055000 {
 409                         compatible = "renesas,gpio-r8a7796",
 410                                      "renesas,rcar-gen3-gpio";
 411                         reg = <0 0xe6055000 0 0x50>;
 412                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 413                         #gpio-cells = <2>;
 414                         gpio-controller;
 415                         gpio-ranges = <&pfc 0 160 26>;
 416                         #interrupt-cells = <2>;
 417                         interrupt-controller;
 418                         clocks = <&cpg CPG_MOD 907>;
 419                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 420                         resets = <&cpg 907>;
 421                 };
 422
 423                 gpio6: gpio@e6055400 {
 424                         compatible = "renesas,gpio-r8a7796",
 425                                      "renesas,rcar-gen3-gpio";
 426                         reg = <0 0xe6055400 0 0x50>;
 427                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 428                         #gpio-cells = <2>;
 429                         gpio-controller;
 430                         gpio-ranges = <&pfc 0 192 32>;
 431                         #interrupt-cells = <2>;
 432                         interrupt-controller;
 433                         clocks = <&cpg CPG_MOD 906>;
 434                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 435                         resets = <&cpg 906>;
 436                 };
 437
 438                 gpio7: gpio@e6055800 {
 439                         compatible = "renesas,gpio-r8a7796",
 440                                      "renesas,rcar-gen3-gpio";
 441                         reg = <0 0xe6055800 0 0x50>;
 442                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 443                         #gpio-cells = <2>;
 444                         gpio-controller;
 445                         gpio-ranges = <&pfc 0 224 4>;
 446                         #interrupt-cells = <2>;
 447                         interrupt-controller;
 448                         clocks = <&cpg CPG_MOD 905>;
 449                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 450                         resets = <&cpg 905>;
 451                 };
 452
 453                 pfc: pinctrl@e6060000 {
 454                         compatible = "renesas,pfc-r8a7796";
 455                         reg = <0 0xe6060000 0 0x50c>;
 456                 };
 457
 458                 cmt0: timer@e60f0000 {
 459                         compatible = "renesas,r8a7796-cmt0",
 460                                      "renesas,rcar-gen3-cmt0";
 461                         reg = <0 0xe60f0000 0 0x1004>;
 462                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 463                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 464                         clocks = <&cpg CPG_MOD 303>;
 465                         clock-names = "fck";
 466                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 467                         resets = <&cpg 303>;
 468                         status = "disabled";
 469                 };
 470
 471                 cmt1: timer@e6130000 {
 472                         compatible = "renesas,r8a7796-cmt1",
 473                                      "renesas,rcar-gen3-cmt1";
 474                         reg = <0 0xe6130000 0 0x1004>;
 475                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 476                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 477                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 478                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 479                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 480                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 481                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 482                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 483                         clocks = <&cpg CPG_MOD 302>;
 484                         clock-names = "fck";
 485                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 486                         resets = <&cpg 302>;
 487                         status = "disabled";
 488                 };
 489
 490                 cmt2: timer@e6140000 {
 491                         compatible = "renesas,r8a7796-cmt1",
 492                                      "renesas,rcar-gen3-cmt1";
 493                         reg = <0 0xe6140000 0 0x1004>;
 494                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 495                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 496                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 497                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 498                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 499                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 500                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 501                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 502                         clocks = <&cpg CPG_MOD 301>;
 503                         clock-names = "fck";
 504                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 505                         resets = <&cpg 301>;
 506                         status = "disabled";
 507                 };
 508
 509                 cmt3: timer@e6148000 {
 510                         compatible = "renesas,r8a7796-cmt1",
 511                                      "renesas,rcar-gen3-cmt1";
 512                         reg = <0 0xe6148000 0 0x1004>;
 513                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 514                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 515                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 516                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 517                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 518                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 519                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 520                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 521                         clocks = <&cpg CPG_MOD 300>;
 522                         clock-names = "fck";
 523                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 524                         resets = <&cpg 300>;
 525                         status = "disabled";
 526                 };
 527
 528                 cpg: clock-controller@e6150000 {
 529                         compatible = "renesas,r8a7796-cpg-mssr";
 530                         reg = <0 0xe6150000 0 0x1000>;
 531                         clocks = <&extal_clk>, <&extalr_clk>;
 532                         clock-names = "extal", "extalr";
 533                         #clock-cells = <2>;
 534                         #power-domain-cells = <0>;
 535                         #reset-cells = <1>;
 536                 };
 537
 538                 rst: reset-controller@e6160000 {
 539                         compatible = "renesas,r8a7796-rst";
 540                         reg = <0 0xe6160000 0 0x0200>;
 541                 };
 542
 543                 sysc: system-controller@e6180000 {
 544                         compatible = "renesas,r8a7796-sysc";
 545                         reg = <0 0xe6180000 0 0x0400>;
 546                         #power-domain-cells = <1>;
 547                 };
 548
 549                 tsc: thermal@e6198000 {
 550                         compatible = "renesas,r8a7796-thermal";
 551                         reg = <0 0xe6198000 0 0x100>,
 552                               <0 0xe61a0000 0 0x100>,
 553                               <0 0xe61a8000 0 0x100>;
 554                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 555                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 556                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 557                         clocks = <&cpg CPG_MOD 522>;
 558                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 559                         resets = <&cpg 522>;
 560                         #thermal-sensor-cells = <1>;
 561                 };
 562
 563                 intc_ex: interrupt-controller@e61c0000 {
 564                         compatible = "renesas,intc-ex-r8a7796", "renesas,irqc";
 565                         #interrupt-cells = <2>;
 566                         interrupt-controller;
 567                         reg = <0 0xe61c0000 0 0x200>;
 568                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 569                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 570                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 571                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 572                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 573                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 574                         clocks = <&cpg CPG_MOD 407>;
 575                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 576                         resets = <&cpg 407>;
 577                 };
 578
 579                 tmu0: timer@e61e0000 {
 580                         compatible = "renesas,tmu-r8a7796", "renesas,tmu";
 581                         reg = <0 0xe61e0000 0 0x30>;
 582                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 583                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 584                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 585                         clocks = <&cpg CPG_MOD 125>;
 586                         clock-names = "fck";
 587                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 588                         resets = <&cpg 125>;
 589                         status = "disabled";
 590                 };
 591
 592                 tmu1: timer@e6fc0000 {
 593                         compatible = "renesas,tmu-r8a7796", "renesas,tmu";
 594                         reg = <0 0xe6fc0000 0 0x30>;
 595                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 596                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 597                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 598                         clocks = <&cpg CPG_MOD 124>;
 599                         clock-names = "fck";
 600                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 601                         resets = <&cpg 124>;
 602                         status = "disabled";
 603                 };
 604
 605                 tmu2: timer@e6fd0000 {
 606                         compatible = "renesas,tmu-r8a7796", "renesas,tmu";
 607                         reg = <0 0xe6fd0000 0 0x30>;
 608                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 609                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 610                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 611                         clocks = <&cpg CPG_MOD 123>;
 612                         clock-names = "fck";
 613                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 614                         resets = <&cpg 123>;
 615                         status = "disabled";
 616                 };
 617
 618                 tmu3: timer@e6fe0000 {
 619                         compatible = "renesas,tmu-r8a7796", "renesas,tmu";
 620                         reg = <0 0xe6fe0000 0 0x30>;
 621                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 622                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 623                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 624                         clocks = <&cpg CPG_MOD 122>;
 625                         clock-names = "fck";
 626                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 627                         resets = <&cpg 122>;
 628                         status = "disabled";
 629                 };
 630
 631                 tmu4: timer@ffc00000 {
 632                         compatible = "renesas,tmu-r8a7796", "renesas,tmu";
 633                         reg = <0 0xffc00000 0 0x30>;
 634                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 635                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 636                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 637                         clocks = <&cpg CPG_MOD 121>;
 638                         clock-names = "fck";
 639                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 640                         resets = <&cpg 121>;
 641                         status = "disabled";
 642                 };
 643
 644                 i2c0: i2c@e6500000 {
 645                         #address-cells = <1>;
 646                         #size-cells = <0>;
 647                         compatible = "renesas,i2c-r8a7796",
 648                                      "renesas,rcar-gen3-i2c";
 649                         reg = <0 0xe6500000 0 0x40>;
 650                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 651                         clocks = <&cpg CPG_MOD 931>;
 652                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 653                         resets = <&cpg 931>;
 654                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 655                                <&dmac2 0x91>, <&dmac2 0x90>;
 656                         dma-names = "tx", "rx", "tx", "rx";
 657                         i2c-scl-internal-delay-ns = <110>;
 658                         status = "disabled";
 659                 };
 660
 661                 i2c1: i2c@e6508000 {
 662                         #address-cells = <1>;
 663                         #size-cells = <0>;
 664                         compatible = "renesas,i2c-r8a7796",
 665                                      "renesas,rcar-gen3-i2c";
 666                         reg = <0 0xe6508000 0 0x40>;
 667                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 668                         clocks = <&cpg CPG_MOD 930>;
 669                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 670                         resets = <&cpg 930>;
 671                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 672                                <&dmac2 0x93>, <&dmac2 0x92>;
 673                         dma-names = "tx", "rx", "tx", "rx";
 674                         i2c-scl-internal-delay-ns = <6>;
 675                         status = "disabled";
 676                 };
 677
 678                 i2c2: i2c@e6510000 {
 679                         #address-cells = <1>;
 680                         #size-cells = <0>;
 681                         compatible = "renesas,i2c-r8a7796",
 682                                      "renesas,rcar-gen3-i2c";
 683                         reg = <0 0xe6510000 0 0x40>;
 684                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 685                         clocks = <&cpg CPG_MOD 929>;
 686                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 687                         resets = <&cpg 929>;
 688                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 689                                <&dmac2 0x95>, <&dmac2 0x94>;
 690                         dma-names = "tx", "rx", "tx", "rx";
 691                         i2c-scl-internal-delay-ns = <6>;
 692                         status = "disabled";
 693                 };
 694
 695                 i2c3: i2c@e66d0000 {
 696                         #address-cells = <1>;
 697                         #size-cells = <0>;
 698                         compatible = "renesas,i2c-r8a7796",
 699                                      "renesas,rcar-gen3-i2c";
 700                         reg = <0 0xe66d0000 0 0x40>;
 701                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 702                         clocks = <&cpg CPG_MOD 928>;
 703                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 704                         resets = <&cpg 928>;
 705                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 706                         dma-names = "tx", "rx";
 707                         i2c-scl-internal-delay-ns = <110>;
 708                         status = "disabled";
 709                 };
 710
 711                 i2c4: i2c@e66d8000 {
 712                         #address-cells = <1>;
 713                         #size-cells = <0>;
 714                         compatible = "renesas,i2c-r8a7796",
 715                                      "renesas,rcar-gen3-i2c";
 716                         reg = <0 0xe66d8000 0 0x40>;
 717                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 718                         clocks = <&cpg CPG_MOD 927>;
 719                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 720                         resets = <&cpg 927>;
 721                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 722                         dma-names = "tx", "rx";
 723                         i2c-scl-internal-delay-ns = <110>;
 724                         status = "disabled";
 725                 };
 726
 727                 i2c5: i2c@e66e0000 {
 728                         #address-cells = <1>;
 729                         #size-cells = <0>;
 730                         compatible = "renesas,i2c-r8a7796",
 731                                      "renesas,rcar-gen3-i2c";
 732                         reg = <0 0xe66e0000 0 0x40>;
 733                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 734                         clocks = <&cpg CPG_MOD 919>;
 735                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 736                         resets = <&cpg 919>;
 737                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 738                         dma-names = "tx", "rx";
 739                         i2c-scl-internal-delay-ns = <110>;
 740                         status = "disabled";
 741                 };
 742
 743                 i2c6: i2c@e66e8000 {
 744                         #address-cells = <1>;
 745                         #size-cells = <0>;
 746                         compatible = "renesas,i2c-r8a7796",
 747                                      "renesas,rcar-gen3-i2c";
 748                         reg = <0 0xe66e8000 0 0x40>;
 749                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 750                         clocks = <&cpg CPG_MOD 918>;
 751                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 752                         resets = <&cpg 918>;
 753                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 754                         dma-names = "tx", "rx";
 755                         i2c-scl-internal-delay-ns = <6>;
 756                         status = "disabled";
 757                 };
 758
 759                 i2c_dvfs: i2c@e60b0000 {
 760                         #address-cells = <1>;
 761                         #size-cells = <0>;
 762                         compatible = "renesas,iic-r8a7796",
 763                                      "renesas,rcar-gen3-iic",
 764                                      "renesas,rmobile-iic";
 765                         reg = <0 0xe60b0000 0 0x425>;
 766                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 767                         clocks = <&cpg CPG_MOD 926>;
 768                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 769                         resets = <&cpg 926>;
 770                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 771                         dma-names = "tx", "rx";
 772                         status = "disabled";
 773                 };
 774
 775                 hscif0: serial@e6540000 {
 776                         compatible = "renesas,hscif-r8a7796",
 777                                      "renesas,rcar-gen3-hscif",
 778                                      "renesas,hscif";
 779                         reg = <0 0xe6540000 0 0x60>;
 780                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 781                         clocks = <&cpg CPG_MOD 520>,
 782                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 783                                  <&scif_clk>;
 784                         clock-names = "fck", "brg_int", "scif_clk";
 785                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 786                                <&dmac2 0x31>, <&dmac2 0x30>;
 787                         dma-names = "tx", "rx", "tx", "rx";
 788                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 789                         resets = <&cpg 520>;
 790                         status = "disabled";
 791                 };
 792
 793                 hscif1: serial@e6550000 {
 794                         compatible = "renesas,hscif-r8a7796",
 795                                      "renesas,rcar-gen3-hscif",
 796                                      "renesas,hscif";
 797                         reg = <0 0xe6550000 0 0x60>;
 798                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 799                         clocks = <&cpg CPG_MOD 519>,
 800                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 801                                  <&scif_clk>;
 802                         clock-names = "fck", "brg_int", "scif_clk";
 803                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 804                                <&dmac2 0x33>, <&dmac2 0x32>;
 805                         dma-names = "tx", "rx", "tx", "rx";
 806                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 807                         resets = <&cpg 519>;
 808                         status = "disabled";
 809                 };
 810
 811                 hscif2: serial@e6560000 {
 812                         compatible = "renesas,hscif-r8a7796",
 813                                      "renesas,rcar-gen3-hscif",
 814                                      "renesas,hscif";
 815                         reg = <0 0xe6560000 0 0x60>;
 816                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 817                         clocks = <&cpg CPG_MOD 518>,
 818                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 819                                  <&scif_clk>;
 820                         clock-names = "fck", "brg_int", "scif_clk";
 821                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 822                                <&dmac2 0x35>, <&dmac2 0x34>;
 823                         dma-names = "tx", "rx", "tx", "rx";
 824                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 825                         resets = <&cpg 518>;
 826                         status = "disabled";
 827                 };
 828
 829                 hscif3: serial@e66a0000 {
 830                         compatible = "renesas,hscif-r8a7796",
 831                                      "renesas,rcar-gen3-hscif",
 832                                      "renesas,hscif";
 833                         reg = <0 0xe66a0000 0 0x60>;
 834                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 835                         clocks = <&cpg CPG_MOD 517>,
 836                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 837                                  <&scif_clk>;
 838                         clock-names = "fck", "brg_int", "scif_clk";
 839                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 840                         dma-names = "tx", "rx";
 841                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 842                         resets = <&cpg 517>;
 843                         status = "disabled";
 844                 };
 845
 846                 hscif4: serial@e66b0000 {
 847                         compatible = "renesas,hscif-r8a7796",
 848                                      "renesas,rcar-gen3-hscif",
 849                                      "renesas,hscif";
 850                         reg = <0 0xe66b0000 0 0x60>;
 851                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 852                         clocks = <&cpg CPG_MOD 516>,
 853                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
 854                                  <&scif_clk>;
 855                         clock-names = "fck", "brg_int", "scif_clk";
 856                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 857                         dma-names = "tx", "rx";
 858                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 859                         resets = <&cpg 516>;
 860                         status = "disabled";
 861                 };
 862
 863                 hsusb: usb@e6590000 {
 864                         compatible = "renesas,usbhs-r8a7796",
 865                                      "renesas,rcar-gen3-usbhs";
 866                         reg = <0 0xe6590000 0 0x200>;
 867                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 868                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 869                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 870                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 871                         dma-names = "ch0", "ch1", "ch2", "ch3";
 872                         renesas,buswait = <11>;
 873                         phys = <&usb2_phy0 3>;
 874                         phy-names = "usb";
 875                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 876                         resets = <&cpg 704>, <&cpg 703>;
 877                         status = "disabled";
 878                 };
 879
 880                 usb_dmac0: dma-controller@e65a0000 {
 881                         compatible = "renesas,r8a7796-usb-dmac",
 882                                      "renesas,usb-dmac";
 883                         reg = <0 0xe65a0000 0 0x100>;
 884                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 885                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 886                         interrupt-names = "ch0", "ch1";
 887                         clocks = <&cpg CPG_MOD 330>;
 888                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 889                         resets = <&cpg 330>;
 890                         #dma-cells = <1>;
 891                         dma-channels = <2>;
 892                 };
 893
 894                 usb_dmac1: dma-controller@e65b0000 {
 895                         compatible = "renesas,r8a7796-usb-dmac",
 896                                      "renesas,usb-dmac";
 897                         reg = <0 0xe65b0000 0 0x100>;
 898                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 899                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 900                         interrupt-names = "ch0", "ch1";
 901                         clocks = <&cpg CPG_MOD 331>;
 902                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 903                         resets = <&cpg 331>;
 904                         #dma-cells = <1>;
 905                         dma-channels = <2>;
 906                 };
 907
 908                 usb3_phy0: usb-phy@e65ee000 {
 909                         compatible = "renesas,r8a7796-usb3-phy",
 910                                      "renesas,rcar-gen3-usb3-phy";
 911                         reg = <0 0xe65ee000 0 0x90>;
 912                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 913                                  <&usb_extal_clk>;
 914                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 915                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 916                         resets = <&cpg 328>;
 917                         #phy-cells = <0>;
 918                         status = "disabled";
 919                 };
 920
 921                 arm_cc630p: crypto@e6601000 {
 922                         compatible = "arm,cryptocell-630p-ree";
 923                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
 924                         reg = <0x0 0xe6601000 0 0x1000>;
 925                         clocks = <&cpg CPG_MOD 229>;
 926                         resets = <&cpg 229>;
 927                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 928                 };
 929
 930                 dmac0: dma-controller@e6700000 {
 931                         compatible = "renesas,dmac-r8a7796",
 932                                      "renesas,rcar-dmac";
 933                         reg = <0 0xe6700000 0 0x10000>;
 934                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 935                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 936                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 937                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 938                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 939                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 940                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 941                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 942                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 943                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 944                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 945                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 946                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 947                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 948                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 949                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 950                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 951                         interrupt-names = "error",
 952                                         "ch0", "ch1", "ch2", "ch3",
 953                                         "ch4", "ch5", "ch6", "ch7",
 954                                         "ch8", "ch9", "ch10", "ch11",
 955                                         "ch12", "ch13", "ch14", "ch15";
 956                         clocks = <&cpg CPG_MOD 219>;
 957                         clock-names = "fck";
 958                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
 959                         resets = <&cpg 219>;
 960                         #dma-cells = <1>;
 961                         dma-channels = <16>;
 962                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 963                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 964                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 965                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 966                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 967                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 968                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 969                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 970                 };
 971
 972                 dmac1: dma-controller@e7300000 {
 973                         compatible = "renesas,dmac-r8a7796",
 974                                      "renesas,rcar-dmac";
 975                         reg = <0 0xe7300000 0 0x10000>;
 976                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 977                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 978                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 979                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 980                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 981                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 982                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 983                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 984                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 985                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 986                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 987                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 988                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 989                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 990                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 991                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 992                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 993                         interrupt-names = "error",
 994                                         "ch0", "ch1", "ch2", "ch3",
 995                                         "ch4", "ch5", "ch6", "ch7",
 996                                         "ch8", "ch9", "ch10", "ch11",
 997                                         "ch12", "ch13", "ch14", "ch15";
 998                         clocks = <&cpg CPG_MOD 218>;
 999                         clock-names = "fck";
1000                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1001                         resets = <&cpg 218>;
1002                         #dma-cells = <1>;
1003                         dma-channels = <16>;
1004                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1005                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1006                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1007                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1008                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1009                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1010                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1011                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1012                 };
1013
1014                 dmac2: dma-controller@e7310000 {
1015                         compatible = "renesas,dmac-r8a7796",
1016                                      "renesas,rcar-dmac";
1017                         reg = <0 0xe7310000 0 0x10000>;
1018                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1019                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1020                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1021                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1022                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1023                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1024                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1025                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1026                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1027                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1028                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1029                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1030                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1031                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1032                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1033                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1034                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1035                         interrupt-names = "error",
1036                                         "ch0", "ch1", "ch2", "ch3",
1037                                         "ch4", "ch5", "ch6", "ch7",
1038                                         "ch8", "ch9", "ch10", "ch11",
1039                                         "ch12", "ch13", "ch14", "ch15";
1040                         clocks = <&cpg CPG_MOD 217>;
1041                         clock-names = "fck";
1042                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1043                         resets = <&cpg 217>;
1044                         #dma-cells = <1>;
1045                         dma-channels = <16>;
1046                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1047                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1048                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1049                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1050                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1051                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1052                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1053                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1054                 };
1055
1056                 ipmmu_ds0: iommu@e6740000 {
1057                         compatible = "renesas,ipmmu-r8a7796";
1058                         reg = <0 0xe6740000 0 0x1000>;
1059                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1060                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1061                         #iommu-cells = <1>;
1062                 };
1063
1064                 ipmmu_ds1: iommu@e7740000 {
1065                         compatible = "renesas,ipmmu-r8a7796";
1066                         reg = <0 0xe7740000 0 0x1000>;
1067                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1068                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1069                         #iommu-cells = <1>;
1070                 };
1071
1072                 ipmmu_hc: iommu@e6570000 {
1073                         compatible = "renesas,ipmmu-r8a7796";
1074                         reg = <0 0xe6570000 0 0x1000>;
1075                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1076                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1077                         #iommu-cells = <1>;
1078                 };
1079
1080                 ipmmu_ir: iommu@ff8b0000 {
1081                         compatible = "renesas,ipmmu-r8a7796";
1082                         reg = <0 0xff8b0000 0 0x1000>;
1083                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1084                         power-domains = <&sysc R8A7796_PD_A3IR>;
1085                         #iommu-cells = <1>;
1086                 };
1087
1088                 ipmmu_mm: iommu@e67b0000 {
1089                         compatible = "renesas,ipmmu-r8a7796";
1090                         reg = <0 0xe67b0000 0 0x1000>;
1091                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1092                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1093                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1094                         #iommu-cells = <1>;
1095                 };
1096
1097                 ipmmu_mp: iommu@ec670000 {
1098                         compatible = "renesas,ipmmu-r8a7796";
1099                         reg = <0 0xec670000 0 0x1000>;
1100                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1101                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1102                         #iommu-cells = <1>;
1103                 };
1104
1105                 ipmmu_pv0: iommu@fd800000 {
1106                         compatible = "renesas,ipmmu-r8a7796";
1107                         reg = <0 0xfd800000 0 0x1000>;
1108                         renesas,ipmmu-main = <&ipmmu_mm 5>;
1109                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1110                         #iommu-cells = <1>;
1111                 };
1112
1113                 ipmmu_pv1: iommu@fd950000 {
1114                         compatible = "renesas,ipmmu-r8a7796";
1115                         reg = <0 0xfd950000 0 0x1000>;
1116                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1117                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1118                         #iommu-cells = <1>;
1119                 };
1120
1121                 ipmmu_rt: iommu@ffc80000 {
1122                         compatible = "renesas,ipmmu-r8a7796";
1123                         reg = <0 0xffc80000 0 0x1000>;
1124                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1125                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1126                         #iommu-cells = <1>;
1127                 };
1128
1129                 ipmmu_vc0: iommu@fe6b0000 {
1130                         compatible = "renesas,ipmmu-r8a7796";
1131                         reg = <0 0xfe6b0000 0 0x1000>;
1132                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1133                         power-domains = <&sysc R8A7796_PD_A3VC>;
1134                         #iommu-cells = <1>;
1135                 };
1136
1137                 ipmmu_vi0: iommu@febd0000 {
1138                         compatible = "renesas,ipmmu-r8a7796";
1139                         reg = <0 0xfebd0000 0 0x1000>;
1140                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1141                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1142                         #iommu-cells = <1>;
1143                 };
1144
1145                 avb: ethernet@e6800000 {
1146                         compatible = "renesas,etheravb-r8a7796",
1147                                      "renesas,etheravb-rcar-gen3";
1148                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1149                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1150                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1151                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1152                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1153                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1154                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1155                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1156                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1157                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1158                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1159                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1160                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1161                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1162                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1163                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1164                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1165                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1166                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1167                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1168                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1169                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1170                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1171                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1172                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1173                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1174                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1175                                           "ch4", "ch5", "ch6", "ch7",
1176                                           "ch8", "ch9", "ch10", "ch11",
1177                                           "ch12", "ch13", "ch14", "ch15",
1178                                           "ch16", "ch17", "ch18", "ch19",
1179                                           "ch20", "ch21", "ch22", "ch23",
1180                                           "ch24";
1181                         clocks = <&cpg CPG_MOD 812>;
1182                         clock-names = "fck";
1183                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1184                         resets = <&cpg 812>;
1185                         phy-mode = "rgmii";
1186                         rx-internal-delay-ps = <0>;
1187                         tx-internal-delay-ps = <0>;
1188                         iommus = <&ipmmu_ds0 16>;
1189                         #address-cells = <1>;
1190                         #size-cells = <0>;
1191                         status = "disabled";
1192                 };
1193
1194                 can0: can@e6c30000 {
1195                         compatible = "renesas,can-r8a7796",
1196                                      "renesas,rcar-gen3-can";
1197                         reg = <0 0xe6c30000 0 0x1000>;
1198                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1199                         clocks = <&cpg CPG_MOD 916>,
1200                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1201                                <&can_clk>;
1202                         clock-names = "clkp1", "clkp2", "can_clk";
1203                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1204                         assigned-clock-rates = <40000000>;
1205                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1206                         resets = <&cpg 916>;
1207                         status = "disabled";
1208                 };
1209
1210                 can1: can@e6c38000 {
1211                         compatible = "renesas,can-r8a7796",
1212                                      "renesas,rcar-gen3-can";
1213                         reg = <0 0xe6c38000 0 0x1000>;
1214                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1215                         clocks = <&cpg CPG_MOD 915>,
1216                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1217                                <&can_clk>;
1218                         clock-names = "clkp1", "clkp2", "can_clk";
1219                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1220                         assigned-clock-rates = <40000000>;
1221                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1222                         resets = <&cpg 915>;
1223                         status = "disabled";
1224                 };
1225
1226                 canfd: can@e66c0000 {
1227                         compatible = "renesas,r8a7796-canfd",
1228                                      "renesas,rcar-gen3-canfd";
1229                         reg = <0 0xe66c0000 0 0x8000>;
1230                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1231                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1232                         interrupt-names = "ch_int", "g_int";
1233                         clocks = <&cpg CPG_MOD 914>,
1234                                <&cpg CPG_CORE R8A7796_CLK_CANFD>,
1235                                <&can_clk>;
1236                         clock-names = "fck", "canfd", "can_clk";
1237                         assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>;
1238                         assigned-clock-rates = <40000000>;
1239                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1240                         resets = <&cpg 914>;
1241                         status = "disabled";
1242
1243                         channel0 {
1244                                 status = "disabled";
1245                         };
1246
1247                         channel1 {
1248                                 status = "disabled";
1249                         };
1250                 };
1251
1252                 pwm0: pwm@e6e30000 {
1253                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1254                         reg = <0 0xe6e30000 0 8>;
1255                         #pwm-cells = <2>;
1256                         clocks = <&cpg CPG_MOD 523>;
1257                         resets = <&cpg 523>;
1258                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1259                         status = "disabled";
1260                 };
1261
1262                 pwm1: pwm@e6e31000 {
1263                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1264                         reg = <0 0xe6e31000 0 8>;
1265                         #pwm-cells = <2>;
1266                         clocks = <&cpg CPG_MOD 523>;
1267                         resets = <&cpg 523>;
1268                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1269                         status = "disabled";
1270                 };
1271
1272                 pwm2: pwm@e6e32000 {
1273                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1274                         reg = <0 0xe6e32000 0 8>;
1275                         #pwm-cells = <2>;
1276                         clocks = <&cpg CPG_MOD 523>;
1277                         resets = <&cpg 523>;
1278                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1279                         status = "disabled";
1280                 };
1281
1282                 pwm3: pwm@e6e33000 {
1283                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1284                         reg = <0 0xe6e33000 0 8>;
1285                         #pwm-cells = <2>;
1286                         clocks = <&cpg CPG_MOD 523>;
1287                         resets = <&cpg 523>;
1288                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1289                         status = "disabled";
1290                 };
1291
1292                 pwm4: pwm@e6e34000 {
1293                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1294                         reg = <0 0xe6e34000 0 8>;
1295                         #pwm-cells = <2>;
1296                         clocks = <&cpg CPG_MOD 523>;
1297                         resets = <&cpg 523>;
1298                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1299                         status = "disabled";
1300                 };
1301
1302                 pwm5: pwm@e6e35000 {
1303                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1304                         reg = <0 0xe6e35000 0 8>;
1305                         #pwm-cells = <2>;
1306                         clocks = <&cpg CPG_MOD 523>;
1307                         resets = <&cpg 523>;
1308                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1309                         status = "disabled";
1310                 };
1311
1312                 pwm6: pwm@e6e36000 {
1313                         compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar";
1314                         reg = <0 0xe6e36000 0 8>;
1315                         #pwm-cells = <2>;
1316                         clocks = <&cpg CPG_MOD 523>;
1317                         resets = <&cpg 523>;
1318                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1319                         status = "disabled";
1320                 };
1321
1322                 scif0: serial@e6e60000 {
1323                         compatible = "renesas,scif-r8a7796",
1324                                      "renesas,rcar-gen3-scif", "renesas,scif";
1325                         reg = <0 0xe6e60000 0 64>;
1326                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1327                         clocks = <&cpg CPG_MOD 207>,
1328                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1329                                  <&scif_clk>;
1330                         clock-names = "fck", "brg_int", "scif_clk";
1331                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1332                                <&dmac2 0x51>, <&dmac2 0x50>;
1333                         dma-names = "tx", "rx", "tx", "rx";
1334                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1335                         resets = <&cpg 207>;
1336                         status = "disabled";
1337                 };
1338
1339                 scif1: serial@e6e68000 {
1340                         compatible = "renesas,scif-r8a7796",
1341                                      "renesas,rcar-gen3-scif", "renesas,scif";
1342                         reg = <0 0xe6e68000 0 64>;
1343                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1344                         clocks = <&cpg CPG_MOD 206>,
1345                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1346                                  <&scif_clk>;
1347                         clock-names = "fck", "brg_int", "scif_clk";
1348                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1349                                <&dmac2 0x53>, <&dmac2 0x52>;
1350                         dma-names = "tx", "rx", "tx", "rx";
1351                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1352                         resets = <&cpg 206>;
1353                         status = "disabled";
1354                 };
1355
1356                 scif2: serial@e6e88000 {
1357                         compatible = "renesas,scif-r8a7796",
1358                                      "renesas,rcar-gen3-scif", "renesas,scif";
1359                         reg = <0 0xe6e88000 0 64>;
1360                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1361                         clocks = <&cpg CPG_MOD 310>,
1362                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1363                                  <&scif_clk>;
1364                         clock-names = "fck", "brg_int", "scif_clk";
1365                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1366                                <&dmac2 0x13>, <&dmac2 0x12>;
1367                         dma-names = "tx", "rx", "tx", "rx";
1368                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1369                         resets = <&cpg 310>;
1370                         status = "disabled";
1371                 };
1372
1373                 scif3: serial@e6c50000 {
1374                         compatible = "renesas,scif-r8a7796",
1375                                      "renesas,rcar-gen3-scif", "renesas,scif";
1376                         reg = <0 0xe6c50000 0 64>;
1377                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1378                         clocks = <&cpg CPG_MOD 204>,
1379                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1380                                  <&scif_clk>;
1381                         clock-names = "fck", "brg_int", "scif_clk";
1382                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1383                         dma-names = "tx", "rx";
1384                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1385                         resets = <&cpg 204>;
1386                         status = "disabled";
1387                 };
1388
1389                 scif4: serial@e6c40000 {
1390                         compatible = "renesas,scif-r8a7796",
1391                                      "renesas,rcar-gen3-scif", "renesas,scif";
1392                         reg = <0 0xe6c40000 0 64>;
1393                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1394                         clocks = <&cpg CPG_MOD 203>,
1395                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1396                                  <&scif_clk>;
1397                         clock-names = "fck", "brg_int", "scif_clk";
1398                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1399                         dma-names = "tx", "rx";
1400                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1401                         resets = <&cpg 203>;
1402                         status = "disabled";
1403                 };
1404
1405                 scif5: serial@e6f30000 {
1406                         compatible = "renesas,scif-r8a7796",
1407                                      "renesas,rcar-gen3-scif", "renesas,scif";
1408                         reg = <0 0xe6f30000 0 64>;
1409                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1410                         clocks = <&cpg CPG_MOD 202>,
1411                                  <&cpg CPG_CORE R8A7796_CLK_S3D1>,
1412                                  <&scif_clk>;
1413                         clock-names = "fck", "brg_int", "scif_clk";
1414                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1415                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1416                         dma-names = "tx", "rx", "tx", "rx";
1417                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1418                         resets = <&cpg 202>;
1419                         status = "disabled";
1420                 };
1421
1422                 tpu: pwm@e6e80000 {
1423                         compatible = "renesas,tpu-r8a7796", "renesas,tpu";
1424                         reg = <0 0xe6e80000 0 0x148>;
1425                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1426                         clocks = <&cpg CPG_MOD 304>;
1427                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1428                         resets = <&cpg 304>;
1429                         #pwm-cells = <3>;
1430                         status = "disabled";
1431                 };
1432
1433                 msiof0: spi@e6e90000 {
1434                         compatible = "renesas,msiof-r8a7796",
1435                                      "renesas,rcar-gen3-msiof";
1436                         reg = <0 0xe6e90000 0 0x0064>;
1437                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1438                         clocks = <&cpg CPG_MOD 211>;
1439                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1440                                <&dmac2 0x41>, <&dmac2 0x40>;
1441                         dma-names = "tx", "rx", "tx", "rx";
1442                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1443                         resets = <&cpg 211>;
1444                         #address-cells = <1>;
1445                         #size-cells = <0>;
1446                         status = "disabled";
1447                 };
1448
1449                 msiof1: spi@e6ea0000 {
1450                         compatible = "renesas,msiof-r8a7796",
1451                                      "renesas,rcar-gen3-msiof";
1452                         reg = <0 0xe6ea0000 0 0x0064>;
1453                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1454                         clocks = <&cpg CPG_MOD 210>;
1455                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1456                                <&dmac2 0x43>, <&dmac2 0x42>;
1457                         dma-names = "tx", "rx", "tx", "rx";
1458                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1459                         resets = <&cpg 210>;
1460                         #address-cells = <1>;
1461                         #size-cells = <0>;
1462                         status = "disabled";
1463                 };
1464
1465                 msiof2: spi@e6c00000 {
1466                         compatible = "renesas,msiof-r8a7796",
1467                                      "renesas,rcar-gen3-msiof";
1468                         reg = <0 0xe6c00000 0 0x0064>;
1469                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1470                         clocks = <&cpg CPG_MOD 209>;
1471                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1472                         dma-names = "tx", "rx";
1473                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1474                         resets = <&cpg 209>;
1475                         #address-cells = <1>;
1476                         #size-cells = <0>;
1477                         status = "disabled";
1478                 };
1479
1480                 msiof3: spi@e6c10000 {
1481                         compatible = "renesas,msiof-r8a7796",
1482                                      "renesas,rcar-gen3-msiof";
1483                         reg = <0 0xe6c10000 0 0x0064>;
1484                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1485                         clocks = <&cpg CPG_MOD 208>;
1486                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1487                         dma-names = "tx", "rx";
1488                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1489                         resets = <&cpg 208>;
1490                         #address-cells = <1>;
1491                         #size-cells = <0>;
1492                         status = "disabled";
1493                 };
1494
1495                 vin0: video@e6ef0000 {
1496                         compatible = "renesas,vin-r8a7796";
1497                         reg = <0 0xe6ef0000 0 0x1000>;
1498                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1499                         clocks = <&cpg CPG_MOD 811>;
1500                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1501                         resets = <&cpg 811>;
1502                         renesas,id = <0>;
1503                         status = "disabled";
1504
1505                         ports {
1506                                 #address-cells = <1>;
1507                                 #size-cells = <0>;
1508
1509                                 port@1 {
1510                                         #address-cells = <1>;
1511                                         #size-cells = <0>;
1512
1513                                         reg = <1>;
1514
1515                                         vin0csi20: endpoint@0 {
1516                                                 reg = <0>;
1517                                                 remote-endpoint = <&csi20vin0>;
1518                                         };
1519                                         vin0csi40: endpoint@2 {
1520                                                 reg = <2>;
1521                                                 remote-endpoint = <&csi40vin0>;
1522                                         };
1523                                 };
1524                         };
1525                 };
1526
1527                 vin1: video@e6ef1000 {
1528                         compatible = "renesas,vin-r8a7796";
1529                         reg = <0 0xe6ef1000 0 0x1000>;
1530                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1531                         clocks = <&cpg CPG_MOD 810>;
1532                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1533                         resets = <&cpg 810>;
1534                         renesas,id = <1>;
1535                         status = "disabled";
1536
1537                         ports {
1538                                 #address-cells = <1>;
1539                                 #size-cells = <0>;
1540
1541                                 port@1 {
1542                                         #address-cells = <1>;
1543                                         #size-cells = <0>;
1544
1545                                         reg = <1>;
1546
1547                                         vin1csi20: endpoint@0 {
1548                                                 reg = <0>;
1549                                                 remote-endpoint = <&csi20vin1>;
1550                                         };
1551                                         vin1csi40: endpoint@2 {
1552                                                 reg = <2>;
1553                                                 remote-endpoint = <&csi40vin1>;
1554                                         };
1555                                 };
1556                         };
1557                 };
1558
1559                 vin2: video@e6ef2000 {
1560                         compatible = "renesas,vin-r8a7796";
1561                         reg = <0 0xe6ef2000 0 0x1000>;
1562                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1563                         clocks = <&cpg CPG_MOD 809>;
1564                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1565                         resets = <&cpg 809>;
1566                         renesas,id = <2>;
1567                         status = "disabled";
1568
1569                         ports {
1570                                 #address-cells = <1>;
1571                                 #size-cells = <0>;
1572
1573                                 port@1 {
1574                                         #address-cells = <1>;
1575                                         #size-cells = <0>;
1576
1577                                         reg = <1>;
1578
1579                                         vin2csi20: endpoint@0 {
1580                                                 reg = <0>;
1581                                                 remote-endpoint = <&csi20vin2>;
1582                                         };
1583                                         vin2csi40: endpoint@2 {
1584                                                 reg = <2>;
1585                                                 remote-endpoint = <&csi40vin2>;
1586                                         };
1587                                 };
1588                         };
1589                 };
1590
1591                 vin3: video@e6ef3000 {
1592                         compatible = "renesas,vin-r8a7796";
1593                         reg = <0 0xe6ef3000 0 0x1000>;
1594                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1595                         clocks = <&cpg CPG_MOD 808>;
1596                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1597                         resets = <&cpg 808>;
1598                         renesas,id = <3>;
1599                         status = "disabled";
1600
1601                         ports {
1602                                 #address-cells = <1>;
1603                                 #size-cells = <0>;
1604
1605                                 port@1 {
1606                                         #address-cells = <1>;
1607                                         #size-cells = <0>;
1608
1609                                         reg = <1>;
1610
1611                                         vin3csi20: endpoint@0 {
1612                                                 reg = <0>;
1613                                                 remote-endpoint = <&csi20vin3>;
1614                                         };
1615                                         vin3csi40: endpoint@2 {
1616                                                 reg = <2>;
1617                                                 remote-endpoint = <&csi40vin3>;
1618                                         };
1619                                 };
1620                         };
1621                 };
1622
1623                 vin4: video@e6ef4000 {
1624                         compatible = "renesas,vin-r8a7796";
1625                         reg = <0 0xe6ef4000 0 0x1000>;
1626                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1627                         clocks = <&cpg CPG_MOD 807>;
1628                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1629                         resets = <&cpg 807>;
1630                         renesas,id = <4>;
1631                         status = "disabled";
1632
1633                         ports {
1634                                 #address-cells = <1>;
1635                                 #size-cells = <0>;
1636
1637                                 port@1 {
1638                                         #address-cells = <1>;
1639                                         #size-cells = <0>;
1640
1641                                         reg = <1>;
1642
1643                                         vin4csi20: endpoint@0 {
1644                                                 reg = <0>;
1645                                                 remote-endpoint = <&csi20vin4>;
1646                                         };
1647                                         vin4csi40: endpoint@2 {
1648                                                 reg = <2>;
1649                                                 remote-endpoint = <&csi40vin4>;
1650                                         };
1651                                 };
1652                         };
1653                 };
1654
1655                 vin5: video@e6ef5000 {
1656                         compatible = "renesas,vin-r8a7796";
1657                         reg = <0 0xe6ef5000 0 0x1000>;
1658                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1659                         clocks = <&cpg CPG_MOD 806>;
1660                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1661                         resets = <&cpg 806>;
1662                         renesas,id = <5>;
1663                         status = "disabled";
1664
1665                         ports {
1666                                 #address-cells = <1>;
1667                                 #size-cells = <0>;
1668
1669                                 port@1 {
1670                                         #address-cells = <1>;
1671                                         #size-cells = <0>;
1672
1673                                         reg = <1>;
1674
1675                                         vin5csi20: endpoint@0 {
1676                                                 reg = <0>;
1677                                                 remote-endpoint = <&csi20vin5>;
1678                                         };
1679                                         vin5csi40: endpoint@2 {
1680                                                 reg = <2>;
1681                                                 remote-endpoint = <&csi40vin5>;
1682                                         };
1683                                 };
1684                         };
1685                 };
1686
1687                 vin6: video@e6ef6000 {
1688                         compatible = "renesas,vin-r8a7796";
1689                         reg = <0 0xe6ef6000 0 0x1000>;
1690                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1691                         clocks = <&cpg CPG_MOD 805>;
1692                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1693                         resets = <&cpg 805>;
1694                         renesas,id = <6>;
1695                         status = "disabled";
1696
1697                         ports {
1698                                 #address-cells = <1>;
1699                                 #size-cells = <0>;
1700
1701                                 port@1 {
1702                                         #address-cells = <1>;
1703                                         #size-cells = <0>;
1704
1705                                         reg = <1>;
1706
1707                                         vin6csi20: endpoint@0 {
1708                                                 reg = <0>;
1709                                                 remote-endpoint = <&csi20vin6>;
1710                                         };
1711                                         vin6csi40: endpoint@2 {
1712                                                 reg = <2>;
1713                                                 remote-endpoint = <&csi40vin6>;
1714                                         };
1715                                 };
1716                         };
1717                 };
1718
1719                 vin7: video@e6ef7000 {
1720                         compatible = "renesas,vin-r8a7796";
1721                         reg = <0 0xe6ef7000 0 0x1000>;
1722                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1723                         clocks = <&cpg CPG_MOD 804>;
1724                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1725                         resets = <&cpg 804>;
1726                         renesas,id = <7>;
1727                         status = "disabled";
1728
1729                         ports {
1730                                 #address-cells = <1>;
1731                                 #size-cells = <0>;
1732
1733                                 port@1 {
1734                                         #address-cells = <1>;
1735                                         #size-cells = <0>;
1736
1737                                         reg = <1>;
1738
1739                                         vin7csi20: endpoint@0 {
1740                                                 reg = <0>;
1741                                                 remote-endpoint = <&csi20vin7>;
1742                                         };
1743                                         vin7csi40: endpoint@2 {
1744                                                 reg = <2>;
1745                                                 remote-endpoint = <&csi40vin7>;
1746                                         };
1747                                 };
1748                         };
1749                 };
1750
1751                 drif00: rif@e6f40000 {
1752                         compatible = "renesas,r8a7796-drif",
1753                                      "renesas,rcar-gen3-drif";
1754                         reg = <0 0xe6f40000 0 0x64>;
1755                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1756                         clocks = <&cpg CPG_MOD 515>;
1757                         clock-names = "fck";
1758                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1759                         dma-names = "rx", "rx";
1760                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1761                         resets = <&cpg 515>;
1762                         renesas,bonding = <&drif01>;
1763                         status = "disabled";
1764                 };
1765
1766                 drif01: rif@e6f50000 {
1767                         compatible = "renesas,r8a7796-drif",
1768                                      "renesas,rcar-gen3-drif";
1769                         reg = <0 0xe6f50000 0 0x64>;
1770                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1771                         clocks = <&cpg CPG_MOD 514>;
1772                         clock-names = "fck";
1773                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1774                         dma-names = "rx", "rx";
1775                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1776                         resets = <&cpg 514>;
1777                         renesas,bonding = <&drif00>;
1778                         status = "disabled";
1779                 };
1780
1781                 drif10: rif@e6f60000 {
1782                         compatible = "renesas,r8a7796-drif",
1783                                      "renesas,rcar-gen3-drif";
1784                         reg = <0 0xe6f60000 0 0x64>;
1785                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1786                         clocks = <&cpg CPG_MOD 513>;
1787                         clock-names = "fck";
1788                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1789                         dma-names = "rx", "rx";
1790                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1791                         resets = <&cpg 513>;
1792                         renesas,bonding = <&drif11>;
1793                         status = "disabled";
1794                 };
1795
1796                 drif11: rif@e6f70000 {
1797                         compatible = "renesas,r8a7796-drif",
1798                                      "renesas,rcar-gen3-drif";
1799                         reg = <0 0xe6f70000 0 0x64>;
1800                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1801                         clocks = <&cpg CPG_MOD 512>;
1802                         clock-names = "fck";
1803                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1804                         dma-names = "rx", "rx";
1805                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1806                         resets = <&cpg 512>;
1807                         renesas,bonding = <&drif10>;
1808                         status = "disabled";
1809                 };
1810
1811                 drif20: rif@e6f80000 {
1812                         compatible = "renesas,r8a7796-drif",
1813                                      "renesas,rcar-gen3-drif";
1814                         reg = <0 0xe6f80000 0 0x64>;
1815                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1816                         clocks = <&cpg CPG_MOD 511>;
1817                         clock-names = "fck";
1818                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1819                         dma-names = "rx", "rx";
1820                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1821                         resets = <&cpg 511>;
1822                         renesas,bonding = <&drif21>;
1823                         status = "disabled";
1824                 };
1825
1826                 drif21: rif@e6f90000 {
1827                         compatible = "renesas,r8a7796-drif",
1828                                      "renesas,rcar-gen3-drif";
1829                         reg = <0 0xe6f90000 0 0x64>;
1830                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1831                         clocks = <&cpg CPG_MOD 510>;
1832                         clock-names = "fck";
1833                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1834                         dma-names = "rx", "rx";
1835                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1836                         resets = <&cpg 510>;
1837                         renesas,bonding = <&drif20>;
1838                         status = "disabled";
1839                 };
1840
1841                 drif30: rif@e6fa0000 {
1842                         compatible = "renesas,r8a7796-drif",
1843                                      "renesas,rcar-gen3-drif";
1844                         reg = <0 0xe6fa0000 0 0x64>;
1845                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1846                         clocks = <&cpg CPG_MOD 509>;
1847                         clock-names = "fck";
1848                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1849                         dma-names = "rx", "rx";
1850                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1851                         resets = <&cpg 509>;
1852                         renesas,bonding = <&drif31>;
1853                         status = "disabled";
1854                 };
1855
1856                 drif31: rif@e6fb0000 {
1857                         compatible = "renesas,r8a7796-drif",
1858                                      "renesas,rcar-gen3-drif";
1859                         reg = <0 0xe6fb0000 0 0x64>;
1860                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1861                         clocks = <&cpg CPG_MOD 508>;
1862                         clock-names = "fck";
1863                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1864                         dma-names = "rx", "rx";
1865                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1866                         resets = <&cpg 508>;
1867                         renesas,bonding = <&drif30>;
1868                         status = "disabled";
1869                 };
1870
1871                 rcar_sound: sound@ec500000 {
1872                         /*
1873                          * #sound-dai-cells is required
1874                          *
1875                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1876                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1877                          */
1878                         /*
1879                          * #clock-cells is required for audio_clkout0/1/2/3
1880                          *
1881                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1882                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1883                          */
1884                         compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3";
1885                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1886                               <0 0xec5a0000 0 0x100>,  /* ADG */
1887                               <0 0xec540000 0 0x1000>, /* SSIU */
1888                               <0 0xec541000 0 0x280>,  /* SSI */
1889                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1890                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1891
1892                         clocks = <&cpg CPG_MOD 1005>,
1893                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1894                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1895                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1896                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1897                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1898                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1899                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1900                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1901                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1902                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1903                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1904                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1905                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1906                                  <&audio_clk_a>, <&audio_clk_b>,
1907                                  <&audio_clk_c>,
1908                                  <&cpg CPG_CORE R8A7796_CLK_S0D4>;
1909                         clock-names = "ssi-all",
1910                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1911                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1912                                       "ssi.1", "ssi.0",
1913                                       "src.9", "src.8", "src.7", "src.6",
1914                                       "src.5", "src.4", "src.3", "src.2",
1915                                       "src.1", "src.0",
1916                                       "mix.1", "mix.0",
1917                                       "ctu.1", "ctu.0",
1918                                       "dvc.0", "dvc.1",
1919                                       "clk_a", "clk_b", "clk_c", "clk_i";
1920                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
1921                         resets = <&cpg 1005>,
1922                                  <&cpg 1006>, <&cpg 1007>,
1923                                  <&cpg 1008>, <&cpg 1009>,
1924                                  <&cpg 1010>, <&cpg 1011>,
1925                                  <&cpg 1012>, <&cpg 1013>,
1926                                  <&cpg 1014>, <&cpg 1015>;
1927                         reset-names = "ssi-all",
1928                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1929                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1930                                       "ssi.1", "ssi.0";
1931                         status = "disabled";
1932
1933                         rcar_sound,ctu {
1934                                 ctu00: ctu-0 { };
1935                                 ctu01: ctu-1 { };
1936                                 ctu02: ctu-2 { };
1937                                 ctu03: ctu-3 { };
1938                                 ctu10: ctu-4 { };
1939                                 ctu11: ctu-5 { };
1940                                 ctu12: ctu-6 { };
1941                                 ctu13: ctu-7 { };
1942                         };
1943
1944                         rcar_sound,dvc {
1945                                 dvc0: dvc-0 {
1946                                         dmas = <&audma1 0xbc>;
1947                                         dma-names = "tx";
1948                                 };
1949                                 dvc1: dvc-1 {
1950                                         dmas = <&audma1 0xbe>;
1951                                         dma-names = "tx";
1952                                 };
1953                         };
1954
1955                         rcar_sound,mix {
1956                                 mix0: mix-0 { };
1957                                 mix1: mix-1 { };
1958                         };
1959
1960                         rcar_sound,src {
1961                                 src0: src-0 {
1962                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1963                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
1964                                         dma-names = "rx", "tx";
1965                                 };
1966                                 src1: src-1 {
1967                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1968                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
1969                                         dma-names = "rx", "tx";
1970                                 };
1971                                 src2: src-2 {
1972                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1973                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
1974                                         dma-names = "rx", "tx";
1975                                 };
1976                                 src3: src-3 {
1977                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1978                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1979                                         dma-names = "rx", "tx";
1980                                 };
1981                                 src4: src-4 {
1982                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1983                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1984                                         dma-names = "rx", "tx";
1985                                 };
1986                                 src5: src-5 {
1987                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1988                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1989                                         dma-names = "rx", "tx";
1990                                 };
1991                                 src6: src-6 {
1992                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1993                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
1994                                         dma-names = "rx", "tx";
1995                                 };
1996                                 src7: src-7 {
1997                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1998                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
1999                                         dma-names = "rx", "tx";
2000                                 };
2001                                 src8: src-8 {
2002                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
2003                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
2004                                         dma-names = "rx", "tx";
2005                                 };
2006                                 src9: src-9 {
2007                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
2008                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
2009                                         dma-names = "rx", "tx";
2010                                 };
2011                         };
2012
2013                         rcar_sound,ssi {
2014                                 ssi0: ssi-0 {
2015                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2016                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
2017                                         dma-names = "rx", "tx";
2018                                 };
2019                                 ssi1: ssi-1 {
2020                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2021                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
2022                                         dma-names = "rx", "tx";
2023                                 };
2024                                 ssi2: ssi-2 {
2025                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2026                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
2027                                         dma-names = "rx", "tx";
2028                                 };
2029                                 ssi3: ssi-3 {
2030                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2031                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
2032                                         dma-names = "rx", "tx";
2033                                 };
2034                                 ssi4: ssi-4 {
2035                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2036                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
2037                                         dma-names = "rx", "tx";
2038                                 };
2039                                 ssi5: ssi-5 {
2040                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2041                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2042                                         dma-names = "rx", "tx";
2043                                 };
2044                                 ssi6: ssi-6 {
2045                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2046                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2047                                         dma-names = "rx", "tx";
2048                                 };
2049                                 ssi7: ssi-7 {
2050                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2051                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
2052                                         dma-names = "rx", "tx";
2053                                 };
2054                                 ssi8: ssi-8 {
2055                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2056                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
2057                                         dma-names = "rx", "tx";
2058                                 };
2059                                 ssi9: ssi-9 {
2060                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2061                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
2062                                         dma-names = "rx", "tx";
2063                                 };
2064                         };
2065
2066                         rcar_sound,ssiu {
2067                                 ssiu00: ssiu-0 {
2068                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
2069                                         dma-names = "rx", "tx";
2070                                 };
2071                                 ssiu01: ssiu-1 {
2072                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
2073                                         dma-names = "rx", "tx";
2074                                 };
2075                                 ssiu02: ssiu-2 {
2076                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
2077                                         dma-names = "rx", "tx";
2078                                 };
2079                                 ssiu03: ssiu-3 {
2080                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
2081                                         dma-names = "rx", "tx";
2082                                 };
2083                                 ssiu04: ssiu-4 {
2084                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
2085                                         dma-names = "rx", "tx";
2086                                 };
2087                                 ssiu05: ssiu-5 {
2088                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
2089                                         dma-names = "rx", "tx";
2090                                 };
2091                                 ssiu06: ssiu-6 {
2092                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
2093                                         dma-names = "rx", "tx";
2094                                 };
2095                                 ssiu07: ssiu-7 {
2096                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
2097                                         dma-names = "rx", "tx";
2098                                 };
2099                                 ssiu10: ssiu-8 {
2100                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
2101                                         dma-names = "rx", "tx";
2102                                 };
2103                                 ssiu11: ssiu-9 {
2104                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2105                                         dma-names = "rx", "tx";
2106                                 };
2107                                 ssiu12: ssiu-10 {
2108                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
2109                                         dma-names = "rx", "tx";
2110                                 };
2111                                 ssiu13: ssiu-11 {
2112                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
2113                                         dma-names = "rx", "tx";
2114                                 };
2115                                 ssiu14: ssiu-12 {
2116                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
2117                                         dma-names = "rx", "tx";
2118                                 };
2119                                 ssiu15: ssiu-13 {
2120                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2121                                         dma-names = "rx", "tx";
2122                                 };
2123                                 ssiu16: ssiu-14 {
2124                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2125                                         dma-names = "rx", "tx";
2126                                 };
2127                                 ssiu17: ssiu-15 {
2128                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2129                                         dma-names = "rx", "tx";
2130                                 };
2131                                 ssiu20: ssiu-16 {
2132                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
2133                                         dma-names = "rx", "tx";
2134                                 };
2135                                 ssiu21: ssiu-17 {
2136                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
2137                                         dma-names = "rx", "tx";
2138                                 };
2139                                 ssiu22: ssiu-18 {
2140                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2141                                         dma-names = "rx", "tx";
2142                                 };
2143                                 ssiu23: ssiu-19 {
2144                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2145                                         dma-names = "rx", "tx";
2146                                 };
2147                                 ssiu24: ssiu-20 {
2148                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2149                                         dma-names = "rx", "tx";
2150                                 };
2151                                 ssiu25: ssiu-21 {
2152                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2153                                         dma-names = "rx", "tx";
2154                                 };
2155                                 ssiu26: ssiu-22 {
2156                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
2157                                         dma-names = "rx", "tx";
2158                                 };
2159                                 ssiu27: ssiu-23 {
2160                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2161                                         dma-names = "rx", "tx";
2162                                 };
2163                                 ssiu30: ssiu-24 {
2164                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
2165                                         dma-names = "rx", "tx";
2166                                 };
2167                                 ssiu31: ssiu-25 {
2168                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
2169                                         dma-names = "rx", "tx";
2170                                 };
2171                                 ssiu32: ssiu-26 {
2172                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
2173                                         dma-names = "rx", "tx";
2174                                 };
2175                                 ssiu33: ssiu-27 {
2176                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
2177                                         dma-names = "rx", "tx";
2178                                 };
2179                                 ssiu34: ssiu-28 {
2180                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
2181                                         dma-names = "rx", "tx";
2182                                 };
2183                                 ssiu35: ssiu-29 {
2184                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
2185                                         dma-names = "rx", "tx";
2186                                 };
2187                                 ssiu36: ssiu-30 {
2188                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2189                                         dma-names = "rx", "tx";
2190                                 };
2191                                 ssiu37: ssiu-31 {
2192                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2193                                         dma-names = "rx", "tx";
2194                                 };
2195                                 ssiu40: ssiu-32 {
2196                                         dmas = <&audma0 0x71>, <&audma1 0x72>;
2197                                         dma-names = "rx", "tx";
2198                                 };
2199                                 ssiu41: ssiu-33 {
2200                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2201                                         dma-names = "rx", "tx";
2202                                 };
2203                                 ssiu42: ssiu-34 {
2204                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2205                                         dma-names = "rx", "tx";
2206                                 };
2207                                 ssiu43: ssiu-35 {
2208                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2209                                         dma-names = "rx", "tx";
2210                                 };
2211                                 ssiu44: ssiu-36 {
2212                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2213                                         dma-names = "rx", "tx";
2214                                 };
2215                                 ssiu45: ssiu-37 {
2216                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2217                                         dma-names = "rx", "tx";
2218                                 };
2219                                 ssiu46: ssiu-38 {
2220                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2221                                         dma-names = "rx", "tx";
2222                                 };
2223                                 ssiu47: ssiu-39 {
2224                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2225                                         dma-names = "rx", "tx";
2226                                 };
2227                                 ssiu50: ssiu-40 {
2228                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2229                                         dma-names = "rx", "tx";
2230                                 };
2231                                 ssiu60: ssiu-41 {
2232                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2233                                         dma-names = "rx", "tx";
2234                                 };
2235                                 ssiu70: ssiu-42 {
2236                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2237                                         dma-names = "rx", "tx";
2238                                 };
2239                                 ssiu80: ssiu-43 {
2240                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2241                                         dma-names = "rx", "tx";
2242                                 };
2243                                 ssiu90: ssiu-44 {
2244                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2245                                         dma-names = "rx", "tx";
2246                                 };
2247                                 ssiu91: ssiu-45 {
2248                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2249                                         dma-names = "rx", "tx";
2250                                 };
2251                                 ssiu92: ssiu-46 {
2252                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2253                                         dma-names = "rx", "tx";
2254                                 };
2255                                 ssiu93: ssiu-47 {
2256                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2257                                         dma-names = "rx", "tx";
2258                                 };
2259                                 ssiu94: ssiu-48 {
2260                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2261                                         dma-names = "rx", "tx";
2262                                 };
2263                                 ssiu95: ssiu-49 {
2264                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2265                                         dma-names = "rx", "tx";
2266                                 };
2267                                 ssiu96: ssiu-50 {
2268                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2269                                         dma-names = "rx", "tx";
2270                                 };
2271                                 ssiu97: ssiu-51 {
2272                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2273                                         dma-names = "rx", "tx";
2274                                 };
2275                         };
2276                 };
2277
2278                 mlp: mlp@ec520000 {
2279                         compatible = "renesas,r8a7796-mlp",
2280                                      "renesas,rcar-gen3-mlp";
2281                         reg = <0 0xec520000 0 0x800>;
2282                         interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2283                                 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2284                         clocks = <&cpg CPG_MOD 802>;
2285                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2286                         resets = <&cpg 802>;
2287                         status = "disabled";
2288                 };
2289
2290                 audma0: dma-controller@ec700000 {
2291                         compatible = "renesas,dmac-r8a7796",
2292                                      "renesas,rcar-dmac";
2293                         reg = <0 0xec700000 0 0x10000>;
2294                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2295                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2296                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2297                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2298                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2299                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2300                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2301                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2302                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2303                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2304                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2305                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2306                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2307                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2308                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2309                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2310                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2311                         interrupt-names = "error",
2312                                         "ch0", "ch1", "ch2", "ch3",
2313                                         "ch4", "ch5", "ch6", "ch7",
2314                                         "ch8", "ch9", "ch10", "ch11",
2315                                         "ch12", "ch13", "ch14", "ch15";
2316                         clocks = <&cpg CPG_MOD 502>;
2317                         clock-names = "fck";
2318                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2319                         resets = <&cpg 502>;
2320                         #dma-cells = <1>;
2321                         dma-channels = <16>;
2322                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
2323                                <&ipmmu_mp 2>, <&ipmmu_mp 3>,
2324                                <&ipmmu_mp 4>, <&ipmmu_mp 5>,
2325                                <&ipmmu_mp 6>, <&ipmmu_mp 7>,
2326                                <&ipmmu_mp 8>, <&ipmmu_mp 9>,
2327                                <&ipmmu_mp 10>, <&ipmmu_mp 11>,
2328                                <&ipmmu_mp 12>, <&ipmmu_mp 13>,
2329                                <&ipmmu_mp 14>, <&ipmmu_mp 15>;
2330                 };
2331
2332                 audma1: dma-controller@ec720000 {
2333                         compatible = "renesas,dmac-r8a7796",
2334                                      "renesas,rcar-dmac";
2335                         reg = <0 0xec720000 0 0x10000>;
2336                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2337                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2338                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2339                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2340                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2341                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2342                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2343                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2344                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2345                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2346                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2347                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2348                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2349                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2350                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2351                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2352                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2353                         interrupt-names = "error",
2354                                         "ch0", "ch1", "ch2", "ch3",
2355                                         "ch4", "ch5", "ch6", "ch7",
2356                                         "ch8", "ch9", "ch10", "ch11",
2357                                         "ch12", "ch13", "ch14", "ch15";
2358                         clocks = <&cpg CPG_MOD 501>;
2359                         clock-names = "fck";
2360                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2361                         resets = <&cpg 501>;
2362                         #dma-cells = <1>;
2363                         dma-channels = <16>;
2364                         iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>,
2365                                <&ipmmu_mp 18>, <&ipmmu_mp 19>,
2366                                <&ipmmu_mp 20>, <&ipmmu_mp 21>,
2367                                <&ipmmu_mp 22>, <&ipmmu_mp 23>,
2368                                <&ipmmu_mp 24>, <&ipmmu_mp 25>,
2369                                <&ipmmu_mp 26>, <&ipmmu_mp 27>,
2370                                <&ipmmu_mp 28>, <&ipmmu_mp 29>,
2371                                <&ipmmu_mp 30>, <&ipmmu_mp 31>;
2372                 };
2373
2374                 xhci0: usb@ee000000 {
2375                         compatible = "renesas,xhci-r8a7796",
2376                                      "renesas,rcar-gen3-xhci";
2377                         reg = <0 0xee000000 0 0xc00>;
2378                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2379                         clocks = <&cpg CPG_MOD 328>;
2380                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2381                         resets = <&cpg 328>;
2382                         status = "disabled";
2383                 };
2384
2385                 usb3_peri0: usb@ee020000 {
2386                         compatible = "renesas,r8a7796-usb3-peri",
2387                                      "renesas,rcar-gen3-usb3-peri";
2388                         reg = <0 0xee020000 0 0x400>;
2389                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2390                         clocks = <&cpg CPG_MOD 328>;
2391                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2392                         resets = <&cpg 328>;
2393                         status = "disabled";
2394                 };
2395
2396                 ohci0: usb@ee080000 {
2397                         compatible = "generic-ohci";
2398                         reg = <0 0xee080000 0 0x100>;
2399                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2400                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2401                         phys = <&usb2_phy0 1>;
2402                         phy-names = "usb";
2403                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2404                         resets = <&cpg 703>, <&cpg 704>;
2405                         status = "disabled";
2406                 };
2407
2408                 ohci1: usb@ee0a0000 {
2409                         compatible = "generic-ohci";
2410                         reg = <0 0xee0a0000 0 0x100>;
2411                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2412                         clocks = <&cpg CPG_MOD 702>;
2413                         phys = <&usb2_phy1 1>;
2414                         phy-names = "usb";
2415                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2416                         resets = <&cpg 702>;
2417                         status = "disabled";
2418                 };
2419
2420                 ehci0: usb@ee080100 {
2421                         compatible = "generic-ehci";
2422                         reg = <0 0xee080100 0 0x100>;
2423                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2424                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2425                         phys = <&usb2_phy0 2>;
2426                         phy-names = "usb";
2427                         companion = <&ohci0>;
2428                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2429                         resets = <&cpg 703>, <&cpg 704>;
2430                         status = "disabled";
2431                 };
2432
2433                 ehci1: usb@ee0a0100 {
2434                         compatible = "generic-ehci";
2435                         reg = <0 0xee0a0100 0 0x100>;
2436                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2437                         clocks = <&cpg CPG_MOD 702>;
2438                         phys = <&usb2_phy1 2>;
2439                         phy-names = "usb";
2440                         companion = <&ohci1>;
2441                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2442                         resets = <&cpg 702>;
2443                         status = "disabled";
2444                 };
2445
2446                 usb2_phy0: usb-phy@ee080200 {
2447                         compatible = "renesas,usb2-phy-r8a7796",
2448                                      "renesas,rcar-gen3-usb2-phy";
2449                         reg = <0 0xee080200 0 0x700>;
2450                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2451                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2452                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2453                         resets = <&cpg 703>, <&cpg 704>;
2454                         #phy-cells = <1>;
2455                         status = "disabled";
2456                 };
2457
2458                 usb2_phy1: usb-phy@ee0a0200 {
2459                         compatible = "renesas,usb2-phy-r8a7796",
2460                                      "renesas,rcar-gen3-usb2-phy";
2461                         reg = <0 0xee0a0200 0 0x700>;
2462                         clocks = <&cpg CPG_MOD 702>;
2463                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2464                         resets = <&cpg 702>;
2465                         #phy-cells = <1>;
2466                         status = "disabled";
2467                 };
2468
2469                 sdhi0: mmc@ee100000 {
2470                         compatible = "renesas,sdhi-r8a7796",
2471                                      "renesas,rcar-gen3-sdhi";
2472                         reg = <0 0xee100000 0 0x2000>;
2473                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2474                         clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7796_CLK_SD0H>;
2475                         clock-names = "core", "clkh";
2476                         max-frequency = <200000000>;
2477                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2478                         resets = <&cpg 314>;
2479                         iommus = <&ipmmu_ds1 32>;
2480                         status = "disabled";
2481                 };
2482
2483                 sdhi1: mmc@ee120000 {
2484                         compatible = "renesas,sdhi-r8a7796",
2485                                      "renesas,rcar-gen3-sdhi";
2486                         reg = <0 0xee120000 0 0x2000>;
2487                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2488                         clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7796_CLK_SD1H>;
2489                         clock-names = "core", "clkh";
2490                         max-frequency = <200000000>;
2491                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2492                         resets = <&cpg 313>;
2493                         iommus = <&ipmmu_ds1 33>;
2494                         status = "disabled";
2495                 };
2496
2497                 sdhi2: mmc@ee140000 {
2498                         compatible = "renesas,sdhi-r8a7796",
2499                                      "renesas,rcar-gen3-sdhi";
2500                         reg = <0 0xee140000 0 0x2000>;
2501                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2502                         clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7796_CLK_SD2H>;
2503                         clock-names = "core", "clkh";
2504                         max-frequency = <200000000>;
2505                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2506                         resets = <&cpg 312>;
2507                         iommus = <&ipmmu_ds1 34>;
2508                         status = "disabled";
2509                 };
2510
2511                 sdhi3: mmc@ee160000 {
2512                         compatible = "renesas,sdhi-r8a7796",
2513                                      "renesas,rcar-gen3-sdhi";
2514                         reg = <0 0xee160000 0 0x2000>;
2515                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2516                         clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7796_CLK_SD3H>;
2517                         clock-names = "core", "clkh";
2518                         max-frequency = <200000000>;
2519                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2520                         resets = <&cpg 311>;
2521                         iommus = <&ipmmu_ds1 35>;
2522                         status = "disabled";
2523                 };
2524
2525                 rpc: spi@ee200000 {
2526                         compatible = "renesas,r8a7796-rpc-if",
2527                                      "renesas,rcar-gen3-rpc-if";
2528                         reg = <0 0xee200000 0 0x200>,
2529                               <0 0x08000000 0 0x04000000>,
2530                               <0 0xee208000 0 0x100>;
2531                         reg-names = "regs", "dirmap", "wbuf";
2532                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2533                         clocks = <&cpg CPG_MOD 917>;
2534                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2535                         resets = <&cpg 917>;
2536                         #address-cells = <1>;
2537                         #size-cells = <0>;
2538                         status = "disabled";
2539                 };
2540
2541                 gic: interrupt-controller@f1010000 {
2542                         compatible = "arm,gic-400";
2543                         #interrupt-cells = <3>;
2544                         #address-cells = <0>;
2545                         interrupt-controller;
2546                         reg = <0x0 0xf1010000 0 0x1000>,
2547                               <0x0 0xf1020000 0 0x20000>,
2548                               <0x0 0xf1040000 0 0x20000>,
2549                               <0x0 0xf1060000 0 0x20000>;
2550                         interrupts = <GIC_PPI 9
2551                                         (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>;
2552                         clocks = <&cpg CPG_MOD 408>;
2553                         clock-names = "clk";
2554                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2555                         resets = <&cpg 408>;
2556                 };
2557
2558                 pciec0: pcie@fe000000 {
2559                         compatible = "renesas,pcie-r8a7796",
2560                                      "renesas,pcie-rcar-gen3";
2561                         reg = <0 0xfe000000 0 0x80000>;
2562                         #address-cells = <3>;
2563                         #size-cells = <2>;
2564                         bus-range = <0x00 0xff>;
2565                         device_type = "pci";
2566                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2567                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2568                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2569                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2570                         /* Map all possible DDR as inbound ranges */
2571                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2572                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2573                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2574                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2575                         #interrupt-cells = <1>;
2576                         interrupt-map-mask = <0 0 0 0>;
2577                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2578                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2579                         clock-names = "pcie", "pcie_bus";
2580                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2581                         resets = <&cpg 319>;
2582                         status = "disabled";
2583                 };
2584
2585                 pciec1: pcie@ee800000 {
2586                         compatible = "renesas,pcie-r8a7796",
2587                                      "renesas,pcie-rcar-gen3";
2588                         reg = <0 0xee800000 0 0x80000>;
2589                         #address-cells = <3>;
2590                         #size-cells = <2>;
2591                         bus-range = <0x00 0xff>;
2592                         device_type = "pci";
2593                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2594                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2595                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2596                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2597                         /* Map all possible DDR as inbound ranges */
2598                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
2599                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2600                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2601                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2602                         #interrupt-cells = <1>;
2603                         interrupt-map-mask = <0 0 0 0>;
2604                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2605                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2606                         clock-names = "pcie", "pcie_bus";
2607                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2608                         resets = <&cpg 318>;
2609                         status = "disabled";
2610                 };
2611
2612                 imr-lx4@fe860000 {
2613                         compatible = "renesas,r8a7796-imr-lx4",
2614                                      "renesas,imr-lx4";
2615                         reg = <0 0xfe860000 0 0x2000>;
2616                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2617                         clocks = <&cpg CPG_MOD 823>;
2618                         power-domains = <&sysc R8A7796_PD_A3VC>;
2619                         resets = <&cpg 823>;
2620                 };
2621
2622                 imr-lx4@fe870000 {
2623                         compatible = "renesas,r8a7796-imr-lx4",
2624                                      "renesas,imr-lx4";
2625                         reg = <0 0xfe870000 0 0x2000>;
2626                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2627                         clocks = <&cpg CPG_MOD 822>;
2628                         power-domains = <&sysc R8A7796_PD_A3VC>;
2629                         resets = <&cpg 822>;
2630                 };
2631
2632                 fdp1@fe940000 {
2633                         compatible = "renesas,fdp1";
2634                         reg = <0 0xfe940000 0 0x2400>;
2635                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2636                         clocks = <&cpg CPG_MOD 119>;
2637                         power-domains = <&sysc R8A7796_PD_A3VC>;
2638                         resets = <&cpg 119>;
2639                         renesas,fcp = <&fcpf0>;
2640                 };
2641
2642                 fcpf0: fcp@fe950000 {
2643                         compatible = "renesas,fcpf";
2644                         reg = <0 0xfe950000 0 0x200>;
2645                         clocks = <&cpg CPG_MOD 615>;
2646                         power-domains = <&sysc R8A7796_PD_A3VC>;
2647                         resets = <&cpg 615>;
2648                 };
2649
2650                 fcpvb0: fcp@fe96f000 {
2651                         compatible = "renesas,fcpv";
2652                         reg = <0 0xfe96f000 0 0x200>;
2653                         clocks = <&cpg CPG_MOD 607>;
2654                         power-domains = <&sysc R8A7796_PD_A3VC>;
2655                         resets = <&cpg 607>;
2656                 };
2657
2658                 fcpvi0: fcp@fe9af000 {
2659                         compatible = "renesas,fcpv";
2660                         reg = <0 0xfe9af000 0 0x200>;
2661                         clocks = <&cpg CPG_MOD 611>;
2662                         power-domains = <&sysc R8A7796_PD_A3VC>;
2663                         resets = <&cpg 611>;
2664                         iommus = <&ipmmu_vc0 19>;
2665                 };
2666
2667                 fcpvd0: fcp@fea27000 {
2668                         compatible = "renesas,fcpv";
2669                         reg = <0 0xfea27000 0 0x200>;
2670                         clocks = <&cpg CPG_MOD 603>;
2671                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2672                         resets = <&cpg 603>;
2673                         iommus = <&ipmmu_vi0 8>;
2674                 };
2675
2676                 fcpvd1: fcp@fea2f000 {
2677                         compatible = "renesas,fcpv";
2678                         reg = <0 0xfea2f000 0 0x200>;
2679                         clocks = <&cpg CPG_MOD 602>;
2680                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2681                         resets = <&cpg 602>;
2682                         iommus = <&ipmmu_vi0 9>;
2683                 };
2684
2685                 fcpvd2: fcp@fea37000 {
2686                         compatible = "renesas,fcpv";
2687                         reg = <0 0xfea37000 0 0x200>;
2688                         clocks = <&cpg CPG_MOD 601>;
2689                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2690                         resets = <&cpg 601>;
2691                         iommus = <&ipmmu_vi0 10>;
2692                 };
2693
2694                 vspb: vsp@fe960000 {
2695                         compatible = "renesas,vsp2";
2696                         reg = <0 0xfe960000 0 0x8000>;
2697                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2698                         clocks = <&cpg CPG_MOD 626>;
2699                         power-domains = <&sysc R8A7796_PD_A3VC>;
2700                         resets = <&cpg 626>;
2701
2702                         renesas,fcp = <&fcpvb0>;
2703                 };
2704
2705                 vspd0: vsp@fea20000 {
2706                         compatible = "renesas,vsp2";
2707                         reg = <0 0xfea20000 0 0x5000>;
2708                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2709                         clocks = <&cpg CPG_MOD 623>;
2710                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2711                         resets = <&cpg 623>;
2712
2713                         renesas,fcp = <&fcpvd0>;
2714                 };
2715
2716                 vspd1: vsp@fea28000 {
2717                         compatible = "renesas,vsp2";
2718                         reg = <0 0xfea28000 0 0x5000>;
2719                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2720                         clocks = <&cpg CPG_MOD 622>;
2721                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2722                         resets = <&cpg 622>;
2723
2724                         renesas,fcp = <&fcpvd1>;
2725                 };
2726
2727                 vspd2: vsp@fea30000 {
2728                         compatible = "renesas,vsp2";
2729                         reg = <0 0xfea30000 0 0x5000>;
2730                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2731                         clocks = <&cpg CPG_MOD 621>;
2732                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2733                         resets = <&cpg 621>;
2734
2735                         renesas,fcp = <&fcpvd2>;
2736                 };
2737
2738                 vspi0: vsp@fe9a0000 {
2739                         compatible = "renesas,vsp2";
2740                         reg = <0 0xfe9a0000 0 0x8000>;
2741                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2742                         clocks = <&cpg CPG_MOD 631>;
2743                         power-domains = <&sysc R8A7796_PD_A3VC>;
2744                         resets = <&cpg 631>;
2745
2746                         renesas,fcp = <&fcpvi0>;
2747                 };
2748
2749                 cmm0: cmm@fea40000 {
2750                         compatible = "renesas,r8a7796-cmm",
2751                                      "renesas,rcar-gen3-cmm";
2752                         reg = <0 0xfea40000 0 0x1000>;
2753                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2754                         clocks = <&cpg CPG_MOD 711>;
2755                         resets = <&cpg 711>;
2756                 };
2757
2758                 cmm1: cmm@fea50000 {
2759                         compatible = "renesas,r8a7796-cmm",
2760                                      "renesas,rcar-gen3-cmm";
2761                         reg = <0 0xfea50000 0 0x1000>;
2762                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2763                         clocks = <&cpg CPG_MOD 710>;
2764                         resets = <&cpg 710>;
2765                 };
2766
2767                 cmm2: cmm@fea60000 {
2768                         compatible = "renesas,r8a7796-cmm",
2769                                      "renesas,rcar-gen3-cmm";
2770                         reg = <0 0xfea60000 0 0x1000>;
2771                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2772                         clocks = <&cpg CPG_MOD 709>;
2773                         resets = <&cpg 709>;
2774                 };
2775
2776                 csi20: csi2@fea80000 {
2777                         compatible = "renesas,r8a7796-csi2";
2778                         reg = <0 0xfea80000 0 0x10000>;
2779                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
2780                         clocks = <&cpg CPG_MOD 714>;
2781                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2782                         resets = <&cpg 714>;
2783                         status = "disabled";
2784
2785                         ports {
2786                                 #address-cells = <1>;
2787                                 #size-cells = <0>;
2788
2789                                 port@0 {
2790                                         reg = <0>;
2791                                 };
2792
2793                                 port@1 {
2794                                         #address-cells = <1>;
2795                                         #size-cells = <0>;
2796
2797                                         reg = <1>;
2798
2799                                         csi20vin0: endpoint@0 {
2800                                                 reg = <0>;
2801                                                 remote-endpoint = <&vin0csi20>;
2802                                         };
2803                                         csi20vin1: endpoint@1 {
2804                                                 reg = <1>;
2805                                                 remote-endpoint = <&vin1csi20>;
2806                                         };
2807                                         csi20vin2: endpoint@2 {
2808                                                 reg = <2>;
2809                                                 remote-endpoint = <&vin2csi20>;
2810                                         };
2811                                         csi20vin3: endpoint@3 {
2812                                                 reg = <3>;
2813                                                 remote-endpoint = <&vin3csi20>;
2814                                         };
2815                                         csi20vin4: endpoint@4 {
2816                                                 reg = <4>;
2817                                                 remote-endpoint = <&vin4csi20>;
2818                                         };
2819                                         csi20vin5: endpoint@5 {
2820                                                 reg = <5>;
2821                                                 remote-endpoint = <&vin5csi20>;
2822                                         };
2823                                         csi20vin6: endpoint@6 {
2824                                                 reg = <6>;
2825                                                 remote-endpoint = <&vin6csi20>;
2826                                         };
2827                                         csi20vin7: endpoint@7 {
2828                                                 reg = <7>;
2829                                                 remote-endpoint = <&vin7csi20>;
2830                                         };
2831                                 };
2832                         };
2833                 };
2834
2835                 csi40: csi2@feaa0000 {
2836                         compatible = "renesas,r8a7796-csi2";
2837                         reg = <0 0xfeaa0000 0 0x10000>;
2838                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
2839                         clocks = <&cpg CPG_MOD 716>;
2840                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2841                         resets = <&cpg 716>;
2842                         status = "disabled";
2843
2844                         ports {
2845                                 #address-cells = <1>;
2846                                 #size-cells = <0>;
2847
2848                                 port@0 {
2849                                         reg = <0>;
2850                                 };
2851
2852                                 port@1 {
2853                                         #address-cells = <1>;
2854                                         #size-cells = <0>;
2855
2856                                         reg = <1>;
2857
2858                                         csi40vin0: endpoint@0 {
2859                                                 reg = <0>;
2860                                                 remote-endpoint = <&vin0csi40>;
2861                                         };
2862                                         csi40vin1: endpoint@1 {
2863                                                 reg = <1>;
2864                                                 remote-endpoint = <&vin1csi40>;
2865                                         };
2866                                         csi40vin2: endpoint@2 {
2867                                                 reg = <2>;
2868                                                 remote-endpoint = <&vin2csi40>;
2869                                         };
2870                                         csi40vin3: endpoint@3 {
2871                                                 reg = <3>;
2872                                                 remote-endpoint = <&vin3csi40>;
2873                                         };
2874                                         csi40vin4: endpoint@4 {
2875                                                 reg = <4>;
2876                                                 remote-endpoint = <&vin4csi40>;
2877                                         };
2878                                         csi40vin5: endpoint@5 {
2879                                                 reg = <5>;
2880                                                 remote-endpoint = <&vin5csi40>;
2881                                         };
2882                                         csi40vin6: endpoint@6 {
2883                                                 reg = <6>;
2884                                                 remote-endpoint = <&vin6csi40>;
2885                                         };
2886                                         csi40vin7: endpoint@7 {
2887                                                 reg = <7>;
2888                                                 remote-endpoint = <&vin7csi40>;
2889                                         };
2890                                 };
2891
2892                         };
2893                 };
2894
2895                 hdmi0: hdmi@fead0000 {
2896                         compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi";
2897                         reg = <0 0xfead0000 0 0x10000>;
2898                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
2899                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>;
2900                         clock-names = "iahb", "isfr";
2901                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2902                         resets = <&cpg 729>;
2903                         status = "disabled";
2904
2905                         ports {
2906                                 #address-cells = <1>;
2907                                 #size-cells = <0>;
2908                                 port@0 {
2909                                         reg = <0>;
2910                                         dw_hdmi0_in: endpoint {
2911                                                 remote-endpoint = <&du_out_hdmi0>;
2912                                         };
2913                                 };
2914                                 port@1 {
2915                                         reg = <1>;
2916                                 };
2917                                 port@2 {
2918                                         /* HDMI sound */
2919                                         reg = <2>;
2920                                 };
2921                         };
2922                 };
2923
2924                 du: display@feb00000 {
2925                         compatible = "renesas,du-r8a7796";
2926                         reg = <0 0xfeb00000 0 0x70000>;
2927                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
2928                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
2929                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
2930                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2931                                  <&cpg CPG_MOD 722>;
2932                         clock-names = "du.0", "du.1", "du.2";
2933                         resets = <&cpg 724>, <&cpg 722>;
2934                         reset-names = "du.0", "du.2";
2935
2936                         renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
2937                         renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
2938
2939                         status = "disabled";
2940
2941                         ports {
2942                                 #address-cells = <1>;
2943                                 #size-cells = <0>;
2944
2945                                 port@0 {
2946                                         reg = <0>;
2947                                 };
2948                                 port@1 {
2949                                         reg = <1>;
2950                                         du_out_hdmi0: endpoint {
2951                                                 remote-endpoint = <&dw_hdmi0_in>;
2952                                         };
2953                                 };
2954                                 port@2 {
2955                                         reg = <2>;
2956                                         du_out_lvds0: endpoint {
2957                                                 remote-endpoint = <&lvds0_in>;
2958                                         };
2959                                 };
2960                         };
2961                 };
2962
2963                 lvds0: lvds@feb90000 {
2964                         compatible = "renesas,r8a7796-lvds";
2965                         reg = <0 0xfeb90000 0 0x14>;
2966                         clocks = <&cpg CPG_MOD 727>;
2967                         power-domains = <&sysc R8A7796_PD_ALWAYS_ON>;
2968                         resets = <&cpg 727>;
2969                         status = "disabled";
2970
2971                         ports {
2972                                 #address-cells = <1>;
2973                                 #size-cells = <0>;
2974
2975                                 port@0 {
2976                                         reg = <0>;
2977                                         lvds0_in: endpoint {
2978                                                 remote-endpoint = <&du_out_lvds0>;
2979                                         };
2980                                 };
2981                                 port@1 {
2982                                         reg = <1>;
2983                                 };
2984                         };
2985                 };
2986
2987                 prr: chipid@fff00044 {
2988                         compatible = "renesas,prr";
2989                         reg = <0 0xfff00044 0 4>;
2990                 };
2991         };
2992
2993         thermal-zones {
2994                 sensor1_thermal: sensor1-thermal {
2995                         polling-delay-passive = <250>;
2996                         polling-delay = <1000>;
2997                         thermal-sensors = <&tsc 0>;
2998                         sustainable-power = <3874>;
2999
3000                         trips {
3001                                 sensor1_crit: sensor1-crit {
3002                                         temperature = <120000>;
3003                                         hysteresis = <1000>;
3004                                         type = "critical";
3005                                 };
3006                         };
3007                 };
3008
3009                 sensor2_thermal: sensor2-thermal {
3010                         polling-delay-passive = <250>;
3011                         polling-delay = <1000>;
3012                         thermal-sensors = <&tsc 1>;
3013                         sustainable-power = <3874>;
3014
3015                         trips {
3016                                 sensor2_crit: sensor2-crit {
3017                                         temperature = <120000>;
3018                                         hysteresis = <1000>;
3019                                         type = "critical";
3020                                 };
3021                         };
3022                 };
3023
3024                 sensor3_thermal: sensor3-thermal {
3025                         polling-delay-passive = <250>;
3026                         polling-delay = <1000>;
3027                         thermal-sensors = <&tsc 2>;
3028                         sustainable-power = <3874>;
3029
3030                         cooling-maps {
3031                                 map0 {
3032                                         trip = <&target>;
3033                                         cooling-device = <&a57_0 2 4>;
3034                                         contribution = <1024>;
3035                                 };
3036                                 map1 {
3037                                         trip = <&target>;
3038                                         cooling-device = <&a53_0 0 2>;
3039                                         contribution = <1024>;
3040                                 };
3041                         };
3042                         trips {
3043                                 target: trip-point1 {
3044                                         temperature = <100000>;
3045                                         hysteresis = <1000>;
3046                                         type = "passive";
3047                                 };
3048
3049                                 sensor3_crit: sensor3-crit {
3050                                         temperature = <120000>;
3051                                         hysteresis = <1000>;
3052                                         type = "critical";
3053                                 };
3054                         };
3055                 };
3056         };
3057
3058         timer {
3059                 compatible = "arm,armv8-timer";
3060                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3061                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3062                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>,
3063                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>;
3064         };
3065
3066         /* External USB clocks - can be overridden by the board */
3067         usb3s0_clk: usb3s0 {
3068                 compatible = "fixed-clock";
3069                 #clock-cells = <0>;
3070                 clock-frequency = <0>;
3071         };
3072
3073         usb_extal_clk: usb_extal {
3074                 compatible = "fixed-clock";
3075                 #clock-cells = <0>;
3076                 clock-frequency = <0>;
3077         };
3078 };