arch/arm64/boot/dts/renesas/r8a77951.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the R-Car H3 (R8A77951) SoC
   4  *
   5  * Copyright (C) 2015 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a7795-sysc.h>
  11
  12 #define CPG_AUDIO_CLK_I         R8A7795_CLK_S0D4
  13
  14 #define SOC_HAS_HDMI1
  15 #define SOC_HAS_SATA
  16 #define SOC_HAS_USB2_CH2
  17 #define SOC_HAS_USB2_CH3
  18
  19 / {
  20         compatible = "renesas,r8a7795";
  21         #address-cells = <2>;
  22         #size-cells = <2>;
  23
  24         /*
  25          * The external audio clocks are configured as 0 Hz fixed frequency
  26          * clocks by default.
  27          * Boards that provide audio clocks should override them.
  28          */
  29         audio_clk_a: audio_clk_a {
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32                 clock-frequency = <0>;
  33         };
  34
  35         audio_clk_b: audio_clk_b {
  36                 compatible = "fixed-clock";
  37                 #clock-cells = <0>;
  38                 clock-frequency = <0>;
  39         };
  40
  41         audio_clk_c: audio_clk_c {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         /* External CAN clock - to be overridden by boards that provide it */
  48         can_clk: can {
  49                 compatible = "fixed-clock";
  50                 #clock-cells = <0>;
  51                 clock-frequency = <0>;
  52         };
  53
  54         cluster0_opp: opp-table-0 {
  55                 compatible = "operating-points-v2";
  56                 opp-shared;
  57
  58                 opp-500000000 {
  59                         opp-hz = /bits/ 64 <500000000>;
  60                         opp-microvolt = <830000>;
  61                         clock-latency-ns = <300000>;
  62                 };
  63                 opp-1000000000 {
  64                         opp-hz = /bits/ 64 <1000000000>;
  65                         opp-microvolt = <830000>;
  66                         clock-latency-ns = <300000>;
  67                 };
  68                 opp-1500000000 {
  69                         opp-hz = /bits/ 64 <1500000000>;
  70                         opp-microvolt = <830000>;
  71                         clock-latency-ns = <300000>;
  72                         opp-suspend;
  73                 };
  74                 opp-1600000000 {
  75                         opp-hz = /bits/ 64 <1600000000>;
  76                         opp-microvolt = <900000>;
  77                         clock-latency-ns = <300000>;
  78                         turbo-mode;
  79                 };
  80                 opp-1700000000 {
  81                         opp-hz = /bits/ 64 <1700000000>;
  82                         opp-microvolt = <960000>;
  83                         clock-latency-ns = <300000>;
  84                         turbo-mode;
  85                 };
  86         };
  87
  88         cluster1_opp: opp-table-1 {
  89                 compatible = "operating-points-v2";
  90                 opp-shared;
  91
  92                 opp-800000000 {
  93                         opp-hz = /bits/ 64 <800000000>;
  94                         opp-microvolt = <820000>;
  95                         clock-latency-ns = <300000>;
  96                 };
  97                 opp-1000000000 {
  98                         opp-hz = /bits/ 64 <1000000000>;
  99                         opp-microvolt = <820000>;
 100                         clock-latency-ns = <300000>;
 101                 };
 102                 opp-1200000000 {
 103                         opp-hz = /bits/ 64 <1200000000>;
 104                         opp-microvolt = <820000>;
 105                         clock-latency-ns = <300000>;
 106                 };
 107         };
 108
 109         cpus {
 110                 #address-cells = <1>;
 111                 #size-cells = <0>;
 112
 113                 cpu-map {
 114                         cluster0 {
 115                                 core0 {
 116                                         cpu = <&a57_0>;
 117                                 };
 118                                 core1 {
 119                                         cpu = <&a57_1>;
 120                                 };
 121                                 core2 {
 122                                         cpu = <&a57_2>;
 123                                 };
 124                                 core3 {
 125                                         cpu = <&a57_3>;
 126                                 };
 127                         };
 128
 129                         cluster1 {
 130                                 core0 {
 131                                         cpu = <&a53_0>;
 132                                 };
 133                                 core1 {
 134                                         cpu = <&a53_1>;
 135                                 };
 136                                 core2 {
 137                                         cpu = <&a53_2>;
 138                                 };
 139                                 core3 {
 140                                         cpu = <&a53_3>;
 141                                 };
 142                         };
 143                 };
 144
 145                 a57_0: cpu@0 {
 146                         compatible = "arm,cortex-a57";
 147                         reg = <0x0>;
 148                         device_type = "cpu";
 149                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
 150                         next-level-cache = <&L2_CA57>;
 151                         enable-method = "psci";
 152                         cpu-idle-states = <&CPU_SLEEP_0>;
 153                         dynamic-power-coefficient = <854>;
 154                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 155                         operating-points-v2 = <&cluster0_opp>;
 156                         capacity-dmips-mhz = <1024>;
 157                         #cooling-cells = <2>;
 158                 };
 159
 160                 a57_1: cpu@1 {
 161                         compatible = "arm,cortex-a57";
 162                         reg = <0x1>;
 163                         device_type = "cpu";
 164                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
 165                         next-level-cache = <&L2_CA57>;
 166                         enable-method = "psci";
 167                         cpu-idle-states = <&CPU_SLEEP_0>;
 168                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 169                         operating-points-v2 = <&cluster0_opp>;
 170                         capacity-dmips-mhz = <1024>;
 171                         #cooling-cells = <2>;
 172                 };
 173
 174                 a57_2: cpu@2 {
 175                         compatible = "arm,cortex-a57";
 176                         reg = <0x2>;
 177                         device_type = "cpu";
 178                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
 179                         next-level-cache = <&L2_CA57>;
 180                         enable-method = "psci";
 181                         cpu-idle-states = <&CPU_SLEEP_0>;
 182                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 183                         operating-points-v2 = <&cluster0_opp>;
 184                         capacity-dmips-mhz = <1024>;
 185                         #cooling-cells = <2>;
 186                 };
 187
 188                 a57_3: cpu@3 {
 189                         compatible = "arm,cortex-a57";
 190                         reg = <0x3>;
 191                         device_type = "cpu";
 192                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
 193                         next-level-cache = <&L2_CA57>;
 194                         enable-method = "psci";
 195                         cpu-idle-states = <&CPU_SLEEP_0>;
 196                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
 197                         operating-points-v2 = <&cluster0_opp>;
 198                         capacity-dmips-mhz = <1024>;
 199                         #cooling-cells = <2>;
 200                 };
 201
 202                 a53_0: cpu@100 {
 203                         compatible = "arm,cortex-a53";
 204                         reg = <0x100>;
 205                         device_type = "cpu";
 206                         power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
 207                         next-level-cache = <&L2_CA53>;
 208                         enable-method = "psci";
 209                         cpu-idle-states = <&CPU_SLEEP_1>;
 210                         #cooling-cells = <2>;
 211                         dynamic-power-coefficient = <277>;
 212                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 213                         operating-points-v2 = <&cluster1_opp>;
 214                         capacity-dmips-mhz = <535>;
 215                 };
 216
 217                 a53_1: cpu@101 {
 218                         compatible = "arm,cortex-a53";
 219                         reg = <0x101>;
 220                         device_type = "cpu";
 221                         power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
 222                         next-level-cache = <&L2_CA53>;
 223                         enable-method = "psci";
 224                         cpu-idle-states = <&CPU_SLEEP_1>;
 225                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 226                         operating-points-v2 = <&cluster1_opp>;
 227                         capacity-dmips-mhz = <535>;
 228                 };
 229
 230                 a53_2: cpu@102 {
 231                         compatible = "arm,cortex-a53";
 232                         reg = <0x102>;
 233                         device_type = "cpu";
 234                         power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
 235                         next-level-cache = <&L2_CA53>;
 236                         enable-method = "psci";
 237                         cpu-idle-states = <&CPU_SLEEP_1>;
 238                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 239                         operating-points-v2 = <&cluster1_opp>;
 240                         capacity-dmips-mhz = <535>;
 241                 };
 242
 243                 a53_3: cpu@103 {
 244                         compatible = "arm,cortex-a53";
 245                         reg = <0x103>;
 246                         device_type = "cpu";
 247                         power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
 248                         next-level-cache = <&L2_CA53>;
 249                         enable-method = "psci";
 250                         cpu-idle-states = <&CPU_SLEEP_1>;
 251                         clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
 252                         operating-points-v2 = <&cluster1_opp>;
 253                         capacity-dmips-mhz = <535>;
 254                 };
 255
 256                 L2_CA57: cache-controller-0 {
 257                         compatible = "cache";
 258                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
 259                         cache-unified;
 260                         cache-level = <2>;
 261                 };
 262
 263                 L2_CA53: cache-controller-1 {
 264                         compatible = "cache";
 265                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
 266                         cache-unified;
 267                         cache-level = <2>;
 268                 };
 269
 270                 idle-states {
 271                         entry-method = "psci";
 272
 273                         CPU_SLEEP_0: cpu-sleep-0 {
 274                                 compatible = "arm,idle-state";
 275                                 arm,psci-suspend-param = <0x0010000>;
 276                                 local-timer-stop;
 277                                 entry-latency-us = <400>;
 278                                 exit-latency-us = <500>;
 279                                 min-residency-us = <4000>;
 280                         };
 281
 282                         CPU_SLEEP_1: cpu-sleep-1 {
 283                                 compatible = "arm,idle-state";
 284                                 arm,psci-suspend-param = <0x0010000>;
 285                                 local-timer-stop;
 286                                 entry-latency-us = <700>;
 287                                 exit-latency-us = <700>;
 288                                 min-residency-us = <5000>;
 289                         };
 290                 };
 291         };
 292
 293         extal_clk: extal {
 294                 compatible = "fixed-clock";
 295                 #clock-cells = <0>;
 296                 /* This value must be overridden by the board */
 297                 clock-frequency = <0>;
 298         };
 299
 300         extalr_clk: extalr {
 301                 compatible = "fixed-clock";
 302                 #clock-cells = <0>;
 303                 /* This value must be overridden by the board */
 304                 clock-frequency = <0>;
 305         };
 306
 307         /* External PCIe clock - can be overridden by the board */
 308         pcie_bus_clk: pcie_bus {
 309                 compatible = "fixed-clock";
 310                 #clock-cells = <0>;
 311                 clock-frequency = <0>;
 312         };
 313
 314         pmu_a53 {
 315                 compatible = "arm,cortex-a53-pmu";
 316                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 317                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
 318                                       <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
 319                                       <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 320                 interrupt-affinity = <&a53_0>,
 321                                      <&a53_1>,
 322                                      <&a53_2>,
 323                                      <&a53_3>;
 324         };
 325
 326         pmu_a57 {
 327                 compatible = "arm,cortex-a57-pmu";
 328                 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 329                                       <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 330                                       <&gic GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 331                                       <&gic GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 332                 interrupt-affinity = <&a57_0>,
 333                                      <&a57_1>,
 334                                      <&a57_2>,
 335                                      <&a57_3>;
 336         };
 337
 338         psci {
 339                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 340                 method = "smc";
 341         };
 342
 343         /* External SCIF clock - to be overridden by boards that provide it */
 344         scif_clk: scif {
 345                 compatible = "fixed-clock";
 346                 #clock-cells = <0>;
 347                 clock-frequency = <0>;
 348         };
 349
 350         soc: soc {
 351                 compatible = "simple-bus";
 352                 interrupt-parent = <&gic>;
 353
 354                 #address-cells = <2>;
 355                 #size-cells = <2>;
 356                 ranges;
 357
 358                 rwdt: watchdog@e6020000 {
 359                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 360                         reg = <0 0xe6020000 0 0x0c>;
 361                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 362                         clocks = <&cpg CPG_MOD 402>;
 363                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 364                         resets = <&cpg 402>;
 365                         status = "disabled";
 366                 };
 367
 368                 gpio0: gpio@e6050000 {
 369                         compatible = "renesas,gpio-r8a7795",
 370                                      "renesas,rcar-gen3-gpio";
 371                         reg = <0 0xe6050000 0 0x50>;
 372                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 373                         #gpio-cells = <2>;
 374                         gpio-controller;
 375                         gpio-ranges = <&pfc 0 0 16>;
 376                         #interrupt-cells = <2>;
 377                         interrupt-controller;
 378                         clocks = <&cpg CPG_MOD 912>;
 379                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 380                         resets = <&cpg 912>;
 381                 };
 382
 383                 gpio1: gpio@e6051000 {
 384                         compatible = "renesas,gpio-r8a7795",
 385                                      "renesas,rcar-gen3-gpio";
 386                         reg = <0 0xe6051000 0 0x50>;
 387                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 388                         #gpio-cells = <2>;
 389                         gpio-controller;
 390                         gpio-ranges = <&pfc 0 32 29>;
 391                         #interrupt-cells = <2>;
 392                         interrupt-controller;
 393                         clocks = <&cpg CPG_MOD 911>;
 394                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 395                         resets = <&cpg 911>;
 396                 };
 397
 398                 gpio2: gpio@e6052000 {
 399                         compatible = "renesas,gpio-r8a7795",
 400                                      "renesas,rcar-gen3-gpio";
 401                         reg = <0 0xe6052000 0 0x50>;
 402                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 403                         #gpio-cells = <2>;
 404                         gpio-controller;
 405                         gpio-ranges = <&pfc 0 64 15>;
 406                         #interrupt-cells = <2>;
 407                         interrupt-controller;
 408                         clocks = <&cpg CPG_MOD 910>;
 409                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 410                         resets = <&cpg 910>;
 411                 };
 412
 413                 gpio3: gpio@e6053000 {
 414                         compatible = "renesas,gpio-r8a7795",
 415                                      "renesas,rcar-gen3-gpio";
 416                         reg = <0 0xe6053000 0 0x50>;
 417                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 418                         #gpio-cells = <2>;
 419                         gpio-controller;
 420                         gpio-ranges = <&pfc 0 96 16>;
 421                         #interrupt-cells = <2>;
 422                         interrupt-controller;
 423                         clocks = <&cpg CPG_MOD 909>;
 424                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 425                         resets = <&cpg 909>;
 426                 };
 427
 428                 gpio4: gpio@e6054000 {
 429                         compatible = "renesas,gpio-r8a7795",
 430                                      "renesas,rcar-gen3-gpio";
 431                         reg = <0 0xe6054000 0 0x50>;
 432                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 433                         #gpio-cells = <2>;
 434                         gpio-controller;
 435                         gpio-ranges = <&pfc 0 128 18>;
 436                         #interrupt-cells = <2>;
 437                         interrupt-controller;
 438                         clocks = <&cpg CPG_MOD 908>;
 439                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 440                         resets = <&cpg 908>;
 441                 };
 442
 443                 gpio5: gpio@e6055000 {
 444                         compatible = "renesas,gpio-r8a7795",
 445                                      "renesas,rcar-gen3-gpio";
 446                         reg = <0 0xe6055000 0 0x50>;
 447                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 448                         #gpio-cells = <2>;
 449                         gpio-controller;
 450                         gpio-ranges = <&pfc 0 160 26>;
 451                         #interrupt-cells = <2>;
 452                         interrupt-controller;
 453                         clocks = <&cpg CPG_MOD 907>;
 454                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 455                         resets = <&cpg 907>;
 456                 };
 457
 458                 gpio6: gpio@e6055400 {
 459                         compatible = "renesas,gpio-r8a7795",
 460                                      "renesas,rcar-gen3-gpio";
 461                         reg = <0 0xe6055400 0 0x50>;
 462                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 463                         #gpio-cells = <2>;
 464                         gpio-controller;
 465                         gpio-ranges = <&pfc 0 192 32>;
 466                         #interrupt-cells = <2>;
 467                         interrupt-controller;
 468                         clocks = <&cpg CPG_MOD 906>;
 469                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 470                         resets = <&cpg 906>;
 471                 };
 472
 473                 gpio7: gpio@e6055800 {
 474                         compatible = "renesas,gpio-r8a7795",
 475                                      "renesas,rcar-gen3-gpio";
 476                         reg = <0 0xe6055800 0 0x50>;
 477                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 478                         #gpio-cells = <2>;
 479                         gpio-controller;
 480                         gpio-ranges = <&pfc 0 224 4>;
 481                         #interrupt-cells = <2>;
 482                         interrupt-controller;
 483                         clocks = <&cpg CPG_MOD 905>;
 484                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 485                         resets = <&cpg 905>;
 486                 };
 487
 488                 pfc: pinctrl@e6060000 {
 489                         compatible = "renesas,pfc-r8a7795";
 490                         reg = <0 0xe6060000 0 0x50c>;
 491                 };
 492
 493                 cmt0: timer@e60f0000 {
 494                         compatible = "renesas,r8a7795-cmt0",
 495                                      "renesas,rcar-gen3-cmt0";
 496                         reg = <0 0xe60f0000 0 0x1004>;
 497                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 498                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 499                         clocks = <&cpg CPG_MOD 303>;
 500                         clock-names = "fck";
 501                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 502                         resets = <&cpg 303>;
 503                         status = "disabled";
 504                 };
 505
 506                 cmt1: timer@e6130000 {
 507                         compatible = "renesas,r8a7795-cmt1",
 508                                      "renesas,rcar-gen3-cmt1";
 509                         reg = <0 0xe6130000 0 0x1004>;
 510                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 511                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 512                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 513                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 514                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 515                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 516                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 517                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 518                         clocks = <&cpg CPG_MOD 302>;
 519                         clock-names = "fck";
 520                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 521                         resets = <&cpg 302>;
 522                         status = "disabled";
 523                 };
 524
 525                 cmt2: timer@e6140000 {
 526                         compatible = "renesas,r8a7795-cmt1",
 527                                      "renesas,rcar-gen3-cmt1";
 528                         reg = <0 0xe6140000 0 0x1004>;
 529                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 530                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 531                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 532                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 533                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 534                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 535                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 536                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 537                         clocks = <&cpg CPG_MOD 301>;
 538                         clock-names = "fck";
 539                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 540                         resets = <&cpg 301>;
 541                         status = "disabled";
 542                 };
 543
 544                 cmt3: timer@e6148000 {
 545                         compatible = "renesas,r8a7795-cmt1",
 546                                      "renesas,rcar-gen3-cmt1";
 547                         reg = <0 0xe6148000 0 0x1004>;
 548                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 549                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 550                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 551                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 552                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 553                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 554                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 555                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 556                         clocks = <&cpg CPG_MOD 300>;
 557                         clock-names = "fck";
 558                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 559                         resets = <&cpg 300>;
 560                         status = "disabled";
 561                 };
 562
 563                 cpg: clock-controller@e6150000 {
 564                         compatible = "renesas,r8a7795-cpg-mssr";
 565                         reg = <0 0xe6150000 0 0x1000>;
 566                         clocks = <&extal_clk>, <&extalr_clk>;
 567                         clock-names = "extal", "extalr";
 568                         #clock-cells = <2>;
 569                         #power-domain-cells = <0>;
 570                         #reset-cells = <1>;
 571                 };
 572
 573                 rst: reset-controller@e6160000 {
 574                         compatible = "renesas,r8a7795-rst";
 575                         reg = <0 0xe6160000 0 0x0200>;
 576                 };
 577
 578                 sysc: system-controller@e6180000 {
 579                         compatible = "renesas,r8a7795-sysc";
 580                         reg = <0 0xe6180000 0 0x0400>;
 581                         #power-domain-cells = <1>;
 582                 };
 583
 584                 tsc: thermal@e6198000 {
 585                         compatible = "renesas,r8a7795-thermal";
 586                         reg = <0 0xe6198000 0 0x100>,
 587                               <0 0xe61a0000 0 0x100>,
 588                               <0 0xe61a8000 0 0x100>;
 589                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 590                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 591                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 592                         clocks = <&cpg CPG_MOD 522>;
 593                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 594                         resets = <&cpg 522>;
 595                         #thermal-sensor-cells = <1>;
 596                 };
 597
 598                 intc_ex: interrupt-controller@e61c0000 {
 599                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 600                         #interrupt-cells = <2>;
 601                         interrupt-controller;
 602                         reg = <0 0xe61c0000 0 0x200>;
 603                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 604                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 605                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 606                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 607                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 608                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 609                         clocks = <&cpg CPG_MOD 407>;
 610                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 611                         resets = <&cpg 407>;
 612                 };
 613
 614                 tmu0: timer@e61e0000 {
 615                         compatible = "renesas,tmu-r8a7795", "renesas,tmu";
 616                         reg = <0 0xe61e0000 0 0x30>;
 617                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 618                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 619                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 620                         clocks = <&cpg CPG_MOD 125>;
 621                         clock-names = "fck";
 622                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 623                         resets = <&cpg 125>;
 624                         status = "disabled";
 625                 };
 626
 627                 tmu1: timer@e6fc0000 {
 628                         compatible = "renesas,tmu-r8a7795", "renesas,tmu";
 629                         reg = <0 0xe6fc0000 0 0x30>;
 630                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 631                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 632                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 633                         clocks = <&cpg CPG_MOD 124>;
 634                         clock-names = "fck";
 635                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 636                         resets = <&cpg 124>;
 637                         status = "disabled";
 638                 };
 639
 640                 tmu2: timer@e6fd0000 {
 641                         compatible = "renesas,tmu-r8a7795", "renesas,tmu";
 642                         reg = <0 0xe6fd0000 0 0x30>;
 643                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 644                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 645                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 646                         clocks = <&cpg CPG_MOD 123>;
 647                         clock-names = "fck";
 648                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 649                         resets = <&cpg 123>;
 650                         status = "disabled";
 651                 };
 652
 653                 tmu3: timer@e6fe0000 {
 654                         compatible = "renesas,tmu-r8a7795", "renesas,tmu";
 655                         reg = <0 0xe6fe0000 0 0x30>;
 656                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 657                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 658                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 659                         clocks = <&cpg CPG_MOD 122>;
 660                         clock-names = "fck";
 661                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 662                         resets = <&cpg 122>;
 663                         status = "disabled";
 664                 };
 665
 666                 tmu4: timer@ffc00000 {
 667                         compatible = "renesas,tmu-r8a7795", "renesas,tmu";
 668                         reg = <0 0xffc00000 0 0x30>;
 669                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 670                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 671                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 672                         clocks = <&cpg CPG_MOD 121>;
 673                         clock-names = "fck";
 674                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 675                         resets = <&cpg 121>;
 676                         status = "disabled";
 677                 };
 678
 679                 i2c0: i2c@e6500000 {
 680                         #address-cells = <1>;
 681                         #size-cells = <0>;
 682                         compatible = "renesas,i2c-r8a7795",
 683                                      "renesas,rcar-gen3-i2c";
 684                         reg = <0 0xe6500000 0 0x40>;
 685                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 686                         clocks = <&cpg CPG_MOD 931>;
 687                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 688                         resets = <&cpg 931>;
 689                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 690                                <&dmac2 0x91>, <&dmac2 0x90>;
 691                         dma-names = "tx", "rx", "tx", "rx";
 692                         i2c-scl-internal-delay-ns = <110>;
 693                         status = "disabled";
 694                 };
 695
 696                 i2c1: i2c@e6508000 {
 697                         #address-cells = <1>;
 698                         #size-cells = <0>;
 699                         compatible = "renesas,i2c-r8a7795",
 700                                      "renesas,rcar-gen3-i2c";
 701                         reg = <0 0xe6508000 0 0x40>;
 702                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 703                         clocks = <&cpg CPG_MOD 930>;
 704                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 705                         resets = <&cpg 930>;
 706                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 707                                <&dmac2 0x93>, <&dmac2 0x92>;
 708                         dma-names = "tx", "rx", "tx", "rx";
 709                         i2c-scl-internal-delay-ns = <6>;
 710                         status = "disabled";
 711                 };
 712
 713                 i2c2: i2c@e6510000 {
 714                         #address-cells = <1>;
 715                         #size-cells = <0>;
 716                         compatible = "renesas,i2c-r8a7795",
 717                                      "renesas,rcar-gen3-i2c";
 718                         reg = <0 0xe6510000 0 0x40>;
 719                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 720                         clocks = <&cpg CPG_MOD 929>;
 721                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 722                         resets = <&cpg 929>;
 723                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 724                                <&dmac2 0x95>, <&dmac2 0x94>;
 725                         dma-names = "tx", "rx", "tx", "rx";
 726                         i2c-scl-internal-delay-ns = <6>;
 727                         status = "disabled";
 728                 };
 729
 730                 i2c3: i2c@e66d0000 {
 731                         #address-cells = <1>;
 732                         #size-cells = <0>;
 733                         compatible = "renesas,i2c-r8a7795",
 734                                      "renesas,rcar-gen3-i2c";
 735                         reg = <0 0xe66d0000 0 0x40>;
 736                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 737                         clocks = <&cpg CPG_MOD 928>;
 738                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 739                         resets = <&cpg 928>;
 740                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 741                         dma-names = "tx", "rx";
 742                         i2c-scl-internal-delay-ns = <110>;
 743                         status = "disabled";
 744                 };
 745
 746                 i2c4: i2c@e66d8000 {
 747                         #address-cells = <1>;
 748                         #size-cells = <0>;
 749                         compatible = "renesas,i2c-r8a7795",
 750                                      "renesas,rcar-gen3-i2c";
 751                         reg = <0 0xe66d8000 0 0x40>;
 752                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 753                         clocks = <&cpg CPG_MOD 927>;
 754                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 755                         resets = <&cpg 927>;
 756                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 757                         dma-names = "tx", "rx";
 758                         i2c-scl-internal-delay-ns = <110>;
 759                         status = "disabled";
 760                 };
 761
 762                 i2c5: i2c@e66e0000 {
 763                         #address-cells = <1>;
 764                         #size-cells = <0>;
 765                         compatible = "renesas,i2c-r8a7795",
 766                                      "renesas,rcar-gen3-i2c";
 767                         reg = <0 0xe66e0000 0 0x40>;
 768                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 769                         clocks = <&cpg CPG_MOD 919>;
 770                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 771                         resets = <&cpg 919>;
 772                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 773                         dma-names = "tx", "rx";
 774                         i2c-scl-internal-delay-ns = <110>;
 775                         status = "disabled";
 776                 };
 777
 778                 i2c6: i2c@e66e8000 {
 779                         #address-cells = <1>;
 780                         #size-cells = <0>;
 781                         compatible = "renesas,i2c-r8a7795",
 782                                      "renesas,rcar-gen3-i2c";
 783                         reg = <0 0xe66e8000 0 0x40>;
 784                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 785                         clocks = <&cpg CPG_MOD 918>;
 786                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 787                         resets = <&cpg 918>;
 788                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 789                         dma-names = "tx", "rx";
 790                         i2c-scl-internal-delay-ns = <6>;
 791                         status = "disabled";
 792                 };
 793
 794                 i2c_dvfs: i2c@e60b0000 {
 795                         #address-cells = <1>;
 796                         #size-cells = <0>;
 797                         compatible = "renesas,iic-r8a7795",
 798                                      "renesas,rcar-gen3-iic",
 799                                      "renesas,rmobile-iic";
 800                         reg = <0 0xe60b0000 0 0x425>;
 801                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 802                         clocks = <&cpg CPG_MOD 926>;
 803                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 804                         resets = <&cpg 926>;
 805                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 806                         dma-names = "tx", "rx";
 807                         status = "disabled";
 808                 };
 809
 810                 hscif0: serial@e6540000 {
 811                         compatible = "renesas,hscif-r8a7795",
 812                                      "renesas,rcar-gen3-hscif",
 813                                      "renesas,hscif";
 814                         reg = <0 0xe6540000 0 96>;
 815                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 816                         clocks = <&cpg CPG_MOD 520>,
 817                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 818                                  <&scif_clk>;
 819                         clock-names = "fck", "brg_int", "scif_clk";
 820                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 821                                <&dmac2 0x31>, <&dmac2 0x30>;
 822                         dma-names = "tx", "rx", "tx", "rx";
 823                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 824                         resets = <&cpg 520>;
 825                         status = "disabled";
 826                 };
 827
 828                 hscif1: serial@e6550000 {
 829                         compatible = "renesas,hscif-r8a7795",
 830                                      "renesas,rcar-gen3-hscif",
 831                                      "renesas,hscif";
 832                         reg = <0 0xe6550000 0 96>;
 833                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 834                         clocks = <&cpg CPG_MOD 519>,
 835                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 836                                  <&scif_clk>;
 837                         clock-names = "fck", "brg_int", "scif_clk";
 838                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 839                                <&dmac2 0x33>, <&dmac2 0x32>;
 840                         dma-names = "tx", "rx", "tx", "rx";
 841                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 842                         resets = <&cpg 519>;
 843                         status = "disabled";
 844                 };
 845
 846                 hscif2: serial@e6560000 {
 847                         compatible = "renesas,hscif-r8a7795",
 848                                      "renesas,rcar-gen3-hscif",
 849                                      "renesas,hscif";
 850                         reg = <0 0xe6560000 0 96>;
 851                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 852                         clocks = <&cpg CPG_MOD 518>,
 853                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 854                                  <&scif_clk>;
 855                         clock-names = "fck", "brg_int", "scif_clk";
 856                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 857                                <&dmac2 0x35>, <&dmac2 0x34>;
 858                         dma-names = "tx", "rx", "tx", "rx";
 859                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 860                         resets = <&cpg 518>;
 861                         status = "disabled";
 862                 };
 863
 864                 hscif3: serial@e66a0000 {
 865                         compatible = "renesas,hscif-r8a7795",
 866                                      "renesas,rcar-gen3-hscif",
 867                                      "renesas,hscif";
 868                         reg = <0 0xe66a0000 0 96>;
 869                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 870                         clocks = <&cpg CPG_MOD 517>,
 871                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 872                                  <&scif_clk>;
 873                         clock-names = "fck", "brg_int", "scif_clk";
 874                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 875                         dma-names = "tx", "rx";
 876                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 877                         resets = <&cpg 517>;
 878                         status = "disabled";
 879                 };
 880
 881                 hscif4: serial@e66b0000 {
 882                         compatible = "renesas,hscif-r8a7795",
 883                                      "renesas,rcar-gen3-hscif",
 884                                      "renesas,hscif";
 885                         reg = <0 0xe66b0000 0 96>;
 886                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 887                         clocks = <&cpg CPG_MOD 516>,
 888                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 889                                  <&scif_clk>;
 890                         clock-names = "fck", "brg_int", "scif_clk";
 891                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 892                         dma-names = "tx", "rx";
 893                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 894                         resets = <&cpg 516>;
 895                         status = "disabled";
 896                 };
 897
 898                 hsusb: usb@e6590000 {
 899                         compatible = "renesas,usbhs-r8a7795",
 900                                      "renesas,rcar-gen3-usbhs";
 901                         reg = <0 0xe6590000 0 0x200>;
 902                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 903                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 904                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 905                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 906                         dma-names = "ch0", "ch1", "ch2", "ch3";
 907                         renesas,buswait = <11>;
 908                         phys = <&usb2_phy0 3>;
 909                         phy-names = "usb";
 910                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 911                         resets = <&cpg 704>, <&cpg 703>;
 912                         status = "disabled";
 913                 };
 914
 915                 hsusb3: usb@e659c000 {
 916                         compatible = "renesas,usbhs-r8a7795",
 917                                      "renesas,rcar-gen3-usbhs";
 918                         reg = <0 0xe659c000 0 0x200>;
 919                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 920                         clocks = <&cpg CPG_MOD 705>, <&cpg CPG_MOD 700>;
 921                         dmas = <&usb_dmac2 0>, <&usb_dmac2 1>,
 922                                <&usb_dmac3 0>, <&usb_dmac3 1>;
 923                         dma-names = "ch0", "ch1", "ch2", "ch3";
 924                         renesas,buswait = <11>;
 925                         phys = <&usb2_phy3 3>;
 926                         phy-names = "usb";
 927                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 928                         resets = <&cpg 705>, <&cpg 700>;
 929                         status = "disabled";
 930                 };
 931
 932                 usb_dmac0: dma-controller@e65a0000 {
 933                         compatible = "renesas,r8a7795-usb-dmac",
 934                                      "renesas,usb-dmac";
 935                         reg = <0 0xe65a0000 0 0x100>;
 936                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 937                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 938                         interrupt-names = "ch0", "ch1";
 939                         clocks = <&cpg CPG_MOD 330>;
 940                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 941                         resets = <&cpg 330>;
 942                         #dma-cells = <1>;
 943                         dma-channels = <2>;
 944                 };
 945
 946                 usb_dmac1: dma-controller@e65b0000 {
 947                         compatible = "renesas,r8a7795-usb-dmac",
 948                                      "renesas,usb-dmac";
 949                         reg = <0 0xe65b0000 0 0x100>;
 950                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 951                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 952                         interrupt-names = "ch0", "ch1";
 953                         clocks = <&cpg CPG_MOD 331>;
 954                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 955                         resets = <&cpg 331>;
 956                         #dma-cells = <1>;
 957                         dma-channels = <2>;
 958                 };
 959
 960                 usb_dmac2: dma-controller@e6460000 {
 961                         compatible = "renesas,r8a7795-usb-dmac",
 962                                      "renesas,usb-dmac";
 963                         reg = <0 0xe6460000 0 0x100>;
 964                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
 965                                      <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 966                         interrupt-names = "ch0", "ch1";
 967                         clocks = <&cpg CPG_MOD 326>;
 968                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 969                         resets = <&cpg 326>;
 970                         #dma-cells = <1>;
 971                         dma-channels = <2>;
 972                 };
 973
 974                 usb_dmac3: dma-controller@e6470000 {
 975                         compatible = "renesas,r8a7795-usb-dmac",
 976                                      "renesas,usb-dmac";
 977                         reg = <0 0xe6470000 0 0x100>;
 978                         interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
 979                                      <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
 980                         interrupt-names = "ch0", "ch1";
 981                         clocks = <&cpg CPG_MOD 329>;
 982                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 983                         resets = <&cpg 329>;
 984                         #dma-cells = <1>;
 985                         dma-channels = <2>;
 986                 };
 987
 988                 usb3_phy0: usb-phy@e65ee000 {
 989                         compatible = "renesas,r8a7795-usb3-phy",
 990                                      "renesas,rcar-gen3-usb3-phy";
 991                         reg = <0 0xe65ee000 0 0x90>;
 992                         clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
 993                                  <&usb_extal_clk>;
 994                         clock-names = "usb3-if", "usb3s_clk", "usb_extal";
 995                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 996                         resets = <&cpg 328>;
 997                         #phy-cells = <0>;
 998                         status = "disabled";
 999                 };
1000
1001                 arm_cc630p: crypto@e6601000 {
1002                         compatible = "arm,cryptocell-630p-ree";
1003                         interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
1004                         reg = <0x0 0xe6601000 0 0x1000>;
1005                         clocks = <&cpg CPG_MOD 229>;
1006                         resets = <&cpg 229>;
1007                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1008                 };
1009
1010                 dmac0: dma-controller@e6700000 {
1011                         compatible = "renesas,dmac-r8a7795",
1012                                      "renesas,rcar-dmac";
1013                         reg = <0 0xe6700000 0 0x10000>;
1014                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
1015                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
1016                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
1017                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
1018                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
1019                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
1020                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
1021                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
1022                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
1023                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
1024                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
1025                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
1026                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
1027                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
1028                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
1029                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
1030                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
1031                         interrupt-names = "error",
1032                                         "ch0", "ch1", "ch2", "ch3",
1033                                         "ch4", "ch5", "ch6", "ch7",
1034                                         "ch8", "ch9", "ch10", "ch11",
1035                                         "ch12", "ch13", "ch14", "ch15";
1036                         clocks = <&cpg CPG_MOD 219>;
1037                         clock-names = "fck";
1038                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1039                         resets = <&cpg 219>;
1040                         #dma-cells = <1>;
1041                         dma-channels = <16>;
1042                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
1043                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
1044                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
1045                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
1046                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
1047                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
1048                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
1049                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
1050                 };
1051
1052                 dmac1: dma-controller@e7300000 {
1053                         compatible = "renesas,dmac-r8a7795",
1054                                      "renesas,rcar-dmac";
1055                         reg = <0 0xe7300000 0 0x10000>;
1056                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
1057                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
1058                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
1059                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
1060                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
1061                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
1062                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
1063                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
1064                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
1065                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
1066                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
1067                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
1068                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
1069                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
1070                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
1071                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
1072                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
1073                         interrupt-names = "error",
1074                                         "ch0", "ch1", "ch2", "ch3",
1075                                         "ch4", "ch5", "ch6", "ch7",
1076                                         "ch8", "ch9", "ch10", "ch11",
1077                                         "ch12", "ch13", "ch14", "ch15";
1078                         clocks = <&cpg CPG_MOD 218>;
1079                         clock-names = "fck";
1080                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1081                         resets = <&cpg 218>;
1082                         #dma-cells = <1>;
1083                         dma-channels = <16>;
1084                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
1085                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
1086                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
1087                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
1088                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
1089                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
1090                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
1091                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
1092                 };
1093
1094                 dmac2: dma-controller@e7310000 {
1095                         compatible = "renesas,dmac-r8a7795",
1096                                      "renesas,rcar-dmac";
1097                         reg = <0 0xe7310000 0 0x10000>;
1098                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
1099                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
1100                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
1101                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
1102                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
1103                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
1104                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
1105                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
1106                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
1107                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
1108                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
1109                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
1110                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
1111                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
1112                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
1113                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
1114                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
1115                         interrupt-names = "error",
1116                                         "ch0", "ch1", "ch2", "ch3",
1117                                         "ch4", "ch5", "ch6", "ch7",
1118                                         "ch8", "ch9", "ch10", "ch11",
1119                                         "ch12", "ch13", "ch14", "ch15";
1120                         clocks = <&cpg CPG_MOD 217>;
1121                         clock-names = "fck";
1122                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1123                         resets = <&cpg 217>;
1124                         #dma-cells = <1>;
1125                         dma-channels = <16>;
1126                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
1127                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
1128                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
1129                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
1130                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
1131                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
1132                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
1133                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
1134                 };
1135
1136                 ipmmu_ds0: iommu@e6740000 {
1137                         compatible = "renesas,ipmmu-r8a7795";
1138                         reg = <0 0xe6740000 0 0x1000>;
1139                         renesas,ipmmu-main = <&ipmmu_mm 0>;
1140                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1141                         #iommu-cells = <1>;
1142                 };
1143
1144                 ipmmu_ds1: iommu@e7740000 {
1145                         compatible = "renesas,ipmmu-r8a7795";
1146                         reg = <0 0xe7740000 0 0x1000>;
1147                         renesas,ipmmu-main = <&ipmmu_mm 1>;
1148                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1149                         #iommu-cells = <1>;
1150                 };
1151
1152                 ipmmu_hc: iommu@e6570000 {
1153                         compatible = "renesas,ipmmu-r8a7795";
1154                         reg = <0 0xe6570000 0 0x1000>;
1155                         renesas,ipmmu-main = <&ipmmu_mm 2>;
1156                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1157                         #iommu-cells = <1>;
1158                 };
1159
1160                 ipmmu_ir: iommu@ff8b0000 {
1161                         compatible = "renesas,ipmmu-r8a7795";
1162                         reg = <0 0xff8b0000 0 0x1000>;
1163                         renesas,ipmmu-main = <&ipmmu_mm 3>;
1164                         power-domains = <&sysc R8A7795_PD_A3IR>;
1165                         #iommu-cells = <1>;
1166                 };
1167
1168                 ipmmu_mm: iommu@e67b0000 {
1169                         compatible = "renesas,ipmmu-r8a7795";
1170                         reg = <0 0xe67b0000 0 0x1000>;
1171                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
1172                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
1173                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1174                         #iommu-cells = <1>;
1175                 };
1176
1177                 ipmmu_mp0: iommu@ec670000 {
1178                         compatible = "renesas,ipmmu-r8a7795";
1179                         reg = <0 0xec670000 0 0x1000>;
1180                         renesas,ipmmu-main = <&ipmmu_mm 4>;
1181                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1182                         #iommu-cells = <1>;
1183                 };
1184
1185                 ipmmu_pv0: iommu@fd800000 {
1186                         compatible = "renesas,ipmmu-r8a7795";
1187                         reg = <0 0xfd800000 0 0x1000>;
1188                         renesas,ipmmu-main = <&ipmmu_mm 6>;
1189                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1190                         #iommu-cells = <1>;
1191                 };
1192
1193                 ipmmu_pv1: iommu@fd950000 {
1194                         compatible = "renesas,ipmmu-r8a7795";
1195                         reg = <0 0xfd950000 0 0x1000>;
1196                         renesas,ipmmu-main = <&ipmmu_mm 7>;
1197                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1198                         #iommu-cells = <1>;
1199                 };
1200
1201                 ipmmu_pv2: iommu@fd960000 {
1202                         compatible = "renesas,ipmmu-r8a7795";
1203                         reg = <0 0xfd960000 0 0x1000>;
1204                         renesas,ipmmu-main = <&ipmmu_mm 8>;
1205                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1206                         #iommu-cells = <1>;
1207                 };
1208
1209                 ipmmu_pv3: iommu@fd970000 {
1210                         compatible = "renesas,ipmmu-r8a7795";
1211                         reg = <0 0xfd970000 0 0x1000>;
1212                         renesas,ipmmu-main = <&ipmmu_mm 9>;
1213                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1214                         #iommu-cells = <1>;
1215                 };
1216
1217                 ipmmu_rt: iommu@ffc80000 {
1218                         compatible = "renesas,ipmmu-r8a7795";
1219                         reg = <0 0xffc80000 0 0x1000>;
1220                         renesas,ipmmu-main = <&ipmmu_mm 10>;
1221                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1222                         #iommu-cells = <1>;
1223                 };
1224
1225                 ipmmu_vc0: iommu@fe6b0000 {
1226                         compatible = "renesas,ipmmu-r8a7795";
1227                         reg = <0 0xfe6b0000 0 0x1000>;
1228                         renesas,ipmmu-main = <&ipmmu_mm 12>;
1229                         power-domains = <&sysc R8A7795_PD_A3VC>;
1230                         #iommu-cells = <1>;
1231                 };
1232
1233                 ipmmu_vc1: iommu@fe6f0000 {
1234                         compatible = "renesas,ipmmu-r8a7795";
1235                         reg = <0 0xfe6f0000 0 0x1000>;
1236                         renesas,ipmmu-main = <&ipmmu_mm 13>;
1237                         power-domains = <&sysc R8A7795_PD_A3VC>;
1238                         #iommu-cells = <1>;
1239                 };
1240
1241                 ipmmu_vi0: iommu@febd0000 {
1242                         compatible = "renesas,ipmmu-r8a7795";
1243                         reg = <0 0xfebd0000 0 0x1000>;
1244                         renesas,ipmmu-main = <&ipmmu_mm 14>;
1245                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1246                         #iommu-cells = <1>;
1247                 };
1248
1249                 ipmmu_vi1: iommu@febe0000 {
1250                         compatible = "renesas,ipmmu-r8a7795";
1251                         reg = <0 0xfebe0000 0 0x1000>;
1252                         renesas,ipmmu-main = <&ipmmu_mm 15>;
1253                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1254                         #iommu-cells = <1>;
1255                 };
1256
1257                 ipmmu_vp0: iommu@fe990000 {
1258                         compatible = "renesas,ipmmu-r8a7795";
1259                         reg = <0 0xfe990000 0 0x1000>;
1260                         renesas,ipmmu-main = <&ipmmu_mm 16>;
1261                         power-domains = <&sysc R8A7795_PD_A3VP>;
1262                         #iommu-cells = <1>;
1263                 };
1264
1265                 ipmmu_vp1: iommu@fe980000 {
1266                         compatible = "renesas,ipmmu-r8a7795";
1267                         reg = <0 0xfe980000 0 0x1000>;
1268                         renesas,ipmmu-main = <&ipmmu_mm 17>;
1269                         power-domains = <&sysc R8A7795_PD_A3VP>;
1270                         #iommu-cells = <1>;
1271                 };
1272
1273                 avb: ethernet@e6800000 {
1274                         compatible = "renesas,etheravb-r8a7795",
1275                                      "renesas,etheravb-rcar-gen3";
1276                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
1277                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
1278                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
1279                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
1280                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
1281                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
1282                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
1283                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
1284                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
1285                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
1286                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
1287                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
1288                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
1289                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
1290                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
1291                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
1292                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
1293                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
1294                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
1295                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
1296                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
1297                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
1298                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
1299                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
1300                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
1301                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
1302                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
1303                                           "ch4", "ch5", "ch6", "ch7",
1304                                           "ch8", "ch9", "ch10", "ch11",
1305                                           "ch12", "ch13", "ch14", "ch15",
1306                                           "ch16", "ch17", "ch18", "ch19",
1307                                           "ch20", "ch21", "ch22", "ch23",
1308                                           "ch24";
1309                         clocks = <&cpg CPG_MOD 812>;
1310                         clock-names = "fck";
1311                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1312                         resets = <&cpg 812>;
1313                         phy-mode = "rgmii";
1314                         rx-internal-delay-ps = <0>;
1315                         tx-internal-delay-ps = <0>;
1316                         iommus = <&ipmmu_ds0 16>;
1317                         #address-cells = <1>;
1318                         #size-cells = <0>;
1319                         status = "disabled";
1320                 };
1321
1322                 can0: can@e6c30000 {
1323                         compatible = "renesas,can-r8a7795",
1324                                      "renesas,rcar-gen3-can";
1325                         reg = <0 0xe6c30000 0 0x1000>;
1326                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1327                         clocks = <&cpg CPG_MOD 916>,
1328                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1329                                <&can_clk>;
1330                         clock-names = "clkp1", "clkp2", "can_clk";
1331                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1332                         assigned-clock-rates = <40000000>;
1333                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1334                         resets = <&cpg 916>;
1335                         status = "disabled";
1336                 };
1337
1338                 can1: can@e6c38000 {
1339                         compatible = "renesas,can-r8a7795",
1340                                      "renesas,rcar-gen3-can";
1341                         reg = <0 0xe6c38000 0 0x1000>;
1342                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1343                         clocks = <&cpg CPG_MOD 915>,
1344                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1345                                <&can_clk>;
1346                         clock-names = "clkp1", "clkp2", "can_clk";
1347                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1348                         assigned-clock-rates = <40000000>;
1349                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1350                         resets = <&cpg 915>;
1351                         status = "disabled";
1352                 };
1353
1354                 canfd: can@e66c0000 {
1355                         compatible = "renesas,r8a7795-canfd",
1356                                      "renesas,rcar-gen3-canfd";
1357                         reg = <0 0xe66c0000 0 0x8000>;
1358                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1359                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1360                         interrupt-names = "ch_int", "g_int";
1361                         clocks = <&cpg CPG_MOD 914>,
1362                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
1363                                <&can_clk>;
1364                         clock-names = "fck", "canfd", "can_clk";
1365                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
1366                         assigned-clock-rates = <40000000>;
1367                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1368                         resets = <&cpg 914>;
1369                         status = "disabled";
1370
1371                         channel0 {
1372                                 status = "disabled";
1373                         };
1374
1375                         channel1 {
1376                                 status = "disabled";
1377                         };
1378                 };
1379
1380                 pwm0: pwm@e6e30000 {
1381                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1382                         reg = <0 0xe6e30000 0 0x8>;
1383                         clocks = <&cpg CPG_MOD 523>;
1384                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1385                         resets = <&cpg 523>;
1386                         #pwm-cells = <2>;
1387                         status = "disabled";
1388                 };
1389
1390                 pwm1: pwm@e6e31000 {
1391                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1392                         reg = <0 0xe6e31000 0 0x8>;
1393                         clocks = <&cpg CPG_MOD 523>;
1394                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1395                         resets = <&cpg 523>;
1396                         #pwm-cells = <2>;
1397                         status = "disabled";
1398                 };
1399
1400                 pwm2: pwm@e6e32000 {
1401                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1402                         reg = <0 0xe6e32000 0 0x8>;
1403                         clocks = <&cpg CPG_MOD 523>;
1404                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1405                         resets = <&cpg 523>;
1406                         #pwm-cells = <2>;
1407                         status = "disabled";
1408                 };
1409
1410                 pwm3: pwm@e6e33000 {
1411                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1412                         reg = <0 0xe6e33000 0 0x8>;
1413                         clocks = <&cpg CPG_MOD 523>;
1414                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1415                         resets = <&cpg 523>;
1416                         #pwm-cells = <2>;
1417                         status = "disabled";
1418                 };
1419
1420                 pwm4: pwm@e6e34000 {
1421                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1422                         reg = <0 0xe6e34000 0 0x8>;
1423                         clocks = <&cpg CPG_MOD 523>;
1424                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1425                         resets = <&cpg 523>;
1426                         #pwm-cells = <2>;
1427                         status = "disabled";
1428                 };
1429
1430                 pwm5: pwm@e6e35000 {
1431                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1432                         reg = <0 0xe6e35000 0 0x8>;
1433                         clocks = <&cpg CPG_MOD 523>;
1434                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1435                         resets = <&cpg 523>;
1436                         #pwm-cells = <2>;
1437                         status = "disabled";
1438                 };
1439
1440                 pwm6: pwm@e6e36000 {
1441                         compatible = "renesas,pwm-r8a7795", "renesas,pwm-rcar";
1442                         reg = <0 0xe6e36000 0 0x8>;
1443                         clocks = <&cpg CPG_MOD 523>;
1444                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1445                         resets = <&cpg 523>;
1446                         #pwm-cells = <2>;
1447                         status = "disabled";
1448                 };
1449
1450                 scif0: serial@e6e60000 {
1451                         compatible = "renesas,scif-r8a7795",
1452                                      "renesas,rcar-gen3-scif", "renesas,scif";
1453                         reg = <0 0xe6e60000 0 64>;
1454                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1455                         clocks = <&cpg CPG_MOD 207>,
1456                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1457                                  <&scif_clk>;
1458                         clock-names = "fck", "brg_int", "scif_clk";
1459                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1460                                <&dmac2 0x51>, <&dmac2 0x50>;
1461                         dma-names = "tx", "rx", "tx", "rx";
1462                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1463                         resets = <&cpg 207>;
1464                         status = "disabled";
1465                 };
1466
1467                 scif1: serial@e6e68000 {
1468                         compatible = "renesas,scif-r8a7795",
1469                                      "renesas,rcar-gen3-scif", "renesas,scif";
1470                         reg = <0 0xe6e68000 0 64>;
1471                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1472                         clocks = <&cpg CPG_MOD 206>,
1473                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1474                                  <&scif_clk>;
1475                         clock-names = "fck", "brg_int", "scif_clk";
1476                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1477                                <&dmac2 0x53>, <&dmac2 0x52>;
1478                         dma-names = "tx", "rx", "tx", "rx";
1479                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1480                         resets = <&cpg 206>;
1481                         status = "disabled";
1482                 };
1483
1484                 scif2: serial@e6e88000 {
1485                         compatible = "renesas,scif-r8a7795",
1486                                      "renesas,rcar-gen3-scif", "renesas,scif";
1487                         reg = <0 0xe6e88000 0 64>;
1488                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1489                         clocks = <&cpg CPG_MOD 310>,
1490                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1491                                  <&scif_clk>;
1492                         clock-names = "fck", "brg_int", "scif_clk";
1493                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1494                                <&dmac2 0x13>, <&dmac2 0x12>;
1495                         dma-names = "tx", "rx", "tx", "rx";
1496                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1497                         resets = <&cpg 310>;
1498                         status = "disabled";
1499                 };
1500
1501                 scif3: serial@e6c50000 {
1502                         compatible = "renesas,scif-r8a7795",
1503                                      "renesas,rcar-gen3-scif", "renesas,scif";
1504                         reg = <0 0xe6c50000 0 64>;
1505                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1506                         clocks = <&cpg CPG_MOD 204>,
1507                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1508                                  <&scif_clk>;
1509                         clock-names = "fck", "brg_int", "scif_clk";
1510                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1511                         dma-names = "tx", "rx";
1512                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1513                         resets = <&cpg 204>;
1514                         status = "disabled";
1515                 };
1516
1517                 scif4: serial@e6c40000 {
1518                         compatible = "renesas,scif-r8a7795",
1519                                      "renesas,rcar-gen3-scif", "renesas,scif";
1520                         reg = <0 0xe6c40000 0 64>;
1521                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1522                         clocks = <&cpg CPG_MOD 203>,
1523                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1524                                  <&scif_clk>;
1525                         clock-names = "fck", "brg_int", "scif_clk";
1526                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1527                         dma-names = "tx", "rx";
1528                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1529                         resets = <&cpg 203>;
1530                         status = "disabled";
1531                 };
1532
1533                 scif5: serial@e6f30000 {
1534                         compatible = "renesas,scif-r8a7795",
1535                                      "renesas,rcar-gen3-scif", "renesas,scif";
1536                         reg = <0 0xe6f30000 0 64>;
1537                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1538                         clocks = <&cpg CPG_MOD 202>,
1539                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
1540                                  <&scif_clk>;
1541                         clock-names = "fck", "brg_int", "scif_clk";
1542                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>,
1543                                <&dmac2 0x5b>, <&dmac2 0x5a>;
1544                         dma-names = "tx", "rx", "tx", "rx";
1545                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1546                         resets = <&cpg 202>;
1547                         status = "disabled";
1548                 };
1549
1550                 tpu: pwm@e6e80000 {
1551                         compatible = "renesas,tpu-r8a7795", "renesas,tpu";
1552                         reg = <0 0xe6e80000 0 0x148>;
1553                         interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
1554                         clocks = <&cpg CPG_MOD 304>;
1555                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1556                         resets = <&cpg 304>;
1557                         #pwm-cells = <3>;
1558                         status = "disabled";
1559                 };
1560
1561                 msiof0: spi@e6e90000 {
1562                         compatible = "renesas,msiof-r8a7795",
1563                                      "renesas,rcar-gen3-msiof";
1564                         reg = <0 0xe6e90000 0 0x0064>;
1565                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1566                         clocks = <&cpg CPG_MOD 211>;
1567                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1568                                <&dmac2 0x41>, <&dmac2 0x40>;
1569                         dma-names = "tx", "rx", "tx", "rx";
1570                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1571                         resets = <&cpg 211>;
1572                         #address-cells = <1>;
1573                         #size-cells = <0>;
1574                         status = "disabled";
1575                 };
1576
1577                 msiof1: spi@e6ea0000 {
1578                         compatible = "renesas,msiof-r8a7795",
1579                                      "renesas,rcar-gen3-msiof";
1580                         reg = <0 0xe6ea0000 0 0x0064>;
1581                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1582                         clocks = <&cpg CPG_MOD 210>;
1583                         dmas = <&dmac1 0x43>, <&dmac1 0x42>,
1584                                <&dmac2 0x43>, <&dmac2 0x42>;
1585                         dma-names = "tx", "rx", "tx", "rx";
1586                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1587                         resets = <&cpg 210>;
1588                         #address-cells = <1>;
1589                         #size-cells = <0>;
1590                         status = "disabled";
1591                 };
1592
1593                 msiof2: spi@e6c00000 {
1594                         compatible = "renesas,msiof-r8a7795",
1595                                      "renesas,rcar-gen3-msiof";
1596                         reg = <0 0xe6c00000 0 0x0064>;
1597                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1598                         clocks = <&cpg CPG_MOD 209>;
1599                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1600                         dma-names = "tx", "rx";
1601                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1602                         resets = <&cpg 209>;
1603                         #address-cells = <1>;
1604                         #size-cells = <0>;
1605                         status = "disabled";
1606                 };
1607
1608                 msiof3: spi@e6c10000 {
1609                         compatible = "renesas,msiof-r8a7795",
1610                                      "renesas,rcar-gen3-msiof";
1611                         reg = <0 0xe6c10000 0 0x0064>;
1612                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1613                         clocks = <&cpg CPG_MOD 208>;
1614                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1615                         dma-names = "tx", "rx";
1616                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1617                         resets = <&cpg 208>;
1618                         #address-cells = <1>;
1619                         #size-cells = <0>;
1620                         status = "disabled";
1621                 };
1622
1623                 vin0: video@e6ef0000 {
1624                         compatible = "renesas,vin-r8a7795";
1625                         reg = <0 0xe6ef0000 0 0x1000>;
1626                         interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
1627                         clocks = <&cpg CPG_MOD 811>;
1628                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1629                         resets = <&cpg 811>;
1630                         renesas,id = <0>;
1631                         status = "disabled";
1632
1633                         ports {
1634                                 #address-cells = <1>;
1635                                 #size-cells = <0>;
1636
1637                                 port@1 {
1638                                         #address-cells = <1>;
1639                                         #size-cells = <0>;
1640
1641                                         reg = <1>;
1642
1643                                         vin0csi20: endpoint@0 {
1644                                                 reg = <0>;
1645                                                 remote-endpoint = <&csi20vin0>;
1646                                         };
1647                                         vin0csi40: endpoint@2 {
1648                                                 reg = <2>;
1649                                                 remote-endpoint = <&csi40vin0>;
1650                                         };
1651                                 };
1652                         };
1653                 };
1654
1655                 vin1: video@e6ef1000 {
1656                         compatible = "renesas,vin-r8a7795";
1657                         reg = <0 0xe6ef1000 0 0x1000>;
1658                         interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1659                         clocks = <&cpg CPG_MOD 810>;
1660                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1661                         resets = <&cpg 810>;
1662                         renesas,id = <1>;
1663                         status = "disabled";
1664
1665                         ports {
1666                                 #address-cells = <1>;
1667                                 #size-cells = <0>;
1668
1669                                 port@1 {
1670                                         #address-cells = <1>;
1671                                         #size-cells = <0>;
1672
1673                                         reg = <1>;
1674
1675                                         vin1csi20: endpoint@0 {
1676                                                 reg = <0>;
1677                                                 remote-endpoint = <&csi20vin1>;
1678                                         };
1679                                         vin1csi40: endpoint@2 {
1680                                                 reg = <2>;
1681                                                 remote-endpoint = <&csi40vin1>;
1682                                         };
1683                                 };
1684                         };
1685                 };
1686
1687                 vin2: video@e6ef2000 {
1688                         compatible = "renesas,vin-r8a7795";
1689                         reg = <0 0xe6ef2000 0 0x1000>;
1690                         interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1691                         clocks = <&cpg CPG_MOD 809>;
1692                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1693                         resets = <&cpg 809>;
1694                         renesas,id = <2>;
1695                         status = "disabled";
1696
1697                         ports {
1698                                 #address-cells = <1>;
1699                                 #size-cells = <0>;
1700
1701                                 port@1 {
1702                                         #address-cells = <1>;
1703                                         #size-cells = <0>;
1704
1705                                         reg = <1>;
1706
1707                                         vin2csi20: endpoint@0 {
1708                                                 reg = <0>;
1709                                                 remote-endpoint = <&csi20vin2>;
1710                                         };
1711                                         vin2csi40: endpoint@2 {
1712                                                 reg = <2>;
1713                                                 remote-endpoint = <&csi40vin2>;
1714                                         };
1715                                 };
1716                         };
1717                 };
1718
1719                 vin3: video@e6ef3000 {
1720                         compatible = "renesas,vin-r8a7795";
1721                         reg = <0 0xe6ef3000 0 0x1000>;
1722                         interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1723                         clocks = <&cpg CPG_MOD 808>;
1724                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1725                         resets = <&cpg 808>;
1726                         renesas,id = <3>;
1727                         status = "disabled";
1728
1729                         ports {
1730                                 #address-cells = <1>;
1731                                 #size-cells = <0>;
1732
1733                                 port@1 {
1734                                         #address-cells = <1>;
1735                                         #size-cells = <0>;
1736
1737                                         reg = <1>;
1738
1739                                         vin3csi20: endpoint@0 {
1740                                                 reg = <0>;
1741                                                 remote-endpoint = <&csi20vin3>;
1742                                         };
1743                                         vin3csi40: endpoint@2 {
1744                                                 reg = <2>;
1745                                                 remote-endpoint = <&csi40vin3>;
1746                                         };
1747                                 };
1748                         };
1749                 };
1750
1751                 vin4: video@e6ef4000 {
1752                         compatible = "renesas,vin-r8a7795";
1753                         reg = <0 0xe6ef4000 0 0x1000>;
1754                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1755                         clocks = <&cpg CPG_MOD 807>;
1756                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1757                         resets = <&cpg 807>;
1758                         renesas,id = <4>;
1759                         status = "disabled";
1760
1761                         ports {
1762                                 #address-cells = <1>;
1763                                 #size-cells = <0>;
1764
1765                                 port@1 {
1766                                         #address-cells = <1>;
1767                                         #size-cells = <0>;
1768
1769                                         reg = <1>;
1770
1771                                         vin4csi20: endpoint@0 {
1772                                                 reg = <0>;
1773                                                 remote-endpoint = <&csi20vin4>;
1774                                         };
1775                                         vin4csi41: endpoint@3 {
1776                                                 reg = <3>;
1777                                                 remote-endpoint = <&csi41vin4>;
1778                                         };
1779                                 };
1780                         };
1781                 };
1782
1783                 vin5: video@e6ef5000 {
1784                         compatible = "renesas,vin-r8a7795";
1785                         reg = <0 0xe6ef5000 0 0x1000>;
1786                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1787                         clocks = <&cpg CPG_MOD 806>;
1788                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1789                         resets = <&cpg 806>;
1790                         renesas,id = <5>;
1791                         status = "disabled";
1792
1793                         ports {
1794                                 #address-cells = <1>;
1795                                 #size-cells = <0>;
1796
1797                                 port@1 {
1798                                         #address-cells = <1>;
1799                                         #size-cells = <0>;
1800
1801                                         reg = <1>;
1802
1803                                         vin5csi20: endpoint@0 {
1804                                                 reg = <0>;
1805                                                 remote-endpoint = <&csi20vin5>;
1806                                         };
1807                                         vin5csi41: endpoint@3 {
1808                                                 reg = <3>;
1809                                                 remote-endpoint = <&csi41vin5>;
1810                                         };
1811                                 };
1812                         };
1813                 };
1814
1815                 vin6: video@e6ef6000 {
1816                         compatible = "renesas,vin-r8a7795";
1817                         reg = <0 0xe6ef6000 0 0x1000>;
1818                         interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
1819                         clocks = <&cpg CPG_MOD 805>;
1820                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1821                         resets = <&cpg 805>;
1822                         renesas,id = <6>;
1823                         status = "disabled";
1824
1825                         ports {
1826                                 #address-cells = <1>;
1827                                 #size-cells = <0>;
1828
1829                                 port@1 {
1830                                         #address-cells = <1>;
1831                                         #size-cells = <0>;
1832
1833                                         reg = <1>;
1834
1835                                         vin6csi20: endpoint@0 {
1836                                                 reg = <0>;
1837                                                 remote-endpoint = <&csi20vin6>;
1838                                         };
1839                                         vin6csi41: endpoint@3 {
1840                                                 reg = <3>;
1841                                                 remote-endpoint = <&csi41vin6>;
1842                                         };
1843                                 };
1844                         };
1845                 };
1846
1847                 vin7: video@e6ef7000 {
1848                         compatible = "renesas,vin-r8a7795";
1849                         reg = <0 0xe6ef7000 0 0x1000>;
1850                         interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
1851                         clocks = <&cpg CPG_MOD 804>;
1852                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1853                         resets = <&cpg 804>;
1854                         renesas,id = <7>;
1855                         status = "disabled";
1856
1857                         ports {
1858                                 #address-cells = <1>;
1859                                 #size-cells = <0>;
1860
1861                                 port@1 {
1862                                         #address-cells = <1>;
1863                                         #size-cells = <0>;
1864
1865                                         reg = <1>;
1866
1867                                         vin7csi20: endpoint@0 {
1868                                                 reg = <0>;
1869                                                 remote-endpoint = <&csi20vin7>;
1870                                         };
1871                                         vin7csi41: endpoint@3 {
1872                                                 reg = <3>;
1873                                                 remote-endpoint = <&csi41vin7>;
1874                                         };
1875                                 };
1876                         };
1877                 };
1878
1879                 drif00: rif@e6f40000 {
1880                         compatible = "renesas,r8a7795-drif",
1881                                      "renesas,rcar-gen3-drif";
1882                         reg = <0 0xe6f40000 0 0x64>;
1883                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
1884                         clocks = <&cpg CPG_MOD 515>;
1885                         clock-names = "fck";
1886                         dmas = <&dmac1 0x20>, <&dmac2 0x20>;
1887                         dma-names = "rx", "rx";
1888                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1889                         resets = <&cpg 515>;
1890                         renesas,bonding = <&drif01>;
1891                         status = "disabled";
1892                 };
1893
1894                 drif01: rif@e6f50000 {
1895                         compatible = "renesas,r8a7795-drif",
1896                                      "renesas,rcar-gen3-drif";
1897                         reg = <0 0xe6f50000 0 0x64>;
1898                         interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
1899                         clocks = <&cpg CPG_MOD 514>;
1900                         clock-names = "fck";
1901                         dmas = <&dmac1 0x22>, <&dmac2 0x22>;
1902                         dma-names = "rx", "rx";
1903                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1904                         resets = <&cpg 514>;
1905                         renesas,bonding = <&drif00>;
1906                         status = "disabled";
1907                 };
1908
1909                 drif10: rif@e6f60000 {
1910                         compatible = "renesas,r8a7795-drif",
1911                                      "renesas,rcar-gen3-drif";
1912                         reg = <0 0xe6f60000 0 0x64>;
1913                         interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
1914                         clocks = <&cpg CPG_MOD 513>;
1915                         clock-names = "fck";
1916                         dmas = <&dmac1 0x24>, <&dmac2 0x24>;
1917                         dma-names = "rx", "rx";
1918                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1919                         resets = <&cpg 513>;
1920                         renesas,bonding = <&drif11>;
1921                         status = "disabled";
1922                 };
1923
1924                 drif11: rif@e6f70000 {
1925                         compatible = "renesas,r8a7795-drif",
1926                                      "renesas,rcar-gen3-drif";
1927                         reg = <0 0xe6f70000 0 0x64>;
1928                         interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
1929                         clocks = <&cpg CPG_MOD 512>;
1930                         clock-names = "fck";
1931                         dmas = <&dmac1 0x26>, <&dmac2 0x26>;
1932                         dma-names = "rx", "rx";
1933                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1934                         resets = <&cpg 512>;
1935                         renesas,bonding = <&drif10>;
1936                         status = "disabled";
1937                 };
1938
1939                 drif20: rif@e6f80000 {
1940                         compatible = "renesas,r8a7795-drif",
1941                                      "renesas,rcar-gen3-drif";
1942                         reg = <0 0xe6f80000 0 0x64>;
1943                         interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
1944                         clocks = <&cpg CPG_MOD 511>;
1945                         clock-names = "fck";
1946                         dmas = <&dmac1 0x28>, <&dmac2 0x28>;
1947                         dma-names = "rx", "rx";
1948                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1949                         resets = <&cpg 511>;
1950                         renesas,bonding = <&drif21>;
1951                         status = "disabled";
1952                 };
1953
1954                 drif21: rif@e6f90000 {
1955                         compatible = "renesas,r8a7795-drif",
1956                                      "renesas,rcar-gen3-drif";
1957                         reg = <0 0xe6f90000 0 0x64>;
1958                         interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
1959                         clocks = <&cpg CPG_MOD 510>;
1960                         clock-names = "fck";
1961                         dmas = <&dmac1 0x2a>, <&dmac2 0x2a>;
1962                         dma-names = "rx", "rx";
1963                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1964                         resets = <&cpg 510>;
1965                         renesas,bonding = <&drif20>;
1966                         status = "disabled";
1967                 };
1968
1969                 drif30: rif@e6fa0000 {
1970                         compatible = "renesas,r8a7795-drif",
1971                                      "renesas,rcar-gen3-drif";
1972                         reg = <0 0xe6fa0000 0 0x64>;
1973                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
1974                         clocks = <&cpg CPG_MOD 509>;
1975                         clock-names = "fck";
1976                         dmas = <&dmac1 0x2c>, <&dmac2 0x2c>;
1977                         dma-names = "rx", "rx";
1978                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1979                         resets = <&cpg 509>;
1980                         renesas,bonding = <&drif31>;
1981                         status = "disabled";
1982                 };
1983
1984                 drif31: rif@e6fb0000 {
1985                         compatible = "renesas,r8a7795-drif",
1986                                      "renesas,rcar-gen3-drif";
1987                         reg = <0 0xe6fb0000 0 0x64>;
1988                         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
1989                         clocks = <&cpg CPG_MOD 508>;
1990                         clock-names = "fck";
1991                         dmas = <&dmac1 0x2e>, <&dmac2 0x2e>;
1992                         dma-names = "rx", "rx";
1993                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1994                         resets = <&cpg 508>;
1995                         renesas,bonding = <&drif30>;
1996                         status = "disabled";
1997                 };
1998
1999                 rcar_sound: sound@ec500000 {
2000                         /*
2001                          * #sound-dai-cells is required
2002                          *
2003                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
2004                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
2005                          */
2006                         /*
2007                          * #clock-cells is required for audio_clkout0/1/2/3
2008                          *
2009                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
2010                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
2011                          */
2012                         compatible = "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
2013                         reg = <0 0xec500000 0 0x1000>, /* SCU */
2014                               <0 0xec5a0000 0 0x100>,  /* ADG */
2015                               <0 0xec540000 0 0x1000>, /* SSIU */
2016                               <0 0xec541000 0 0x280>,  /* SSI */
2017                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
2018                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
2019
2020                         clocks = <&cpg CPG_MOD 1005>,
2021                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
2022                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
2023                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
2024                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
2025                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
2026                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
2027                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
2028                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
2029                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
2030                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
2031                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
2032                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
2033                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
2034                                  <&audio_clk_a>, <&audio_clk_b>,
2035                                  <&audio_clk_c>,
2036                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
2037                         clock-names = "ssi-all",
2038                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
2039                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
2040                                       "ssi.1", "ssi.0",
2041                                       "src.9", "src.8", "src.7", "src.6",
2042                                       "src.5", "src.4", "src.3", "src.2",
2043                                       "src.1", "src.0",
2044                                       "mix.1", "mix.0",
2045                                       "ctu.1", "ctu.0",
2046                                       "dvc.0", "dvc.1",
2047                                       "clk_a", "clk_b", "clk_c", "clk_i";
2048                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2049                         resets = <&cpg 1005>,
2050                                  <&cpg 1006>, <&cpg 1007>,
2051                                  <&cpg 1008>, <&cpg 1009>,
2052                                  <&cpg 1010>, <&cpg 1011>,
2053                                  <&cpg 1012>, <&cpg 1013>,
2054                                  <&cpg 1014>, <&cpg 1015>;
2055                         reset-names = "ssi-all",
2056                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
2057                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
2058                                       "ssi.1", "ssi.0";
2059                         status = "disabled";
2060
2061                         rcar_sound,dvc {
2062                                 dvc0: dvc-0 {
2063                                         dmas = <&audma1 0xbc>;
2064                                         dma-names = "tx";
2065                                 };
2066                                 dvc1: dvc-1 {
2067                                         dmas = <&audma1 0xbe>;
2068                                         dma-names = "tx";
2069                                 };
2070                         };
2071
2072                         rcar_sound,mix {
2073                                 mix0: mix-0 { };
2074                                 mix1: mix-1 { };
2075                         };
2076
2077                         rcar_sound,ctu {
2078                                 ctu00: ctu-0 { };
2079                                 ctu01: ctu-1 { };
2080                                 ctu02: ctu-2 { };
2081                                 ctu03: ctu-3 { };
2082                                 ctu10: ctu-4 { };
2083                                 ctu11: ctu-5 { };
2084                                 ctu12: ctu-6 { };
2085                                 ctu13: ctu-7 { };
2086                         };
2087
2088                         rcar_sound,src {
2089                                 src0: src-0 {
2090                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
2091                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
2092                                         dma-names = "rx", "tx";
2093                                 };
2094                                 src1: src-1 {
2095                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
2096                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
2097                                         dma-names = "rx", "tx";
2098                                 };
2099                                 src2: src-2 {
2100                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
2101                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
2102                                         dma-names = "rx", "tx";
2103                                 };
2104                                 src3: src-3 {
2105                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
2106                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
2107                                         dma-names = "rx", "tx";
2108                                 };
2109                                 src4: src-4 {
2110                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
2111                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
2112                                         dma-names = "rx", "tx";
2113                                 };
2114                                 src5: src-5 {
2115                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
2116                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
2117                                         dma-names = "rx", "tx";
2118                                 };
2119                                 src6: src-6 {
2120                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
2121                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
2122                                         dma-names = "rx", "tx";
2123                                 };
2124                                 src7: src-7 {
2125                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
2126                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
2127                                         dma-names = "rx", "tx";
2128                                 };
2129                                 src8: src-8 {
2130                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
2131                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
2132                                         dma-names = "rx", "tx";
2133                                 };
2134                                 src9: src-9 {
2135                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
2136                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
2137                                         dma-names = "rx", "tx";
2138                                 };
2139                         };
2140
2141                         rcar_sound,ssiu {
2142                                 ssiu00: ssiu-0 {
2143                                         dmas = <&audma0 0x15>, <&audma1 0x16>;
2144                                         dma-names = "rx", "tx";
2145                                 };
2146                                 ssiu01: ssiu-1 {
2147                                         dmas = <&audma0 0x35>, <&audma1 0x36>;
2148                                         dma-names = "rx", "tx";
2149                                 };
2150                                 ssiu02: ssiu-2 {
2151                                         dmas = <&audma0 0x37>, <&audma1 0x38>;
2152                                         dma-names = "rx", "tx";
2153                                 };
2154                                 ssiu03: ssiu-3 {
2155                                         dmas = <&audma0 0x47>, <&audma1 0x48>;
2156                                         dma-names = "rx", "tx";
2157                                 };
2158                                 ssiu04: ssiu-4 {
2159                                         dmas = <&audma0 0x3F>, <&audma1 0x40>;
2160                                         dma-names = "rx", "tx";
2161                                 };
2162                                 ssiu05: ssiu-5 {
2163                                         dmas = <&audma0 0x43>, <&audma1 0x44>;
2164                                         dma-names = "rx", "tx";
2165                                 };
2166                                 ssiu06: ssiu-6 {
2167                                         dmas = <&audma0 0x4F>, <&audma1 0x50>;
2168                                         dma-names = "rx", "tx";
2169                                 };
2170                                 ssiu07: ssiu-7 {
2171                                         dmas = <&audma0 0x53>, <&audma1 0x54>;
2172                                         dma-names = "rx", "tx";
2173                                 };
2174                                 ssiu10: ssiu-8 {
2175                                         dmas = <&audma0 0x49>, <&audma1 0x4a>;
2176                                         dma-names = "rx", "tx";
2177                                 };
2178                                 ssiu11: ssiu-9 {
2179                                         dmas = <&audma0 0x4B>, <&audma1 0x4C>;
2180                                         dma-names = "rx", "tx";
2181                                 };
2182                                 ssiu12: ssiu-10 {
2183                                         dmas = <&audma0 0x57>, <&audma1 0x58>;
2184                                         dma-names = "rx", "tx";
2185                                 };
2186                                 ssiu13: ssiu-11 {
2187                                         dmas = <&audma0 0x59>, <&audma1 0x5A>;
2188                                         dma-names = "rx", "tx";
2189                                 };
2190                                 ssiu14: ssiu-12 {
2191                                         dmas = <&audma0 0x5F>, <&audma1 0x60>;
2192                                         dma-names = "rx", "tx";
2193                                 };
2194                                 ssiu15: ssiu-13 {
2195                                         dmas = <&audma0 0xC3>, <&audma1 0xC4>;
2196                                         dma-names = "rx", "tx";
2197                                 };
2198                                 ssiu16: ssiu-14 {
2199                                         dmas = <&audma0 0xC7>, <&audma1 0xC8>;
2200                                         dma-names = "rx", "tx";
2201                                 };
2202                                 ssiu17: ssiu-15 {
2203                                         dmas = <&audma0 0xCB>, <&audma1 0xCC>;
2204                                         dma-names = "rx", "tx";
2205                                 };
2206                                 ssiu20: ssiu-16 {
2207                                         dmas = <&audma0 0x63>, <&audma1 0x64>;
2208                                         dma-names = "rx", "tx";
2209                                 };
2210                                 ssiu21: ssiu-17 {
2211                                         dmas = <&audma0 0x67>, <&audma1 0x68>;
2212                                         dma-names = "rx", "tx";
2213                                 };
2214                                 ssiu22: ssiu-18 {
2215                                         dmas = <&audma0 0x6B>, <&audma1 0x6C>;
2216                                         dma-names = "rx", "tx";
2217                                 };
2218                                 ssiu23: ssiu-19 {
2219                                         dmas = <&audma0 0x6D>, <&audma1 0x6E>;
2220                                         dma-names = "rx", "tx";
2221                                 };
2222                                 ssiu24: ssiu-20 {
2223                                         dmas = <&audma0 0xCF>, <&audma1 0xCE>;
2224                                         dma-names = "rx", "tx";
2225                                 };
2226                                 ssiu25: ssiu-21 {
2227                                         dmas = <&audma0 0xEB>, <&audma1 0xEC>;
2228                                         dma-names = "rx", "tx";
2229                                 };
2230                                 ssiu26: ssiu-22 {
2231                                         dmas = <&audma0 0xED>, <&audma1 0xEE>;
2232                                         dma-names = "rx", "tx";
2233                                 };
2234                                 ssiu27: ssiu-23 {
2235                                         dmas = <&audma0 0xEF>, <&audma1 0xF0>;
2236                                         dma-names = "rx", "tx";
2237                                 };
2238                                 ssiu30: ssiu-24 {
2239                                         dmas = <&audma0 0x6f>, <&audma1 0x70>;
2240                                         dma-names = "rx", "tx";
2241                                 };
2242                                 ssiu31: ssiu-25 {
2243                                         dmas = <&audma0 0x21>, <&audma1 0x22>;
2244                                         dma-names = "rx", "tx";
2245                                 };
2246                                 ssiu32: ssiu-26 {
2247                                         dmas = <&audma0 0x23>, <&audma1 0x24>;
2248                                         dma-names = "rx", "tx";
2249                                 };
2250                                 ssiu33: ssiu-27 {
2251                                         dmas = <&audma0 0x25>, <&audma1 0x26>;
2252                                         dma-names = "rx", "tx";
2253                                 };
2254                                 ssiu34: ssiu-28 {
2255                                         dmas = <&audma0 0x27>, <&audma1 0x28>;
2256                                         dma-names = "rx", "tx";
2257                                 };
2258                                 ssiu35: ssiu-29 {
2259                                         dmas = <&audma0 0x29>, <&audma1 0x2A>;
2260                                         dma-names = "rx", "tx";
2261                                 };
2262                                 ssiu36: ssiu-30 {
2263                                         dmas = <&audma0 0x2B>, <&audma1 0x2C>;
2264                                         dma-names = "rx", "tx";
2265                                 };
2266                                 ssiu37: ssiu-31 {
2267                                         dmas = <&audma0 0x2D>, <&audma1 0x2E>;
2268                                         dma-names = "rx", "tx";
2269                                 };
2270                                 ssiu40: ssiu-32 {
2271                                         dmas = <&audma0 0x71>, <&audma1 0x72>;
2272                                         dma-names = "rx", "tx";
2273                                 };
2274                                 ssiu41: ssiu-33 {
2275                                         dmas = <&audma0 0x17>, <&audma1 0x18>;
2276                                         dma-names = "rx", "tx";
2277                                 };
2278                                 ssiu42: ssiu-34 {
2279                                         dmas = <&audma0 0x19>, <&audma1 0x1A>;
2280                                         dma-names = "rx", "tx";
2281                                 };
2282                                 ssiu43: ssiu-35 {
2283                                         dmas = <&audma0 0x1B>, <&audma1 0x1C>;
2284                                         dma-names = "rx", "tx";
2285                                 };
2286                                 ssiu44: ssiu-36 {
2287                                         dmas = <&audma0 0x1D>, <&audma1 0x1E>;
2288                                         dma-names = "rx", "tx";
2289                                 };
2290                                 ssiu45: ssiu-37 {
2291                                         dmas = <&audma0 0x1F>, <&audma1 0x20>;
2292                                         dma-names = "rx", "tx";
2293                                 };
2294                                 ssiu46: ssiu-38 {
2295                                         dmas = <&audma0 0x31>, <&audma1 0x32>;
2296                                         dma-names = "rx", "tx";
2297                                 };
2298                                 ssiu47: ssiu-39 {
2299                                         dmas = <&audma0 0x33>, <&audma1 0x34>;
2300                                         dma-names = "rx", "tx";
2301                                 };
2302                                 ssiu50: ssiu-40 {
2303                                         dmas = <&audma0 0x73>, <&audma1 0x74>;
2304                                         dma-names = "rx", "tx";
2305                                 };
2306                                 ssiu60: ssiu-41 {
2307                                         dmas = <&audma0 0x75>, <&audma1 0x76>;
2308                                         dma-names = "rx", "tx";
2309                                 };
2310                                 ssiu70: ssiu-42 {
2311                                         dmas = <&audma0 0x79>, <&audma1 0x7a>;
2312                                         dma-names = "rx", "tx";
2313                                 };
2314                                 ssiu80: ssiu-43 {
2315                                         dmas = <&audma0 0x7b>, <&audma1 0x7c>;
2316                                         dma-names = "rx", "tx";
2317                                 };
2318                                 ssiu90: ssiu-44 {
2319                                         dmas = <&audma0 0x7d>, <&audma1 0x7e>;
2320                                         dma-names = "rx", "tx";
2321                                 };
2322                                 ssiu91: ssiu-45 {
2323                                         dmas = <&audma0 0x7F>, <&audma1 0x80>;
2324                                         dma-names = "rx", "tx";
2325                                 };
2326                                 ssiu92: ssiu-46 {
2327                                         dmas = <&audma0 0x81>, <&audma1 0x82>;
2328                                         dma-names = "rx", "tx";
2329                                 };
2330                                 ssiu93: ssiu-47 {
2331                                         dmas = <&audma0 0x83>, <&audma1 0x84>;
2332                                         dma-names = "rx", "tx";
2333                                 };
2334                                 ssiu94: ssiu-48 {
2335                                         dmas = <&audma0 0xA3>, <&audma1 0xA4>;
2336                                         dma-names = "rx", "tx";
2337                                 };
2338                                 ssiu95: ssiu-49 {
2339                                         dmas = <&audma0 0xA5>, <&audma1 0xA6>;
2340                                         dma-names = "rx", "tx";
2341                                 };
2342                                 ssiu96: ssiu-50 {
2343                                         dmas = <&audma0 0xA7>, <&audma1 0xA8>;
2344                                         dma-names = "rx", "tx";
2345                                 };
2346                                 ssiu97: ssiu-51 {
2347                                         dmas = <&audma0 0xA9>, <&audma1 0xAA>;
2348                                         dma-names = "rx", "tx";
2349                                 };
2350                         };
2351
2352                         rcar_sound,ssi {
2353                                 ssi0: ssi-0 {
2354                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
2355                                         dmas = <&audma0 0x01>, <&audma1 0x02>;
2356                                         dma-names = "rx", "tx";
2357                                 };
2358                                 ssi1: ssi-1 {
2359                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
2360                                         dmas = <&audma0 0x03>, <&audma1 0x04>;
2361                                         dma-names = "rx", "tx";
2362                                 };
2363                                 ssi2: ssi-2 {
2364                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
2365                                         dmas = <&audma0 0x05>, <&audma1 0x06>;
2366                                         dma-names = "rx", "tx";
2367                                 };
2368                                 ssi3: ssi-3 {
2369                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
2370                                         dmas = <&audma0 0x07>, <&audma1 0x08>;
2371                                         dma-names = "rx", "tx";
2372                                 };
2373                                 ssi4: ssi-4 {
2374                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
2375                                         dmas = <&audma0 0x09>, <&audma1 0x0a>;
2376                                         dma-names = "rx", "tx";
2377                                 };
2378                                 ssi5: ssi-5 {
2379                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
2380                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>;
2381                                         dma-names = "rx", "tx";
2382                                 };
2383                                 ssi6: ssi-6 {
2384                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
2385                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>;
2386                                         dma-names = "rx", "tx";
2387                                 };
2388                                 ssi7: ssi-7 {
2389                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
2390                                         dmas = <&audma0 0x0f>, <&audma1 0x10>;
2391                                         dma-names = "rx", "tx";
2392                                 };
2393                                 ssi8: ssi-8 {
2394                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
2395                                         dmas = <&audma0 0x11>, <&audma1 0x12>;
2396                                         dma-names = "rx", "tx";
2397                                 };
2398                                 ssi9: ssi-9 {
2399                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
2400                                         dmas = <&audma0 0x13>, <&audma1 0x14>;
2401                                         dma-names = "rx", "tx";
2402                                 };
2403                         };
2404                 };
2405
2406                 mlp: mlp@ec520000 {
2407                         compatible = "renesas,r8a7795-mlp",
2408                                      "renesas,rcar-gen3-mlp";
2409                         reg = <0 0xec520000 0 0x800>;
2410                         interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>,
2411                                 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>;
2412                         clocks = <&cpg CPG_MOD 802>;
2413                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2414                         resets = <&cpg 802>;
2415                         status = "disabled";
2416                 };
2417
2418                 audma0: dma-controller@ec700000 {
2419                         compatible = "renesas,dmac-r8a7795",
2420                                      "renesas,rcar-dmac";
2421                         reg = <0 0xec700000 0 0x10000>;
2422                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
2423                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
2424                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
2425                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
2426                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
2427                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
2428                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
2429                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
2430                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
2431                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
2432                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
2433                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
2434                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
2435                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
2436                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
2437                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
2438                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
2439                         interrupt-names = "error",
2440                                         "ch0", "ch1", "ch2", "ch3",
2441                                         "ch4", "ch5", "ch6", "ch7",
2442                                         "ch8", "ch9", "ch10", "ch11",
2443                                         "ch12", "ch13", "ch14", "ch15";
2444                         clocks = <&cpg CPG_MOD 502>;
2445                         clock-names = "fck";
2446                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2447                         resets = <&cpg 502>;
2448                         #dma-cells = <1>;
2449                         dma-channels = <16>;
2450                         iommus = <&ipmmu_mp0 0>, <&ipmmu_mp0 1>,
2451                                <&ipmmu_mp0 2>, <&ipmmu_mp0 3>,
2452                                <&ipmmu_mp0 4>, <&ipmmu_mp0 5>,
2453                                <&ipmmu_mp0 6>, <&ipmmu_mp0 7>,
2454                                <&ipmmu_mp0 8>, <&ipmmu_mp0 9>,
2455                                <&ipmmu_mp0 10>, <&ipmmu_mp0 11>,
2456                                <&ipmmu_mp0 12>, <&ipmmu_mp0 13>,
2457                                <&ipmmu_mp0 14>, <&ipmmu_mp0 15>;
2458                 };
2459
2460                 audma1: dma-controller@ec720000 {
2461                         compatible = "renesas,dmac-r8a7795",
2462                                      "renesas,rcar-dmac";
2463                         reg = <0 0xec720000 0 0x10000>;
2464                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,
2465                                      <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
2466                                      <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>,
2467                                      <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>,
2468                                      <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
2469                                      <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
2470                                      <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>,
2471                                      <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>,
2472                                      <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>,
2473                                      <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>,
2474                                      <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>,
2475                                      <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>,
2476                                      <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>,
2477                                      <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
2478                                      <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>,
2479                                      <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>,
2480                                      <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
2481                         interrupt-names = "error",
2482                                         "ch0", "ch1", "ch2", "ch3",
2483                                         "ch4", "ch5", "ch6", "ch7",
2484                                         "ch8", "ch9", "ch10", "ch11",
2485                                         "ch12", "ch13", "ch14", "ch15";
2486                         clocks = <&cpg CPG_MOD 501>;
2487                         clock-names = "fck";
2488                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2489                         resets = <&cpg 501>;
2490                         #dma-cells = <1>;
2491                         dma-channels = <16>;
2492                         iommus = <&ipmmu_mp0 16>, <&ipmmu_mp0 17>,
2493                                <&ipmmu_mp0 18>, <&ipmmu_mp0 19>,
2494                                <&ipmmu_mp0 20>, <&ipmmu_mp0 21>,
2495                                <&ipmmu_mp0 22>, <&ipmmu_mp0 23>,
2496                                <&ipmmu_mp0 24>, <&ipmmu_mp0 25>,
2497                                <&ipmmu_mp0 26>, <&ipmmu_mp0 27>,
2498                                <&ipmmu_mp0 28>, <&ipmmu_mp0 29>,
2499                                <&ipmmu_mp0 30>, <&ipmmu_mp0 31>;
2500                 };
2501
2502                 xhci0: usb@ee000000 {
2503                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
2504                         reg = <0 0xee000000 0 0xc00>;
2505                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
2506                         clocks = <&cpg CPG_MOD 328>;
2507                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2508                         resets = <&cpg 328>;
2509                         status = "disabled";
2510                 };
2511
2512                 usb3_peri0: usb@ee020000 {
2513                         compatible = "renesas,r8a7795-usb3-peri",
2514                                      "renesas,rcar-gen3-usb3-peri";
2515                         reg = <0 0xee020000 0 0x400>;
2516                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
2517                         clocks = <&cpg CPG_MOD 328>;
2518                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2519                         resets = <&cpg 328>;
2520                         status = "disabled";
2521                 };
2522
2523                 ohci0: usb@ee080000 {
2524                         compatible = "generic-ohci";
2525                         reg = <0 0xee080000 0 0x100>;
2526                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2527                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2528                         phys = <&usb2_phy0 1>;
2529                         phy-names = "usb";
2530                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2531                         resets = <&cpg 703>, <&cpg 704>;
2532                         status = "disabled";
2533                 };
2534
2535                 ohci1: usb@ee0a0000 {
2536                         compatible = "generic-ohci";
2537                         reg = <0 0xee0a0000 0 0x100>;
2538                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2539                         clocks = <&cpg CPG_MOD 702>;
2540                         phys = <&usb2_phy1 1>;
2541                         phy-names = "usb";
2542                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2543                         resets = <&cpg 702>;
2544                         status = "disabled";
2545                 };
2546
2547                 ohci2: usb@ee0c0000 {
2548                         compatible = "generic-ohci";
2549                         reg = <0 0xee0c0000 0 0x100>;
2550                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2551                         clocks = <&cpg CPG_MOD 701>;
2552                         phys = <&usb2_phy2 1>;
2553                         phy-names = "usb";
2554                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2555                         resets = <&cpg 701>;
2556                         status = "disabled";
2557                 };
2558
2559                 ohci3: usb@ee0e0000 {
2560                         compatible = "generic-ohci";
2561                         reg = <0 0xee0e0000 0 0x100>;
2562                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2563                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2564                         phys = <&usb2_phy3 1>;
2565                         phy-names = "usb";
2566                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2567                         resets = <&cpg 700>, <&cpg 705>;
2568                         status = "disabled";
2569                 };
2570
2571                 ehci0: usb@ee080100 {
2572                         compatible = "generic-ehci";
2573                         reg = <0 0xee080100 0 0x100>;
2574                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2575                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2576                         phys = <&usb2_phy0 2>;
2577                         phy-names = "usb";
2578                         companion = <&ohci0>;
2579                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2580                         resets = <&cpg 703>, <&cpg 704>;
2581                         status = "disabled";
2582                 };
2583
2584                 ehci1: usb@ee0a0100 {
2585                         compatible = "generic-ehci";
2586                         reg = <0 0xee0a0100 0 0x100>;
2587                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
2588                         clocks = <&cpg CPG_MOD 702>;
2589                         phys = <&usb2_phy1 2>;
2590                         phy-names = "usb";
2591                         companion = <&ohci1>;
2592                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2593                         resets = <&cpg 702>;
2594                         status = "disabled";
2595                 };
2596
2597                 ehci2: usb@ee0c0100 {
2598                         compatible = "generic-ehci";
2599                         reg = <0 0xee0c0100 0 0x100>;
2600                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
2601                         clocks = <&cpg CPG_MOD 701>;
2602                         phys = <&usb2_phy2 2>;
2603                         phy-names = "usb";
2604                         companion = <&ohci2>;
2605                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2606                         resets = <&cpg 701>;
2607                         status = "disabled";
2608                 };
2609
2610                 ehci3: usb@ee0e0100 {
2611                         compatible = "generic-ehci";
2612                         reg = <0 0xee0e0100 0 0x100>;
2613                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2614                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2615                         phys = <&usb2_phy3 2>;
2616                         phy-names = "usb";
2617                         companion = <&ohci3>;
2618                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2619                         resets = <&cpg 700>, <&cpg 705>;
2620                         status = "disabled";
2621                 };
2622
2623                 usb2_phy0: usb-phy@ee080200 {
2624                         compatible = "renesas,usb2-phy-r8a7795",
2625                                      "renesas,rcar-gen3-usb2-phy";
2626                         reg = <0 0xee080200 0 0x700>;
2627                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
2628                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2629                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2630                         resets = <&cpg 703>, <&cpg 704>;
2631                         #phy-cells = <1>;
2632                         status = "disabled";
2633                 };
2634
2635                 usb2_phy1: usb-phy@ee0a0200 {
2636                         compatible = "renesas,usb2-phy-r8a7795",
2637                                      "renesas,rcar-gen3-usb2-phy";
2638                         reg = <0 0xee0a0200 0 0x700>;
2639                         clocks = <&cpg CPG_MOD 702>;
2640                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2641                         resets = <&cpg 702>;
2642                         #phy-cells = <1>;
2643                         status = "disabled";
2644                 };
2645
2646                 usb2_phy2: usb-phy@ee0c0200 {
2647                         compatible = "renesas,usb2-phy-r8a7795",
2648                                      "renesas,rcar-gen3-usb2-phy";
2649                         reg = <0 0xee0c0200 0 0x700>;
2650                         clocks = <&cpg CPG_MOD 701>;
2651                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2652                         resets = <&cpg 701>;
2653                         #phy-cells = <1>;
2654                         status = "disabled";
2655                 };
2656
2657                 usb2_phy3: usb-phy@ee0e0200 {
2658                         compatible = "renesas,usb2-phy-r8a7795",
2659                                      "renesas,rcar-gen3-usb2-phy";
2660                         reg = <0 0xee0e0200 0 0x700>;
2661                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
2662                         clocks = <&cpg CPG_MOD 700>, <&cpg CPG_MOD 705>;
2663                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2664                         resets = <&cpg 700>, <&cpg 705>;
2665                         #phy-cells = <1>;
2666                         status = "disabled";
2667                 };
2668
2669                 sdhi0: mmc@ee100000 {
2670                         compatible = "renesas,sdhi-r8a7795",
2671                                      "renesas,rcar-gen3-sdhi";
2672                         reg = <0 0xee100000 0 0x2000>;
2673                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
2674                         clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7795_CLK_SD0H>;
2675                         clock-names = "core", "clkh";
2676                         max-frequency = <200000000>;
2677                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2678                         resets = <&cpg 314>;
2679                         iommus = <&ipmmu_ds1 32>;
2680                         status = "disabled";
2681                 };
2682
2683                 sdhi1: mmc@ee120000 {
2684                         compatible = "renesas,sdhi-r8a7795",
2685                                      "renesas,rcar-gen3-sdhi";
2686                         reg = <0 0xee120000 0 0x2000>;
2687                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
2688                         clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7795_CLK_SD1H>;
2689                         clock-names = "core", "clkh";
2690                         max-frequency = <200000000>;
2691                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2692                         resets = <&cpg 313>;
2693                         iommus = <&ipmmu_ds1 33>;
2694                         status = "disabled";
2695                 };
2696
2697                 sdhi2: mmc@ee140000 {
2698                         compatible = "renesas,sdhi-r8a7795",
2699                                      "renesas,rcar-gen3-sdhi";
2700                         reg = <0 0xee140000 0 0x2000>;
2701                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
2702                         clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7795_CLK_SD2H>;
2703                         clock-names = "core", "clkh";
2704                         max-frequency = <200000000>;
2705                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2706                         resets = <&cpg 312>;
2707                         iommus = <&ipmmu_ds1 34>;
2708                         status = "disabled";
2709                 };
2710
2711                 sdhi3: mmc@ee160000 {
2712                         compatible = "renesas,sdhi-r8a7795",
2713                                      "renesas,rcar-gen3-sdhi";
2714                         reg = <0 0xee160000 0 0x2000>;
2715                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
2716                         clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7795_CLK_SD3H>;
2717                         clock-names = "core", "clkh";
2718                         max-frequency = <200000000>;
2719                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2720                         resets = <&cpg 311>;
2721                         iommus = <&ipmmu_ds1 35>;
2722                         status = "disabled";
2723                 };
2724
2725                 rpc: spi@ee200000 {
2726                         compatible = "renesas,r8a7795-rpc-if",
2727                                      "renesas,rcar-gen3-rpc-if";
2728                         reg = <0 0xee200000 0 0x200>,
2729                               <0 0x08000000 0 0x04000000>,
2730                               <0 0xee208000 0 0x100>;
2731                         reg-names = "regs", "dirmap", "wbuf";
2732                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
2733                         clocks = <&cpg CPG_MOD 917>;
2734                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2735                         resets = <&cpg 917>;
2736                         #address-cells = <1>;
2737                         #size-cells = <0>;
2738                         status = "disabled";
2739                 };
2740
2741                 sata: sata@ee300000 {
2742                         compatible = "renesas,sata-r8a7795",
2743                                      "renesas,rcar-gen3-sata";
2744                         reg = <0 0xee300000 0 0x200000>;
2745                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
2746                         clocks = <&cpg CPG_MOD 815>;
2747                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2748                         resets = <&cpg 815>;
2749                         status = "disabled";
2750                         iommus = <&ipmmu_hc 2>;
2751                 };
2752
2753                 gic: interrupt-controller@f1010000 {
2754                         compatible = "arm,gic-400";
2755                         #interrupt-cells = <3>;
2756                         #address-cells = <0>;
2757                         interrupt-controller;
2758                         reg = <0x0 0xf1010000 0 0x1000>,
2759                               <0x0 0xf1020000 0 0x20000>,
2760                               <0x0 0xf1040000 0 0x20000>,
2761                               <0x0 0xf1060000 0 0x20000>;
2762                         interrupts = <GIC_PPI 9
2763                                         (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
2764                         clocks = <&cpg CPG_MOD 408>;
2765                         clock-names = "clk";
2766                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2767                         resets = <&cpg 408>;
2768                 };
2769
2770                 pciec0: pcie@fe000000 {
2771                         compatible = "renesas,pcie-r8a7795",
2772                                      "renesas,pcie-rcar-gen3";
2773                         reg = <0 0xfe000000 0 0x80000>;
2774                         #address-cells = <3>;
2775                         #size-cells = <2>;
2776                         bus-range = <0x00 0xff>;
2777                         device_type = "pci";
2778                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
2779                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
2780                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
2781                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
2782                         /* Map all possible DDR as inbound ranges */
2783                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2784                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2785                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2786                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2787                         #interrupt-cells = <1>;
2788                         interrupt-map-mask = <0 0 0 0>;
2789                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
2790                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2791                         clock-names = "pcie", "pcie_bus";
2792                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2793                         resets = <&cpg 319>;
2794                         status = "disabled";
2795                 };
2796
2797                 pciec1: pcie@ee800000 {
2798                         compatible = "renesas,pcie-r8a7795",
2799                                      "renesas,pcie-rcar-gen3";
2800                         reg = <0 0xee800000 0 0x80000>;
2801                         #address-cells = <3>;
2802                         #size-cells = <2>;
2803                         bus-range = <0x00 0xff>;
2804                         device_type = "pci";
2805                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>,
2806                                  <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>,
2807                                  <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>,
2808                                  <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
2809                         /* Map all possible DDR as inbound ranges */
2810                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
2811                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2812                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2813                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2814                         #interrupt-cells = <1>;
2815                         interrupt-map-mask = <0 0 0 0>;
2816                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
2817                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2818                         clock-names = "pcie", "pcie_bus";
2819                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2820                         resets = <&cpg 318>;
2821                         status = "disabled";
2822                 };
2823
2824                 pciec0_ep: pcie-ep@fe000000 {
2825                         compatible = "renesas,r8a7795-pcie-ep",
2826                                      "renesas,rcar-gen3-pcie-ep";
2827                         reg = <0x0 0xfe000000 0 0x80000>,
2828                               <0x0 0xfe100000 0 0x100000>,
2829                               <0x0 0xfe200000 0 0x200000>,
2830                               <0x0 0x30000000 0 0x8000000>,
2831                               <0x0 0x38000000 0 0x8000000>;
2832                         reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2833                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
2834                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
2835                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
2836                         clocks = <&cpg CPG_MOD 319>;
2837                         clock-names = "pcie";
2838                         resets = <&cpg 319>;
2839                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2840                         status = "disabled";
2841                 };
2842
2843                 pciec1_ep: pcie-ep@ee800000 {
2844                         compatible = "renesas,r8a7795-pcie-ep",
2845                                      "renesas,rcar-gen3-pcie-ep";
2846                         reg = <0x0 0xee800000 0 0x80000>,
2847                               <0x0 0xee900000 0 0x100000>,
2848                               <0x0 0xeea00000 0 0x200000>,
2849                               <0x0 0xc0000000 0 0x8000000>,
2850                               <0x0 0xc8000000 0 0x8000000>;
2851                         reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
2852                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
2853                                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
2854                                      <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
2855                         clocks = <&cpg CPG_MOD 318>;
2856                         clock-names = "pcie";
2857                         resets = <&cpg 318>;
2858                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2859                         status = "disabled";
2860                 };
2861
2862                 imr-lx4@fe860000 {
2863                         compatible = "renesas,r8a7795-imr-lx4",
2864                                      "renesas,imr-lx4";
2865                         reg = <0 0xfe860000 0 0x2000>;
2866                         interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
2867                         clocks = <&cpg CPG_MOD 823>;
2868                         power-domains = <&sysc R8A7795_PD_A3VC>;
2869                         resets = <&cpg 823>;
2870                 };
2871
2872                 imr-lx4@fe870000 {
2873                         compatible = "renesas,r8a7795-imr-lx4",
2874                                      "renesas,imr-lx4";
2875                         reg = <0 0xfe870000 0 0x2000>;
2876                         interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
2877                         clocks = <&cpg CPG_MOD 822>;
2878                         power-domains = <&sysc R8A7795_PD_A3VC>;
2879                         resets = <&cpg 822>;
2880                 };
2881
2882                 imr-lx4@fe880000 {
2883                         compatible = "renesas,r8a7795-imr-lx4",
2884                                      "renesas,imr-lx4";
2885                         reg = <0 0xfe880000 0 0x2000>;
2886                         interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
2887                         clocks = <&cpg CPG_MOD 821>;
2888                         power-domains = <&sysc R8A7795_PD_A3VC>;
2889                         resets = <&cpg 821>;
2890                 };
2891
2892                 imr-lx4@fe890000 {
2893                         compatible = "renesas,r8a7795-imr-lx4",
2894                                      "renesas,imr-lx4";
2895                         reg = <0 0xfe890000 0 0x2000>;
2896                         interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
2897                         clocks = <&cpg CPG_MOD 820>;
2898                         power-domains = <&sysc R8A7795_PD_A3VC>;
2899                         resets = <&cpg 820>;
2900                 };
2901
2902                 vspbc: vsp@fe920000 {
2903                         compatible = "renesas,vsp2";
2904                         reg = <0 0xfe920000 0 0x8000>;
2905                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
2906                         clocks = <&cpg CPG_MOD 624>;
2907                         power-domains = <&sysc R8A7795_PD_A3VP>;
2908                         resets = <&cpg 624>;
2909
2910                         renesas,fcp = <&fcpvb1>;
2911                 };
2912
2913                 vspbd: vsp@fe960000 {
2914                         compatible = "renesas,vsp2";
2915                         reg = <0 0xfe960000 0 0x8000>;
2916                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
2917                         clocks = <&cpg CPG_MOD 626>;
2918                         power-domains = <&sysc R8A7795_PD_A3VP>;
2919                         resets = <&cpg 626>;
2920
2921                         renesas,fcp = <&fcpvb0>;
2922                 };
2923
2924                 vspd0: vsp@fea20000 {
2925                         compatible = "renesas,vsp2";
2926                         reg = <0 0xfea20000 0 0x5000>;
2927                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
2928                         clocks = <&cpg CPG_MOD 623>;
2929                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2930                         resets = <&cpg 623>;
2931
2932                         renesas,fcp = <&fcpvd0>;
2933                 };
2934
2935                 vspd1: vsp@fea28000 {
2936                         compatible = "renesas,vsp2";
2937                         reg = <0 0xfea28000 0 0x5000>;
2938                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
2939                         clocks = <&cpg CPG_MOD 622>;
2940                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2941                         resets = <&cpg 622>;
2942
2943                         renesas,fcp = <&fcpvd1>;
2944                 };
2945
2946                 vspd2: vsp@fea30000 {
2947                         compatible = "renesas,vsp2";
2948                         reg = <0 0xfea30000 0 0x5000>;
2949                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
2950                         clocks = <&cpg CPG_MOD 621>;
2951                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
2952                         resets = <&cpg 621>;
2953
2954                         renesas,fcp = <&fcpvd2>;
2955                 };
2956
2957                 vspi0: vsp@fe9a0000 {
2958                         compatible = "renesas,vsp2";
2959                         reg = <0 0xfe9a0000 0 0x8000>;
2960                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
2961                         clocks = <&cpg CPG_MOD 631>;
2962                         power-domains = <&sysc R8A7795_PD_A3VP>;
2963                         resets = <&cpg 631>;
2964
2965                         renesas,fcp = <&fcpvi0>;
2966                 };
2967
2968                 vspi1: vsp@fe9b0000 {
2969                         compatible = "renesas,vsp2";
2970                         reg = <0 0xfe9b0000 0 0x8000>;
2971                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
2972                         clocks = <&cpg CPG_MOD 630>;
2973                         power-domains = <&sysc R8A7795_PD_A3VP>;
2974                         resets = <&cpg 630>;
2975
2976                         renesas,fcp = <&fcpvi1>;
2977                 };
2978
2979                 fdp1@fe940000 {
2980                         compatible = "renesas,fdp1";
2981                         reg = <0 0xfe940000 0 0x2400>;
2982                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
2983                         clocks = <&cpg CPG_MOD 119>;
2984                         power-domains = <&sysc R8A7795_PD_A3VP>;
2985                         resets = <&cpg 119>;
2986                         renesas,fcp = <&fcpf0>;
2987                 };
2988
2989                 fdp1@fe944000 {
2990                         compatible = "renesas,fdp1";
2991                         reg = <0 0xfe944000 0 0x2400>;
2992                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
2993                         clocks = <&cpg CPG_MOD 118>;
2994                         power-domains = <&sysc R8A7795_PD_A3VP>;
2995                         resets = <&cpg 118>;
2996                         renesas,fcp = <&fcpf1>;
2997                 };
2998
2999                 fcpf0: fcp@fe950000 {
3000                         compatible = "renesas,fcpf";
3001                         reg = <0 0xfe950000 0 0x200>;
3002                         clocks = <&cpg CPG_MOD 615>;
3003                         power-domains = <&sysc R8A7795_PD_A3VP>;
3004                         resets = <&cpg 615>;
3005                         iommus = <&ipmmu_vp0 0>;
3006                 };
3007
3008                 fcpf1: fcp@fe951000 {
3009                         compatible = "renesas,fcpf";
3010                         reg = <0 0xfe951000 0 0x200>;
3011                         clocks = <&cpg CPG_MOD 614>;
3012                         power-domains = <&sysc R8A7795_PD_A3VP>;
3013                         resets = <&cpg 614>;
3014                         iommus = <&ipmmu_vp1 1>;
3015                 };
3016
3017                 fcpvb0: fcp@fe96f000 {
3018                         compatible = "renesas,fcpv";
3019                         reg = <0 0xfe96f000 0 0x200>;
3020                         clocks = <&cpg CPG_MOD 607>;
3021                         power-domains = <&sysc R8A7795_PD_A3VP>;
3022                         resets = <&cpg 607>;
3023                         iommus = <&ipmmu_vp0 5>;
3024                 };
3025
3026                 fcpvb1: fcp@fe92f000 {
3027                         compatible = "renesas,fcpv";
3028                         reg = <0 0xfe92f000 0 0x200>;
3029                         clocks = <&cpg CPG_MOD 606>;
3030                         power-domains = <&sysc R8A7795_PD_A3VP>;
3031                         resets = <&cpg 606>;
3032                         iommus = <&ipmmu_vp1 7>;
3033                 };
3034
3035                 fcpvi0: fcp@fe9af000 {
3036                         compatible = "renesas,fcpv";
3037                         reg = <0 0xfe9af000 0 0x200>;
3038                         clocks = <&cpg CPG_MOD 611>;
3039                         power-domains = <&sysc R8A7795_PD_A3VP>;
3040                         resets = <&cpg 611>;
3041                         iommus = <&ipmmu_vp0 8>;
3042                 };
3043
3044                 fcpvi1: fcp@fe9bf000 {
3045                         compatible = "renesas,fcpv";
3046                         reg = <0 0xfe9bf000 0 0x200>;
3047                         clocks = <&cpg CPG_MOD 610>;
3048                         power-domains = <&sysc R8A7795_PD_A3VP>;
3049                         resets = <&cpg 610>;
3050                         iommus = <&ipmmu_vp1 9>;
3051                 };
3052
3053                 fcpvd0: fcp@fea27000 {
3054                         compatible = "renesas,fcpv";
3055                         reg = <0 0xfea27000 0 0x200>;
3056                         clocks = <&cpg CPG_MOD 603>;
3057                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3058                         resets = <&cpg 603>;
3059                         iommus = <&ipmmu_vi0 8>;
3060                 };
3061
3062                 fcpvd1: fcp@fea2f000 {
3063                         compatible = "renesas,fcpv";
3064                         reg = <0 0xfea2f000 0 0x200>;
3065                         clocks = <&cpg CPG_MOD 602>;
3066                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3067                         resets = <&cpg 602>;
3068                         iommus = <&ipmmu_vi0 9>;
3069                 };
3070
3071                 fcpvd2: fcp@fea37000 {
3072                         compatible = "renesas,fcpv";
3073                         reg = <0 0xfea37000 0 0x200>;
3074                         clocks = <&cpg CPG_MOD 601>;
3075                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3076                         resets = <&cpg 601>;
3077                         iommus = <&ipmmu_vi1 10>;
3078                 };
3079
3080                 cmm0: cmm@fea40000 {
3081                         compatible = "renesas,r8a7795-cmm",
3082                                      "renesas,rcar-gen3-cmm";
3083                         reg = <0 0xfea40000 0 0x1000>;
3084                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3085                         clocks = <&cpg CPG_MOD 711>;
3086                         resets = <&cpg 711>;
3087                 };
3088
3089                 cmm1: cmm@fea50000 {
3090                         compatible = "renesas,r8a7795-cmm",
3091                                      "renesas,rcar-gen3-cmm";
3092                         reg = <0 0xfea50000 0 0x1000>;
3093                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3094                         clocks = <&cpg CPG_MOD 710>;
3095                         resets = <&cpg 710>;
3096                 };
3097
3098                 cmm2: cmm@fea60000 {
3099                         compatible = "renesas,r8a7795-cmm",
3100                                      "renesas,rcar-gen3-cmm";
3101                         reg = <0 0xfea60000 0 0x1000>;
3102                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3103                         clocks = <&cpg CPG_MOD 709>;
3104                         resets = <&cpg 709>;
3105                 };
3106
3107                 cmm3: cmm@fea70000 {
3108                         compatible = "renesas,r8a7795-cmm",
3109                                      "renesas,rcar-gen3-cmm";
3110                         reg = <0 0xfea70000 0 0x1000>;
3111                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3112                         clocks = <&cpg CPG_MOD 708>;
3113                         resets = <&cpg 708>;
3114                 };
3115
3116                 csi20: csi2@fea80000 {
3117                         compatible = "renesas,r8a7795-csi2";
3118                         reg = <0 0xfea80000 0 0x10000>;
3119                         interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
3120                         clocks = <&cpg CPG_MOD 714>;
3121                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3122                         resets = <&cpg 714>;
3123                         status = "disabled";
3124
3125                         ports {
3126                                 #address-cells = <1>;
3127                                 #size-cells = <0>;
3128
3129                                 port@0 {
3130                                         reg = <0>;
3131                                 };
3132
3133                                 port@1 {
3134                                         #address-cells = <1>;
3135                                         #size-cells = <0>;
3136
3137                                         reg = <1>;
3138
3139                                         csi20vin0: endpoint@0 {
3140                                                 reg = <0>;
3141                                                 remote-endpoint = <&vin0csi20>;
3142                                         };
3143                                         csi20vin1: endpoint@1 {
3144                                                 reg = <1>;
3145                                                 remote-endpoint = <&vin1csi20>;
3146                                         };
3147                                         csi20vin2: endpoint@2 {
3148                                                 reg = <2>;
3149                                                 remote-endpoint = <&vin2csi20>;
3150                                         };
3151                                         csi20vin3: endpoint@3 {
3152                                                 reg = <3>;
3153                                                 remote-endpoint = <&vin3csi20>;
3154                                         };
3155                                         csi20vin4: endpoint@4 {
3156                                                 reg = <4>;
3157                                                 remote-endpoint = <&vin4csi20>;
3158                                         };
3159                                         csi20vin5: endpoint@5 {
3160                                                 reg = <5>;
3161                                                 remote-endpoint = <&vin5csi20>;
3162                                         };
3163                                         csi20vin6: endpoint@6 {
3164                                                 reg = <6>;
3165                                                 remote-endpoint = <&vin6csi20>;
3166                                         };
3167                                         csi20vin7: endpoint@7 {
3168                                                 reg = <7>;
3169                                                 remote-endpoint = <&vin7csi20>;
3170                                         };
3171                                 };
3172                         };
3173                 };
3174
3175                 csi40: csi2@feaa0000 {
3176                         compatible = "renesas,r8a7795-csi2";
3177                         reg = <0 0xfeaa0000 0 0x10000>;
3178                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
3179                         clocks = <&cpg CPG_MOD 716>;
3180                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3181                         resets = <&cpg 716>;
3182                         status = "disabled";
3183
3184                         ports {
3185                                 #address-cells = <1>;
3186                                 #size-cells = <0>;
3187
3188                                 port@0 {
3189                                         reg = <0>;
3190                                 };
3191
3192                                 port@1 {
3193                                         #address-cells = <1>;
3194                                         #size-cells = <0>;
3195
3196                                         reg = <1>;
3197
3198                                         csi40vin0: endpoint@0 {
3199                                                 reg = <0>;
3200                                                 remote-endpoint = <&vin0csi40>;
3201                                         };
3202                                         csi40vin1: endpoint@1 {
3203                                                 reg = <1>;
3204                                                 remote-endpoint = <&vin1csi40>;
3205                                         };
3206                                         csi40vin2: endpoint@2 {
3207                                                 reg = <2>;
3208                                                 remote-endpoint = <&vin2csi40>;
3209                                         };
3210                                         csi40vin3: endpoint@3 {
3211                                                 reg = <3>;
3212                                                 remote-endpoint = <&vin3csi40>;
3213                                         };
3214                                 };
3215                         };
3216                 };
3217
3218                 csi41: csi2@feab0000 {
3219                         compatible = "renesas,r8a7795-csi2";
3220                         reg = <0 0xfeab0000 0 0x10000>;
3221                         interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
3222                         clocks = <&cpg CPG_MOD 715>;
3223                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3224                         resets = <&cpg 715>;
3225                         status = "disabled";
3226
3227                         ports {
3228                                 #address-cells = <1>;
3229                                 #size-cells = <0>;
3230
3231                                 port@0 {
3232                                         reg = <0>;
3233                                 };
3234
3235                                 port@1 {
3236                                         #address-cells = <1>;
3237                                         #size-cells = <0>;
3238
3239                                         reg = <1>;
3240
3241                                         csi41vin4: endpoint@0 {
3242                                                 reg = <0>;
3243                                                 remote-endpoint = <&vin4csi41>;
3244                                         };
3245                                         csi41vin5: endpoint@1 {
3246                                                 reg = <1>;
3247                                                 remote-endpoint = <&vin5csi41>;
3248                                         };
3249                                         csi41vin6: endpoint@2 {
3250                                                 reg = <2>;
3251                                                 remote-endpoint = <&vin6csi41>;
3252                                         };
3253                                         csi41vin7: endpoint@3 {
3254                                                 reg = <3>;
3255                                                 remote-endpoint = <&vin7csi41>;
3256                                         };
3257                                 };
3258                         };
3259                 };
3260
3261                 hdmi0: hdmi@fead0000 {
3262                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3263                         reg = <0 0xfead0000 0 0x10000>;
3264                         interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>;
3265                         clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3266                         clock-names = "iahb", "isfr";
3267                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3268                         resets = <&cpg 729>;
3269                         status = "disabled";
3270
3271                         ports {
3272                                 #address-cells = <1>;
3273                                 #size-cells = <0>;
3274                                 port@0 {
3275                                         reg = <0>;
3276                                         dw_hdmi0_in: endpoint {
3277                                                 remote-endpoint = <&du_out_hdmi0>;
3278                                         };
3279                                 };
3280                                 port@1 {
3281                                         reg = <1>;
3282                                 };
3283                                 port@2 {
3284                                         /* HDMI sound */
3285                                         reg = <2>;
3286                                 };
3287                         };
3288                 };
3289
3290                 hdmi1: hdmi@feae0000 {
3291                         compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi";
3292                         reg = <0 0xfeae0000 0 0x10000>;
3293                         interrupts = <GIC_SPI 436 IRQ_TYPE_LEVEL_HIGH>;
3294                         clocks = <&cpg CPG_MOD 728>, <&cpg CPG_CORE R8A7795_CLK_HDMI>;
3295                         clock-names = "iahb", "isfr";
3296                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3297                         resets = <&cpg 728>;
3298                         status = "disabled";
3299
3300                         ports {
3301                                 #address-cells = <1>;
3302                                 #size-cells = <0>;
3303                                 port@0 {
3304                                         reg = <0>;
3305                                         dw_hdmi1_in: endpoint {
3306                                                 remote-endpoint = <&du_out_hdmi1>;
3307                                         };
3308                                 };
3309                                 port@1 {
3310                                         reg = <1>;
3311                                 };
3312                                 port@2 {
3313                                         /* HDMI sound */
3314                                         reg = <2>;
3315                                 };
3316                         };
3317                 };
3318
3319                 du: display@feb00000 {
3320                         compatible = "renesas,du-r8a7795";
3321                         reg = <0 0xfeb00000 0 0x80000>;
3322                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
3323                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
3324                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
3325                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
3326                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
3327                                  <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
3328                         clock-names = "du.0", "du.1", "du.2", "du.3";
3329                         resets = <&cpg 724>, <&cpg 722>;
3330                         reset-names = "du.0", "du.2";
3331
3332                         renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
3333                         renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
3334                                        <&vspd0 1>;
3335
3336                         status = "disabled";
3337
3338                         ports {
3339                                 #address-cells = <1>;
3340                                 #size-cells = <0>;
3341
3342                                 port@0 {
3343                                         reg = <0>;
3344                                 };
3345                                 port@1 {
3346                                         reg = <1>;
3347                                         du_out_hdmi0: endpoint {
3348                                                 remote-endpoint = <&dw_hdmi0_in>;
3349                                         };
3350                                 };
3351                                 port@2 {
3352                                         reg = <2>;
3353                                         du_out_hdmi1: endpoint {
3354                                                 remote-endpoint = <&dw_hdmi1_in>;
3355                                         };
3356                                 };
3357                                 port@3 {
3358                                         reg = <3>;
3359                                         du_out_lvds0: endpoint {
3360                                                 remote-endpoint = <&lvds0_in>;
3361                                         };
3362                                 };
3363                         };
3364                 };
3365
3366                 lvds0: lvds@feb90000 {
3367                         compatible = "renesas,r8a7795-lvds";
3368                         reg = <0 0xfeb90000 0 0x14>;
3369                         clocks = <&cpg CPG_MOD 727>;
3370                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
3371                         resets = <&cpg 727>;
3372                         status = "disabled";
3373
3374                         ports {
3375                                 #address-cells = <1>;
3376                                 #size-cells = <0>;
3377
3378                                 port@0 {
3379                                         reg = <0>;
3380                                         lvds0_in: endpoint {
3381                                                 remote-endpoint = <&du_out_lvds0>;
3382                                         };
3383                                 };
3384                                 port@1 {
3385                                         reg = <1>;
3386                                 };
3387                         };
3388                 };
3389
3390                 prr: chipid@fff00044 {
3391                         compatible = "renesas,prr";
3392                         reg = <0 0xfff00044 0 4>;
3393                 };
3394         };
3395
3396         thermal-zones {
3397                 sensor1_thermal: sensor1-thermal {
3398                         polling-delay-passive = <250>;
3399                         polling-delay = <1000>;
3400                         thermal-sensors = <&tsc 0>;
3401                         sustainable-power = <6313>;
3402
3403                         trips {
3404                                 sensor1_crit: sensor1-crit {
3405                                         temperature = <120000>;
3406                                         hysteresis = <1000>;
3407                                         type = "critical";
3408                                 };
3409                         };
3410                 };
3411
3412                 sensor2_thermal: sensor2-thermal {
3413                         polling-delay-passive = <250>;
3414                         polling-delay = <1000>;
3415                         thermal-sensors = <&tsc 1>;
3416                         sustainable-power = <6313>;
3417
3418                         trips {
3419                                 sensor2_crit: sensor2-crit {
3420                                         temperature = <120000>;
3421                                         hysteresis = <1000>;
3422                                         type = "critical";
3423                                 };
3424                         };
3425                 };
3426
3427                 sensor3_thermal: sensor3-thermal {
3428                         polling-delay-passive = <250>;
3429                         polling-delay = <1000>;
3430                         thermal-sensors = <&tsc 2>;
3431
3432                         trips {
3433                                 target: trip-point1 {
3434                                         temperature = <100000>;
3435                                         hysteresis = <1000>;
3436                                         type = "passive";
3437                                 };
3438
3439                                 sensor3_crit: sensor3-crit {
3440                                         temperature = <120000>;
3441                                         hysteresis = <1000>;
3442                                         type = "critical";
3443                                 };
3444                         };
3445
3446                         cooling-maps {
3447                                 map0 {
3448                                         trip = <&target>;
3449                                         cooling-device = <&a57_0 2 4>;
3450                                         contribution = <1024>;
3451                                 };
3452
3453                                 map1 {
3454                                         trip = <&target>;
3455                                         cooling-device = <&a53_0 0 2>;
3456                                         contribution = <1024>;
3457                                 };
3458                         };
3459                 };
3460         };
3461
3462         timer {
3463                 compatible = "arm,armv8-timer";
3464                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3465                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3466                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
3467                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
3468         };
3469
3470         /* External USB clocks - can be overridden by the board */
3471         usb3s0_clk: usb3s0 {
3472                 compatible = "fixed-clock";
3473                 #clock-cells = <0>;
3474                 clock-frequency = <0>;
3475         };
3476
3477         usb_extal_clk: usb_extal {
3478                 compatible = "fixed-clock";
3479                 #clock-cells = <0>;
3480                 clock-frequency = <0>;
3481         };
3482 };