arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13 #include <dt-bindings/power/r8a7795-sysc.h>
  14
  15 / {
  16         compatible = "renesas,r8a7795";
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 i2c0 = &i2c0;
  22                 i2c1 = &i2c1;
  23                 i2c2 = &i2c2;
  24                 i2c3 = &i2c3;
  25                 i2c4 = &i2c4;
  26                 i2c5 = &i2c5;
  27                 i2c6 = &i2c6;
  28         };
  29
  30         psci {
  31                 compatible = "arm,psci-0.2";
  32                 method = "smc";
  33         };
  34
  35         cpus {
  36                 #address-cells = <1>;
  37                 #size-cells = <0>;
  38
  39                 a57_0: cpu@0 {
  40                         compatible = "arm,cortex-a57", "arm,armv8";
  41                         reg = <0x0>;
  42                         device_type = "cpu";
  43                         power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
  44                         next-level-cache = <&L2_CA57>;
  45                         enable-method = "psci";
  46                 };
  47
  48                 a57_1: cpu@1 {
  49                         compatible = "arm,cortex-a57","arm,armv8";
  50                         reg = <0x1>;
  51                         device_type = "cpu";
  52                         power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
  53                         next-level-cache = <&L2_CA57>;
  54                         enable-method = "psci";
  55                 };
  56
  57                 a57_2: cpu@2 {
  58                         compatible = "arm,cortex-a57","arm,armv8";
  59                         reg = <0x2>;
  60                         device_type = "cpu";
  61                         power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
  62                         next-level-cache = <&L2_CA57>;
  63                         enable-method = "psci";
  64                 };
  65
  66                 a57_3: cpu@3 {
  67                         compatible = "arm,cortex-a57","arm,armv8";
  68                         reg = <0x3>;
  69                         device_type = "cpu";
  70                         power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
  71                         next-level-cache = <&L2_CA57>;
  72                         enable-method = "psci";
  73                 };
  74
  75                 L2_CA57: cache-controller@0 {
  76                         compatible = "cache";
  77                         reg = <0>;
  78                         power-domains = <&sysc R8A7795_PD_CA57_SCU>;
  79                         cache-unified;
  80                         cache-level = <2>;
  81                 };
  82
  83                 L2_CA53: cache-controller@100 {
  84                         compatible = "cache";
  85                         reg = <0x100>;
  86                         power-domains = <&sysc R8A7795_PD_CA53_SCU>;
  87                         cache-unified;
  88                         cache-level = <2>;
  89                 };
  90         };
  91
  92         extal_clk: extal {
  93                 compatible = "fixed-clock";
  94                 #clock-cells = <0>;
  95                 /* This value must be overridden by the board */
  96                 clock-frequency = <0>;
  97         };
  98
  99         extalr_clk: extalr {
 100                 compatible = "fixed-clock";
 101                 #clock-cells = <0>;
 102                 /* This value must be overridden by the board */
 103                 clock-frequency = <0>;
 104         };
 105
 106         /*
 107          * The external audio clocks are configured as 0 Hz fixed frequency
 108          * clocks by default.
 109          * Boards that provide audio clocks should override them.
 110          */
 111         audio_clk_a: audio_clk_a {
 112                 compatible = "fixed-clock";
 113                 #clock-cells = <0>;
 114                 clock-frequency = <0>;
 115         };
 116
 117         audio_clk_b: audio_clk_b {
 118                 compatible = "fixed-clock";
 119                 #clock-cells = <0>;
 120                 clock-frequency = <0>;
 121         };
 122
 123         audio_clk_c: audio_clk_c {
 124                 compatible = "fixed-clock";
 125                 #clock-cells = <0>;
 126                 clock-frequency = <0>;
 127         };
 128
 129         /* External CAN clock - to be overridden by boards that provide it */
 130         can_clk: can {
 131                 compatible = "fixed-clock";
 132                 #clock-cells = <0>;
 133                 clock-frequency = <0>;
 134         };
 135
 136         /* External SCIF clock - to be overridden by boards that provide it */
 137         scif_clk: scif {
 138                 compatible = "fixed-clock";
 139                 #clock-cells = <0>;
 140                 clock-frequency = <0>;
 141         };
 142
 143         /* External PCIe clock - can be overridden by the board */
 144         pcie_bus_clk: pcie_bus {
 145                 compatible = "fixed-clock";
 146                 #clock-cells = <0>;
 147                 clock-frequency = <0>;
 148         };
 149
 150         soc {
 151                 compatible = "simple-bus";
 152                 interrupt-parent = <&gic>;
 153
 154                 #address-cells = <2>;
 155                 #size-cells = <2>;
 156                 ranges;
 157
 158                 gic: interrupt-controller@f1010000 {
 159                         compatible = "arm,gic-400";
 160                         #interrupt-cells = <3>;
 161                         #address-cells = <0>;
 162                         interrupt-controller;
 163                         reg = <0x0 0xf1010000 0 0x1000>,
 164                               <0x0 0xf1020000 0 0x20000>,
 165                               <0x0 0xf1040000 0 0x20000>,
 166                               <0x0 0xf1060000 0 0x20000>;
 167                         interrupts = <GIC_PPI 9
 168                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 169                 };
 170
 171                 wdt0: watchdog@e6020000 {
 172                         compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
 173                         reg = <0 0xe6020000 0 0x0c>;
 174                         clocks = <&cpg CPG_MOD 402>;
 175                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 176                         status = "disabled";
 177                 };
 178
 179                 gpio0: gpio@e6050000 {
 180                         compatible = "renesas,gpio-r8a7795",
 181                                      "renesas,gpio-rcar";
 182                         reg = <0 0xe6050000 0 0x50>;
 183                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 184                         #gpio-cells = <2>;
 185                         gpio-controller;
 186                         gpio-ranges = <&pfc 0 0 16>;
 187                         #interrupt-cells = <2>;
 188                         interrupt-controller;
 189                         clocks = <&cpg CPG_MOD 912>;
 190                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 191                 };
 192
 193                 gpio1: gpio@e6051000 {
 194                         compatible = "renesas,gpio-r8a7795",
 195                                      "renesas,gpio-rcar";
 196                         reg = <0 0xe6051000 0 0x50>;
 197                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 198                         #gpio-cells = <2>;
 199                         gpio-controller;
 200                         gpio-ranges = <&pfc 0 32 28>;
 201                         #interrupt-cells = <2>;
 202                         interrupt-controller;
 203                         clocks = <&cpg CPG_MOD 911>;
 204                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 205                 };
 206
 207                 gpio2: gpio@e6052000 {
 208                         compatible = "renesas,gpio-r8a7795",
 209                                      "renesas,gpio-rcar";
 210                         reg = <0 0xe6052000 0 0x50>;
 211                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 212                         #gpio-cells = <2>;
 213                         gpio-controller;
 214                         gpio-ranges = <&pfc 0 64 15>;
 215                         #interrupt-cells = <2>;
 216                         interrupt-controller;
 217                         clocks = <&cpg CPG_MOD 910>;
 218                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 219                 };
 220
 221                 gpio3: gpio@e6053000 {
 222                         compatible = "renesas,gpio-r8a7795",
 223                                      "renesas,gpio-rcar";
 224                         reg = <0 0xe6053000 0 0x50>;
 225                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 226                         #gpio-cells = <2>;
 227                         gpio-controller;
 228                         gpio-ranges = <&pfc 0 96 16>;
 229                         #interrupt-cells = <2>;
 230                         interrupt-controller;
 231                         clocks = <&cpg CPG_MOD 909>;
 232                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 233                 };
 234
 235                 gpio4: gpio@e6054000 {
 236                         compatible = "renesas,gpio-r8a7795",
 237                                      "renesas,gpio-rcar";
 238                         reg = <0 0xe6054000 0 0x50>;
 239                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 240                         #gpio-cells = <2>;
 241                         gpio-controller;
 242                         gpio-ranges = <&pfc 0 128 18>;
 243                         #interrupt-cells = <2>;
 244                         interrupt-controller;
 245                         clocks = <&cpg CPG_MOD 908>;
 246                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 247                 };
 248
 249                 gpio5: gpio@e6055000 {
 250                         compatible = "renesas,gpio-r8a7795",
 251                                      "renesas,gpio-rcar";
 252                         reg = <0 0xe6055000 0 0x50>;
 253                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 254                         #gpio-cells = <2>;
 255                         gpio-controller;
 256                         gpio-ranges = <&pfc 0 160 26>;
 257                         #interrupt-cells = <2>;
 258                         interrupt-controller;
 259                         clocks = <&cpg CPG_MOD 907>;
 260                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 261                 };
 262
 263                 gpio6: gpio@e6055400 {
 264                         compatible = "renesas,gpio-r8a7795",
 265                                      "renesas,gpio-rcar";
 266                         reg = <0 0xe6055400 0 0x50>;
 267                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 268                         #gpio-cells = <2>;
 269                         gpio-controller;
 270                         gpio-ranges = <&pfc 0 192 32>;
 271                         #interrupt-cells = <2>;
 272                         interrupt-controller;
 273                         clocks = <&cpg CPG_MOD 906>;
 274                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 275                 };
 276
 277                 gpio7: gpio@e6055800 {
 278                         compatible = "renesas,gpio-r8a7795",
 279                                      "renesas,gpio-rcar";
 280                         reg = <0 0xe6055800 0 0x50>;
 281                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 282                         #gpio-cells = <2>;
 283                         gpio-controller;
 284                         gpio-ranges = <&pfc 0 224 4>;
 285                         #interrupt-cells = <2>;
 286                         interrupt-controller;
 287                         clocks = <&cpg CPG_MOD 905>;
 288                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 289                 };
 290
 291                 pmu_a57 {
 292                         compatible = "arm,cortex-a57-pmu";
 293                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 294                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 295                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 296                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 297                         interrupt-affinity = <&a57_0>,
 298                                              <&a57_1>,
 299                                              <&a57_2>,
 300                                              <&a57_3>;
 301                 };
 302
 303                 timer {
 304                         compatible = "arm,armv8-timer";
 305                         interrupts = <GIC_PPI 13
 306                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 307                                      <GIC_PPI 14
 308                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 309                                      <GIC_PPI 11
 310                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 311                                      <GIC_PPI 10
 312                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 313                 };
 314
 315                 cpg: clock-controller@e6150000 {
 316                         compatible = "renesas,r8a7795-cpg-mssr";
 317                         reg = <0 0xe6150000 0 0x1000>;
 318                         clocks = <&extal_clk>, <&extalr_clk>;
 319                         clock-names = "extal", "extalr";
 320                         #clock-cells = <2>;
 321                         #power-domain-cells = <0>;
 322                 };
 323
 324                 sysc: system-controller@e6180000 {
 325                         compatible = "renesas,r8a7795-sysc";
 326                         reg = <0 0xe6180000 0 0x0400>;
 327                         #power-domain-cells = <1>;
 328                 };
 329
 330                 audma0: dma-controller@ec700000 {
 331                         compatible = "renesas,dmac-r8a7795",
 332                                      "renesas,rcar-dmac";
 333                         reg = <0 0xec700000 0 0x10000>;
 334                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 335                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 336                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 337                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 338                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 339                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 340                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 341                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 342                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 343                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 344                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 345                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 346                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 347                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 348                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 349                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 350                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 351                         interrupt-names = "error",
 352                                         "ch0", "ch1", "ch2", "ch3",
 353                                         "ch4", "ch5", "ch6", "ch7",
 354                                         "ch8", "ch9", "ch10", "ch11",
 355                                         "ch12", "ch13", "ch14", "ch15";
 356                         clocks = <&cpg CPG_MOD 502>;
 357                         clock-names = "fck";
 358                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 359                         #dma-cells = <1>;
 360                         dma-channels = <16>;
 361                 };
 362
 363                 audma1: dma-controller@ec720000 {
 364                         compatible = "renesas,dmac-r8a7795",
 365                                      "renesas,rcar-dmac";
 366                         reg = <0 0xec720000 0 0x10000>;
 367                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 368                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 369                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 370                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 371                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 372                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 373                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 374                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 375                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 376                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 377                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 378                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 379                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 380                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 381                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 382                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 383                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 384                         interrupt-names = "error",
 385                                         "ch0", "ch1", "ch2", "ch3",
 386                                         "ch4", "ch5", "ch6", "ch7",
 387                                         "ch8", "ch9", "ch10", "ch11",
 388                                         "ch12", "ch13", "ch14", "ch15";
 389                         clocks = <&cpg CPG_MOD 501>;
 390                         clock-names = "fck";
 391                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 392                         #dma-cells = <1>;
 393                         dma-channels = <16>;
 394                 };
 395
 396                 pfc: pfc@e6060000 {
 397                         compatible = "renesas,pfc-r8a7795";
 398                         reg = <0 0xe6060000 0 0x50c>;
 399                 };
 400
 401                 intc_ex: interrupt-controller@e61c0000 {
 402                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 403                         #interrupt-cells = <2>;
 404                         interrupt-controller;
 405                         reg = <0 0xe61c0000 0 0x200>;
 406                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 407                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 408                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 409                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 410                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 411                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 412                         clocks = <&cpg CPG_MOD 407>;
 413                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 414                 };
 415
 416                 dmac0: dma-controller@e6700000 {
 417                         compatible = "renesas,dmac-r8a7795",
 418                                      "renesas,rcar-dmac";
 419                         reg = <0 0xe6700000 0 0x10000>;
 420                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 421                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 422                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 423                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 424                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 425                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 426                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 430                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 431                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 437                         interrupt-names = "error",
 438                                         "ch0", "ch1", "ch2", "ch3",
 439                                         "ch4", "ch5", "ch6", "ch7",
 440                                         "ch8", "ch9", "ch10", "ch11",
 441                                         "ch12", "ch13", "ch14", "ch15";
 442                         clocks = <&cpg CPG_MOD 219>;
 443                         clock-names = "fck";
 444                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 445                         #dma-cells = <1>;
 446                         dma-channels = <16>;
 447                 };
 448
 449                 dmac1: dma-controller@e7300000 {
 450                         compatible = "renesas,dmac-r8a7795",
 451                                      "renesas,rcar-dmac";
 452                         reg = <0 0xe7300000 0 0x10000>;
 453                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 454                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 455                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 456                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 457                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 458                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 459                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 460                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 464                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 465                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 470                         interrupt-names = "error",
 471                                         "ch0", "ch1", "ch2", "ch3",
 472                                         "ch4", "ch5", "ch6", "ch7",
 473                                         "ch8", "ch9", "ch10", "ch11",
 474                                         "ch12", "ch13", "ch14", "ch15";
 475                         clocks = <&cpg CPG_MOD 218>;
 476                         clock-names = "fck";
 477                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 478                         #dma-cells = <1>;
 479                         dma-channels = <16>;
 480                 };
 481
 482                 dmac2: dma-controller@e7310000 {
 483                         compatible = "renesas,dmac-r8a7795",
 484                                      "renesas,rcar-dmac";
 485                         reg = <0 0xe7310000 0 0x10000>;
 486                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 487                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 488                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 489                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 490                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 491                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 492                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 493                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 494                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 495                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 496                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 497                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 498                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 499                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 500                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 501                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 502                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 503                         interrupt-names = "error",
 504                                         "ch0", "ch1", "ch2", "ch3",
 505                                         "ch4", "ch5", "ch6", "ch7",
 506                                         "ch8", "ch9", "ch10", "ch11",
 507                                         "ch12", "ch13", "ch14", "ch15";
 508                         clocks = <&cpg CPG_MOD 217>;
 509                         clock-names = "fck";
 510                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 511                         #dma-cells = <1>;
 512                         dma-channels = <16>;
 513                 };
 514
 515                 avb: ethernet@e6800000 {
 516                         compatible = "renesas,etheravb-r8a7795",
 517                                      "renesas,etheravb-rcar-gen3";
 518                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 519                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 520                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 521                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 522                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 523                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 524                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 525                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 526                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 527                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 528                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 529                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 530                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 531                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 532                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 533                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 534                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 535                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 536                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 537                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 538                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 539                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 540                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 541                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 542                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 543                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 544                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 545                                           "ch4", "ch5", "ch6", "ch7",
 546                                           "ch8", "ch9", "ch10", "ch11",
 547                                           "ch12", "ch13", "ch14", "ch15",
 548                                           "ch16", "ch17", "ch18", "ch19",
 549                                           "ch20", "ch21", "ch22", "ch23",
 550                                           "ch24";
 551                         clocks = <&cpg CPG_MOD 812>;
 552                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 553                         phy-mode = "rgmii-id";
 554                         #address-cells = <1>;
 555                         #size-cells = <0>;
 556                         status = "disabled";
 557                 };
 558
 559                 can0: can@e6c30000 {
 560                         compatible = "renesas,can-r8a7795",
 561                                      "renesas,rcar-gen3-can";
 562                         reg = <0 0xe6c30000 0 0x1000>;
 563                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 564                         clocks = <&cpg CPG_MOD 916>,
 565                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 566                                <&can_clk>;
 567                         clock-names = "clkp1", "clkp2", "can_clk";
 568                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 569                         assigned-clock-rates = <40000000>;
 570                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 571                         status = "disabled";
 572                 };
 573
 574                 can1: can@e6c38000 {
 575                         compatible = "renesas,can-r8a7795",
 576                                      "renesas,rcar-gen3-can";
 577                         reg = <0 0xe6c38000 0 0x1000>;
 578                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 579                         clocks = <&cpg CPG_MOD 915>,
 580                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 581                                <&can_clk>;
 582                         clock-names = "clkp1", "clkp2", "can_clk";
 583                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 584                         assigned-clock-rates = <40000000>;
 585                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 586                         status = "disabled";
 587                 };
 588
 589                 canfd: can@e66c0000 {
 590                         compatible = "renesas,r8a7795-canfd",
 591                                      "renesas,rcar-gen3-canfd";
 592                         reg = <0 0xe66c0000 0 0x8000>;
 593                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
 594                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 595                         clocks = <&cpg CPG_MOD 914>,
 596                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 597                                <&can_clk>;
 598                         clock-names = "fck", "canfd", "can_clk";
 599                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 600                         assigned-clock-rates = <40000000>;
 601                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 602                         status = "disabled";
 603
 604                         channel0 {
 605                                 status = "disabled";
 606                         };
 607
 608                         channel1 {
 609                                 status = "disabled";
 610                         };
 611                 };
 612
 613                 hscif0: serial@e6540000 {
 614                         compatible = "renesas,hscif-r8a7795",
 615                                      "renesas,rcar-gen3-hscif",
 616                                      "renesas,hscif";
 617                         reg = <0 0xe6540000 0 96>;
 618                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 619                         clocks = <&cpg CPG_MOD 520>,
 620                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 621                                  <&scif_clk>;
 622                         clock-names = "fck", "brg_int", "scif_clk";
 623                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 624                         dma-names = "tx", "rx";
 625                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 626                         status = "disabled";
 627                 };
 628
 629                 hscif1: serial@e6550000 {
 630                         compatible = "renesas,hscif-r8a7795",
 631                                      "renesas,rcar-gen3-hscif",
 632                                      "renesas,hscif";
 633                         reg = <0 0xe6550000 0 96>;
 634                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 635                         clocks = <&cpg CPG_MOD 519>,
 636                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 637                                  <&scif_clk>;
 638                         clock-names = "fck", "brg_int", "scif_clk";
 639                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 640                         dma-names = "tx", "rx";
 641                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 642                         status = "disabled";
 643                 };
 644
 645                 hscif2: serial@e6560000 {
 646                         compatible = "renesas,hscif-r8a7795",
 647                                      "renesas,rcar-gen3-hscif",
 648                                      "renesas,hscif";
 649                         reg = <0 0xe6560000 0 96>;
 650                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 651                         clocks = <&cpg CPG_MOD 518>,
 652                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 653                                  <&scif_clk>;
 654                         clock-names = "fck", "brg_int", "scif_clk";
 655                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 656                         dma-names = "tx", "rx";
 657                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 658                         status = "disabled";
 659                 };
 660
 661                 hscif3: serial@e66a0000 {
 662                         compatible = "renesas,hscif-r8a7795",
 663                                      "renesas,rcar-gen3-hscif",
 664                                      "renesas,hscif";
 665                         reg = <0 0xe66a0000 0 96>;
 666                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 667                         clocks = <&cpg CPG_MOD 517>,
 668                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 669                                  <&scif_clk>;
 670                         clock-names = "fck", "brg_int", "scif_clk";
 671                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 672                         dma-names = "tx", "rx";
 673                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 674                         status = "disabled";
 675                 };
 676
 677                 hscif4: serial@e66b0000 {
 678                         compatible = "renesas,hscif-r8a7795",
 679                                      "renesas,rcar-gen3-hscif",
 680                                      "renesas,hscif";
 681                         reg = <0 0xe66b0000 0 96>;
 682                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 683                         clocks = <&cpg CPG_MOD 516>,
 684                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 685                                  <&scif_clk>;
 686                         clock-names = "fck", "brg_int", "scif_clk";
 687                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 688                         dma-names = "tx", "rx";
 689                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 690                         status = "disabled";
 691                 };
 692
 693                 scif0: serial@e6e60000 {
 694                         compatible = "renesas,scif-r8a7795",
 695                                      "renesas,rcar-gen3-scif", "renesas,scif";
 696                         reg = <0 0xe6e60000 0 64>;
 697                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 698                         clocks = <&cpg CPG_MOD 207>,
 699                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 700                                  <&scif_clk>;
 701                         clock-names = "fck", "brg_int", "scif_clk";
 702                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 703                         dma-names = "tx", "rx";
 704                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 705                         status = "disabled";
 706                 };
 707
 708                 scif1: serial@e6e68000 {
 709                         compatible = "renesas,scif-r8a7795",
 710                                      "renesas,rcar-gen3-scif", "renesas,scif";
 711                         reg = <0 0xe6e68000 0 64>;
 712                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 713                         clocks = <&cpg CPG_MOD 206>,
 714                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 715                                  <&scif_clk>;
 716                         clock-names = "fck", "brg_int", "scif_clk";
 717                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 718                         dma-names = "tx", "rx";
 719                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 720                         status = "disabled";
 721                 };
 722
 723                 scif2: serial@e6e88000 {
 724                         compatible = "renesas,scif-r8a7795",
 725                                      "renesas,rcar-gen3-scif", "renesas,scif";
 726                         reg = <0 0xe6e88000 0 64>;
 727                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 728                         clocks = <&cpg CPG_MOD 310>,
 729                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 730                                  <&scif_clk>;
 731                         clock-names = "fck", "brg_int", "scif_clk";
 732                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 733                         dma-names = "tx", "rx";
 734                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 735                         status = "disabled";
 736                 };
 737
 738                 scif3: serial@e6c50000 {
 739                         compatible = "renesas,scif-r8a7795",
 740                                      "renesas,rcar-gen3-scif", "renesas,scif";
 741                         reg = <0 0xe6c50000 0 64>;
 742                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 743                         clocks = <&cpg CPG_MOD 204>,
 744                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 745                                  <&scif_clk>;
 746                         clock-names = "fck", "brg_int", "scif_clk";
 747                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 748                         dma-names = "tx", "rx";
 749                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 750                         status = "disabled";
 751                 };
 752
 753                 scif4: serial@e6c40000 {
 754                         compatible = "renesas,scif-r8a7795",
 755                                      "renesas,rcar-gen3-scif", "renesas,scif";
 756                         reg = <0 0xe6c40000 0 64>;
 757                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 758                         clocks = <&cpg CPG_MOD 203>,
 759                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 760                                  <&scif_clk>;
 761                         clock-names = "fck", "brg_int", "scif_clk";
 762                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 763                         dma-names = "tx", "rx";
 764                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 765                         status = "disabled";
 766                 };
 767
 768                 scif5: serial@e6f30000 {
 769                         compatible = "renesas,scif-r8a7795",
 770                                      "renesas,rcar-gen3-scif", "renesas,scif";
 771                         reg = <0 0xe6f30000 0 64>;
 772                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 773                         clocks = <&cpg CPG_MOD 202>,
 774                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 775                                  <&scif_clk>;
 776                         clock-names = "fck", "brg_int", "scif_clk";
 777                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 778                         dma-names = "tx", "rx";
 779                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 780                         status = "disabled";
 781                 };
 782
 783                 i2c0: i2c@e6500000 {
 784                         #address-cells = <1>;
 785                         #size-cells = <0>;
 786                         compatible = "renesas,i2c-r8a7795";
 787                         reg = <0 0xe6500000 0 0x40>;
 788                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 789                         clocks = <&cpg CPG_MOD 931>;
 790                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 791                         dmas = <&dmac1 0x91>, <&dmac1 0x90>;
 792                         dma-names = "tx", "rx";
 793                         i2c-scl-internal-delay-ns = <110>;
 794                         status = "disabled";
 795                 };
 796
 797                 i2c1: i2c@e6508000 {
 798                         #address-cells = <1>;
 799                         #size-cells = <0>;
 800                         compatible = "renesas,i2c-r8a7795";
 801                         reg = <0 0xe6508000 0 0x40>;
 802                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 803                         clocks = <&cpg CPG_MOD 930>;
 804                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 805                         dmas = <&dmac1 0x93>, <&dmac1 0x92>;
 806                         dma-names = "tx", "rx";
 807                         i2c-scl-internal-delay-ns = <6>;
 808                         status = "disabled";
 809                 };
 810
 811                 i2c2: i2c@e6510000 {
 812                         #address-cells = <1>;
 813                         #size-cells = <0>;
 814                         compatible = "renesas,i2c-r8a7795";
 815                         reg = <0 0xe6510000 0 0x40>;
 816                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 817                         clocks = <&cpg CPG_MOD 929>;
 818                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 819                         dmas = <&dmac1 0x95>, <&dmac1 0x94>;
 820                         dma-names = "tx", "rx";
 821                         i2c-scl-internal-delay-ns = <6>;
 822                         status = "disabled";
 823                 };
 824
 825                 i2c3: i2c@e66d0000 {
 826                         #address-cells = <1>;
 827                         #size-cells = <0>;
 828                         compatible = "renesas,i2c-r8a7795";
 829                         reg = <0 0xe66d0000 0 0x40>;
 830                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 831                         clocks = <&cpg CPG_MOD 928>;
 832                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 833                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 834                         dma-names = "tx", "rx";
 835                         i2c-scl-internal-delay-ns = <110>;
 836                         status = "disabled";
 837                 };
 838
 839                 i2c4: i2c@e66d8000 {
 840                         #address-cells = <1>;
 841                         #size-cells = <0>;
 842                         compatible = "renesas,i2c-r8a7795";
 843                         reg = <0 0xe66d8000 0 0x40>;
 844                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 845                         clocks = <&cpg CPG_MOD 927>;
 846                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 847                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 848                         dma-names = "tx", "rx";
 849                         i2c-scl-internal-delay-ns = <110>;
 850                         status = "disabled";
 851                 };
 852
 853                 i2c5: i2c@e66e0000 {
 854                         #address-cells = <1>;
 855                         #size-cells = <0>;
 856                         compatible = "renesas,i2c-r8a7795";
 857                         reg = <0 0xe66e0000 0 0x40>;
 858                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 859                         clocks = <&cpg CPG_MOD 919>;
 860                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 861                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 862                         dma-names = "tx", "rx";
 863                         i2c-scl-internal-delay-ns = <110>;
 864                         status = "disabled";
 865                 };
 866
 867                 i2c6: i2c@e66e8000 {
 868                         #address-cells = <1>;
 869                         #size-cells = <0>;
 870                         compatible = "renesas,i2c-r8a7795";
 871                         reg = <0 0xe66e8000 0 0x40>;
 872                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 873                         clocks = <&cpg CPG_MOD 918>;
 874                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 875                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 876                         dma-names = "tx", "rx";
 877                         i2c-scl-internal-delay-ns = <6>;
 878                         status = "disabled";
 879                 };
 880
 881                 rcar_sound: sound@ec500000 {
 882                         /*
 883                          * #sound-dai-cells is required
 884                          *
 885                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
 886                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
 887                          */
 888                         /*
 889                          * #clock-cells is required for audio_clkout0/1/2/3
 890                          *
 891                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
 892                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
 893                          */
 894                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
 895                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
 896                                 <0 0xec5a0000 0 0x100>,  /* ADG */
 897                                 <0 0xec540000 0 0x1000>, /* SSIU */
 898                                 <0 0xec541000 0 0x280>,  /* SSI */
 899                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 900                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 901
 902                         clocks = <&cpg CPG_MOD 1005>,
 903                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 904                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 905                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 906                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 907                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 908                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 909                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 910                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 911                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 912                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 913                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 914                                  <&audio_clk_a>, <&audio_clk_b>,
 915                                  <&audio_clk_c>,
 916                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 917                         clock-names = "ssi-all",
 918                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 919                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 920                                       "ssi.1", "ssi.0",
 921                                       "src.9", "src.8", "src.7", "src.6",
 922                                       "src.5", "src.4", "src.3", "src.2",
 923                                       "src.1", "src.0",
 924                                       "dvc.0", "dvc.1",
 925                                       "clk_a", "clk_b", "clk_c", "clk_i";
 926                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 927                         status = "disabled";
 928
 929                         rcar_sound,dvc {
 930                                 dvc0: dvc-0 {
 931                                         dmas = <&audma0 0xbc>;
 932                                         dma-names = "tx";
 933                                 };
 934                                 dvc1: dvc-1 {
 935                                         dmas = <&audma0 0xbe>;
 936                                         dma-names = "tx";
 937                                 };
 938                         };
 939
 940                         rcar_sound,src {
 941                                 src0: src-0 {
 942                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
 943                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
 944                                         dma-names = "rx", "tx";
 945                                 };
 946                                 src1: src-1 {
 947                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 948                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
 949                                         dma-names = "rx", "tx";
 950                                 };
 951                                 src2: src-2 {
 952                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 953                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
 954                                         dma-names = "rx", "tx";
 955                                 };
 956                                 src3: src-3 {
 957                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 958                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
 959                                         dma-names = "rx", "tx";
 960                                 };
 961                                 src4: src-4 {
 962                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 963                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
 964                                         dma-names = "rx", "tx";
 965                                 };
 966                                 src5: src-5 {
 967                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 968                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
 969                                         dma-names = "rx", "tx";
 970                                 };
 971                                 src6: src-6 {
 972                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 973                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
 974                                         dma-names = "rx", "tx";
 975                                 };
 976                                 src7: src-7 {
 977                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
 978                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
 979                                         dma-names = "rx", "tx";
 980                                 };
 981                                 src8: src-8 {
 982                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
 983                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
 984                                         dma-names = "rx", "tx";
 985                                 };
 986                                 src9: src-9 {
 987                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
 988                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
 989                                         dma-names = "rx", "tx";
 990                                 };
 991                         };
 992
 993                         rcar_sound,ssi {
 994                                 ssi0: ssi-0 {
 995                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
 996                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
 997                                         dma-names = "rx", "tx", "rxu", "txu";
 998                                 };
 999                                 ssi1: ssi-1 {
1000                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1001                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1002                                         dma-names = "rx", "tx", "rxu", "txu";
1003                                 };
1004                                 ssi2: ssi-2 {
1005                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1006                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1007                                         dma-names = "rx", "tx", "rxu", "txu";
1008                                 };
1009                                 ssi3: ssi-3 {
1010                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1011                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1012                                         dma-names = "rx", "tx", "rxu", "txu";
1013                                 };
1014                                 ssi4: ssi-4 {
1015                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1016                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1017                                         dma-names = "rx", "tx", "rxu", "txu";
1018                                 };
1019                                 ssi5: ssi-5 {
1020                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1021                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1022                                         dma-names = "rx", "tx", "rxu", "txu";
1023                                 };
1024                                 ssi6: ssi-6 {
1025                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1026                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1027                                         dma-names = "rx", "tx", "rxu", "txu";
1028                                 };
1029                                 ssi7: ssi-7 {
1030                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1031                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1032                                         dma-names = "rx", "tx", "rxu", "txu";
1033                                 };
1034                                 ssi8: ssi-8 {
1035                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1036                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1037                                         dma-names = "rx", "tx", "rxu", "txu";
1038                                 };
1039                                 ssi9: ssi-9 {
1040                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1041                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1042                                         dma-names = "rx", "tx", "rxu", "txu";
1043                                 };
1044                         };
1045                 };
1046
1047                 sata: sata@ee300000 {
1048                         compatible = "renesas,sata-r8a7795";
1049                         reg = <0 0xee300000 0 0x1fff>;
1050                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1051                         clocks = <&cpg CPG_MOD 815>;
1052                         status = "disabled";
1053                 };
1054
1055                 xhci0: usb@ee000000 {
1056                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1057                         reg = <0 0xee000000 0 0xc00>;
1058                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1059                         clocks = <&cpg CPG_MOD 328>;
1060                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1061                         status = "disabled";
1062                 };
1063
1064                 xhci1: usb@ee0400000 {
1065                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1066                         reg = <0 0xee040000 0 0xc00>;
1067                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1068                         clocks = <&cpg CPG_MOD 327>;
1069                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1070                         status = "disabled";
1071                 };
1072
1073                 usb_dmac0: dma-controller@e65a0000 {
1074                         compatible = "renesas,r8a7795-usb-dmac",
1075                                      "renesas,usb-dmac";
1076                         reg = <0 0xe65a0000 0 0x100>;
1077                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1078                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1079                         interrupt-names = "ch0", "ch1";
1080                         clocks = <&cpg CPG_MOD 330>;
1081                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1082                         #dma-cells = <1>;
1083                         dma-channels = <2>;
1084                 };
1085
1086                 usb_dmac1: dma-controller@e65b0000 {
1087                         compatible = "renesas,r8a7795-usb-dmac",
1088                                      "renesas,usb-dmac";
1089                         reg = <0 0xe65b0000 0 0x100>;
1090                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1091                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1092                         interrupt-names = "ch0", "ch1";
1093                         clocks = <&cpg CPG_MOD 331>;
1094                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1095                         #dma-cells = <1>;
1096                         dma-channels = <2>;
1097                 };
1098
1099                 sdhi0: sd@ee100000 {
1100                         compatible = "renesas,sdhi-r8a7795";
1101                         reg = <0 0xee100000 0 0x2000>;
1102                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1103                         clocks = <&cpg CPG_MOD 314>;
1104                         max-frequency = <200000000>;
1105                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1106                         status = "disabled";
1107                 };
1108
1109                 sdhi1: sd@ee120000 {
1110                         compatible = "renesas,sdhi-r8a7795";
1111                         reg = <0 0xee120000 0 0x2000>;
1112                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1113                         clocks = <&cpg CPG_MOD 313>;
1114                         max-frequency = <200000000>;
1115                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1116                         status = "disabled";
1117                 };
1118
1119                 sdhi2: sd@ee140000 {
1120                         compatible = "renesas,sdhi-r8a7795";
1121                         reg = <0 0xee140000 0 0x2000>;
1122                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1123                         clocks = <&cpg CPG_MOD 312>;
1124                         max-frequency = <200000000>;
1125                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1126                         status = "disabled";
1127                 };
1128
1129                 sdhi3: sd@ee160000 {
1130                         compatible = "renesas,sdhi-r8a7795";
1131                         reg = <0 0xee160000 0 0x2000>;
1132                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1133                         clocks = <&cpg CPG_MOD 311>;
1134                         max-frequency = <200000000>;
1135                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1136                         status = "disabled";
1137                 };
1138
1139                 usb2_phy0: usb-phy@ee080200 {
1140                         compatible = "renesas,usb2-phy-r8a7795";
1141                         reg = <0 0xee080200 0 0x700>;
1142                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1143                         clocks = <&cpg CPG_MOD 703>;
1144                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1145                         #phy-cells = <0>;
1146                         status = "disabled";
1147                 };
1148
1149                 usb2_phy1: usb-phy@ee0a0200 {
1150                         compatible = "renesas,usb2-phy-r8a7795";
1151                         reg = <0 0xee0a0200 0 0x700>;
1152                         clocks = <&cpg CPG_MOD 702>;
1153                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1154                         #phy-cells = <0>;
1155                         status = "disabled";
1156                 };
1157
1158                 usb2_phy2: usb-phy@ee0c0200 {
1159                         compatible = "renesas,usb2-phy-r8a7795";
1160                         reg = <0 0xee0c0200 0 0x700>;
1161                         clocks = <&cpg CPG_MOD 701>;
1162                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1163                         #phy-cells = <0>;
1164                         status = "disabled";
1165                 };
1166
1167                 ehci0: usb@ee080100 {
1168                         compatible = "generic-ehci";
1169                         reg = <0 0xee080100 0 0x100>;
1170                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1171                         clocks = <&cpg CPG_MOD 703>;
1172                         phys = <&usb2_phy0>;
1173                         phy-names = "usb";
1174                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1175                         status = "disabled";
1176                 };
1177
1178                 ehci1: usb@ee0a0100 {
1179                         compatible = "generic-ehci";
1180                         reg = <0 0xee0a0100 0 0x100>;
1181                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1182                         clocks = <&cpg CPG_MOD 702>;
1183                         phys = <&usb2_phy1>;
1184                         phy-names = "usb";
1185                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1186                         status = "disabled";
1187                 };
1188
1189                 ehci2: usb@ee0c0100 {
1190                         compatible = "generic-ehci";
1191                         reg = <0 0xee0c0100 0 0x100>;
1192                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1193                         clocks = <&cpg CPG_MOD 701>;
1194                         phys = <&usb2_phy2>;
1195                         phy-names = "usb";
1196                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1197                         status = "disabled";
1198                 };
1199
1200                 ohci0: usb@ee080000 {
1201                         compatible = "generic-ohci";
1202                         reg = <0 0xee080000 0 0x100>;
1203                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1204                         clocks = <&cpg CPG_MOD 703>;
1205                         phys = <&usb2_phy0>;
1206                         phy-names = "usb";
1207                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1208                         status = "disabled";
1209                 };
1210
1211                 ohci1: usb@ee0a0000 {
1212                         compatible = "generic-ohci";
1213                         reg = <0 0xee0a0000 0 0x100>;
1214                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1215                         clocks = <&cpg CPG_MOD 702>;
1216                         phys = <&usb2_phy1>;
1217                         phy-names = "usb";
1218                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1219                         status = "disabled";
1220                 };
1221
1222                 ohci2: usb@ee0c0000 {
1223                         compatible = "generic-ohci";
1224                         reg = <0 0xee0c0000 0 0x100>;
1225                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1226                         clocks = <&cpg CPG_MOD 701>;
1227                         phys = <&usb2_phy2>;
1228                         phy-names = "usb";
1229                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1230                         status = "disabled";
1231                 };
1232
1233                 hsusb: usb@e6590000 {
1234                         compatible = "renesas,usbhs-r8a7795",
1235                                      "renesas,rcar-gen3-usbhs";
1236                         reg = <0 0xe6590000 0 0x100>;
1237                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
1238                         clocks = <&cpg CPG_MOD 704>;
1239                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
1240                                <&usb_dmac1 0>, <&usb_dmac1 1>;
1241                         dma-names = "ch0", "ch1", "ch2", "ch3";
1242                         renesas,buswait = <11>;
1243                         phys = <&usb2_phy0>;
1244                         phy-names = "usb";
1245                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1246                         status = "disabled";
1247                 };
1248
1249                 pciec0: pcie@fe000000 {
1250                         compatible = "renesas,pcie-r8a7795";
1251                         reg = <0 0xfe000000 0 0x80000>;
1252                         #address-cells = <3>;
1253                         #size-cells = <2>;
1254                         bus-range = <0x00 0xff>;
1255                         device_type = "pci";
1256                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1257                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1258                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1259                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1260                         /* Map all possible DDR as inbound ranges */
1261                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1262                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1263                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1264                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1265                         #interrupt-cells = <1>;
1266                         interrupt-map-mask = <0 0 0 0>;
1267                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1268                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1269                         clock-names = "pcie", "pcie_bus";
1270                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1271                         status = "disabled";
1272                 };
1273
1274                 pciec1: pcie@ee800000 {
1275                         compatible = "renesas,pcie-r8a7795";
1276                         reg = <0 0xee800000 0 0x80000>;
1277                         #address-cells = <3>;
1278                         #size-cells = <2>;
1279                         bus-range = <0x00 0xff>;
1280                         device_type = "pci";
1281                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1282                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1283                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1284                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1285                         /* Map all possible DDR as inbound ranges */
1286                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1287                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1288                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1289                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1290                         #interrupt-cells = <1>;
1291                         interrupt-map-mask = <0 0 0 0>;
1292                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1293                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1294                         clock-names = "pcie", "pcie_bus";
1295                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1296                         status = "disabled";
1297                 };
1298
1299                 vspbc: vsp@fe920000 {
1300                         compatible = "renesas,vsp2";
1301                         reg = <0 0xfe920000 0 0x8000>;
1302                         interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1303                         clocks = <&cpg CPG_MOD 624>;
1304                         power-domains = <&sysc R8A7795_PD_A3VP>;
1305
1306                         renesas,fcp = <&fcpvb1>;
1307                 };
1308
1309                 fcpvb1: fcp@fe92f000 {
1310                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1311                         reg = <0 0xfe92f000 0 0x200>;
1312                         clocks = <&cpg CPG_MOD 606>;
1313                         power-domains = <&sysc R8A7795_PD_A3VP>;
1314                 };
1315
1316                 fcpf0: fcp@fe950000 {
1317                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1318                         reg = <0 0xfe950000 0 0x200>;
1319                         clocks = <&cpg CPG_MOD 615>;
1320                         power-domains = <&sysc R8A7795_PD_A3VP>;
1321                 };
1322
1323                 fcpf1: fcp@fe951000 {
1324                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1325                         reg = <0 0xfe951000 0 0x200>;
1326                         clocks = <&cpg CPG_MOD 614>;
1327                         power-domains = <&sysc R8A7795_PD_A3VP>;
1328                 };
1329
1330                 fcpf2: fcp@fe952000 {
1331                         compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
1332                         reg = <0 0xfe952000 0 0x200>;
1333                         clocks = <&cpg CPG_MOD 613>;
1334                         power-domains = <&sysc R8A7795_PD_A3VP>;
1335                 };
1336
1337                 vspbd: vsp@fe960000 {
1338                         compatible = "renesas,vsp2";
1339                         reg = <0 0xfe960000 0 0x8000>;
1340                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1341                         clocks = <&cpg CPG_MOD 626>;
1342                         power-domains = <&sysc R8A7795_PD_A3VP>;
1343
1344                         renesas,fcp = <&fcpvb0>;
1345                 };
1346
1347                 fcpvb0: fcp@fe96f000 {
1348                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1349                         reg = <0 0xfe96f000 0 0x200>;
1350                         clocks = <&cpg CPG_MOD 607>;
1351                         power-domains = <&sysc R8A7795_PD_A3VP>;
1352                 };
1353
1354                 vspi0: vsp@fe9a0000 {
1355                         compatible = "renesas,vsp2";
1356                         reg = <0 0xfe9a0000 0 0x8000>;
1357                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1358                         clocks = <&cpg CPG_MOD 631>;
1359                         power-domains = <&sysc R8A7795_PD_A3VP>;
1360
1361                         renesas,fcp = <&fcpvi0>;
1362                 };
1363
1364                 fcpvi0: fcp@fe9af000 {
1365                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1366                         reg = <0 0xfe9af000 0 0x200>;
1367                         clocks = <&cpg CPG_MOD 611>;
1368                         power-domains = <&sysc R8A7795_PD_A3VP>;
1369                 };
1370
1371                 vspi1: vsp@fe9b0000 {
1372                         compatible = "renesas,vsp2";
1373                         reg = <0 0xfe9b0000 0 0x8000>;
1374                         interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1375                         clocks = <&cpg CPG_MOD 630>;
1376                         power-domains = <&sysc R8A7795_PD_A3VP>;
1377
1378                         renesas,fcp = <&fcpvi1>;
1379                 };
1380
1381                 fcpvi1: fcp@fe9bf000 {
1382                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1383                         reg = <0 0xfe9bf000 0 0x200>;
1384                         clocks = <&cpg CPG_MOD 610>;
1385                         power-domains = <&sysc R8A7795_PD_A3VP>;
1386                 };
1387
1388                 vspi2: vsp@fe9c0000 {
1389                         compatible = "renesas,vsp2";
1390                         reg = <0 0xfe9c0000 0 0x8000>;
1391                         interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1392                         clocks = <&cpg CPG_MOD 629>;
1393                         power-domains = <&sysc R8A7795_PD_A3VP>;
1394
1395                         renesas,fcp = <&fcpvi2>;
1396                 };
1397
1398                 fcpvi2: fcp@fe9cf000 {
1399                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1400                         reg = <0 0xfe9cf000 0 0x200>;
1401                         clocks = <&cpg CPG_MOD 609>;
1402                         power-domains = <&sysc R8A7795_PD_A3VP>;
1403                 };
1404
1405                 vspd0: vsp@fea20000 {
1406                         compatible = "renesas,vsp2";
1407                         reg = <0 0xfea20000 0 0x4000>;
1408                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1409                         clocks = <&cpg CPG_MOD 623>;
1410                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1411
1412                         renesas,fcp = <&fcpvd0>;
1413                 };
1414
1415                 fcpvd0: fcp@fea27000 {
1416                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1417                         reg = <0 0xfea27000 0 0x200>;
1418                         clocks = <&cpg CPG_MOD 603>;
1419                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1420                 };
1421
1422                 vspd1: vsp@fea28000 {
1423                         compatible = "renesas,vsp2";
1424                         reg = <0 0xfea28000 0 0x4000>;
1425                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1426                         clocks = <&cpg CPG_MOD 622>;
1427                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1428
1429                         renesas,fcp = <&fcpvd1>;
1430                 };
1431
1432                 fcpvd1: fcp@fea2f000 {
1433                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1434                         reg = <0 0xfea2f000 0 0x200>;
1435                         clocks = <&cpg CPG_MOD 602>;
1436                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1437                 };
1438
1439                 vspd2: vsp@fea30000 {
1440                         compatible = "renesas,vsp2";
1441                         reg = <0 0xfea30000 0 0x4000>;
1442                         interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1443                         clocks = <&cpg CPG_MOD 621>;
1444                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1445
1446                         renesas,fcp = <&fcpvd2>;
1447                 };
1448
1449                 fcpvd2: fcp@fea37000 {
1450                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1451                         reg = <0 0xfea37000 0 0x200>;
1452                         clocks = <&cpg CPG_MOD 601>;
1453                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1454                 };
1455
1456                 vspd3: vsp@fea38000 {
1457                         compatible = "renesas,vsp2";
1458                         reg = <0 0xfea38000 0 0x4000>;
1459                         interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1460                         clocks = <&cpg CPG_MOD 620>;
1461                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1462
1463                         renesas,fcp = <&fcpvd3>;
1464                 };
1465
1466                 fcpvd3: fcp@fea3f000 {
1467                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
1468                         reg = <0 0xfea3f000 0 0x200>;
1469                         clocks = <&cpg CPG_MOD 600>;
1470                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1471                 };
1472
1473                 fdp1@fe940000 {
1474                         compatible = "renesas,fdp1";
1475                         reg = <0 0xfe940000 0 0x2400>;
1476                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1477                         clocks = <&cpg CPG_MOD 119>;
1478                         power-domains = <&sysc R8A7795_PD_A3VP>;
1479                         renesas,fcp = <&fcpf0>;
1480                 };
1481
1482                 fdp1@fe944000 {
1483                         compatible = "renesas,fdp1";
1484                         reg = <0 0xfe944000 0 0x2400>;
1485                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1486                         clocks = <&cpg CPG_MOD 118>;
1487                         power-domains = <&sysc R8A7795_PD_A3VP>;
1488                         renesas,fcp = <&fcpf1>;
1489                 };
1490
1491                 fdp1@fe948000 {
1492                         compatible = "renesas,fdp1";
1493                         reg = <0 0xfe948000 0 0x2400>;
1494                         interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1495                         clocks = <&cpg CPG_MOD 117>;
1496                         power-domains = <&sysc R8A7795_PD_A3VP>;
1497                         renesas,fcp = <&fcpf2>;
1498                 };
1499
1500                 du: display@feb00000 {
1501                         compatible = "renesas,du-r8a7795";
1502                         reg = <0 0xfeb00000 0 0x80000>,
1503                               <0 0xfeb90000 0 0x14>;
1504                         reg-names = "du", "lvds.0";
1505                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1506                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1507                                      <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
1508                                      <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
1509                         clocks = <&cpg CPG_MOD 724>,
1510                                  <&cpg CPG_MOD 723>,
1511                                  <&cpg CPG_MOD 722>,
1512                                  <&cpg CPG_MOD 721>,
1513                                  <&cpg CPG_MOD 727>;
1514                         clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
1515                         status = "disabled";
1516
1517                         vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
1518
1519                         ports {
1520                                 #address-cells = <1>;
1521                                 #size-cells = <0>;
1522
1523                                 port@0 {
1524                                         reg = <0>;
1525                                         du_out_rgb: endpoint {
1526                                         };
1527                                 };
1528                                 port@1 {
1529                                         reg = <1>;
1530                                         du_out_hdmi0: endpoint {
1531                                         };
1532                                 };
1533                                 port@2 {
1534                                         reg = <2>;
1535                                         du_out_hdmi1: endpoint {
1536                                         };
1537                                 };
1538                                 port@3 {
1539                                         reg = <3>;
1540                                         du_out_lvds0: endpoint {
1541                                         };
1542                                 };
1543                         };
1544                 };
1545         };
1546 };