arch/arm64/boot/dts/renesas/r8a774c0.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device Tree Source for the RZ/G2E (R8A774C0) SoC
   4  *
   5  * Copyright (C) 2018-2019 Renesas Electronics Corp.
   6  */
   7
   8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
   9 #include <dt-bindings/interrupt-controller/arm-gic.h>
  10 #include <dt-bindings/power/r8a774c0-sysc.h>
  11
  12 / {
  13         compatible = "renesas,r8a774c0";
  14         #address-cells = <2>;
  15         #size-cells = <2>;
  16
  17         /*
  18          * The external audio clocks are configured as 0 Hz fixed frequency
  19          * clocks by default.
  20          * Boards that provide audio clocks should override them.
  21          */
  22         audio_clk_a: audio_clk_a {
  23                 compatible = "fixed-clock";
  24                 #clock-cells = <0>;
  25                 clock-frequency = <0>;
  26         };
  27
  28         audio_clk_b: audio_clk_b {
  29                 compatible = "fixed-clock";
  30                 #clock-cells = <0>;
  31                 clock-frequency = <0>;
  32         };
  33
  34         audio_clk_c: audio_clk_c {
  35                 compatible = "fixed-clock";
  36                 #clock-cells = <0>;
  37                 clock-frequency = <0>;
  38         };
  39
  40         /* External CAN clock - to be overridden by boards that provide it */
  41         can_clk: can {
  42                 compatible = "fixed-clock";
  43                 #clock-cells = <0>;
  44                 clock-frequency = <0>;
  45         };
  46
  47         cluster1_opp: opp-table-1 {
  48                 compatible = "operating-points-v2";
  49                 opp-shared;
  50                 opp-800000000 {
  51                         opp-hz = /bits/ 64 <800000000>;
  52                         clock-latency-ns = <300000>;
  53                 };
  54                 opp-1000000000 {
  55                         opp-hz = /bits/ 64 <1000000000>;
  56                         clock-latency-ns = <300000>;
  57                 };
  58                 opp-1200000000 {
  59                         opp-hz = /bits/ 64 <1200000000>;
  60                         clock-latency-ns = <300000>;
  61                         opp-suspend;
  62                 };
  63         };
  64
  65         cpus {
  66                 #address-cells = <1>;
  67                 #size-cells = <0>;
  68
  69                 a53_0: cpu@0 {
  70                         compatible = "arm,cortex-a53";
  71                         reg = <0>;
  72                         device_type = "cpu";
  73                         #cooling-cells = <2>;
  74                         power-domains = <&sysc R8A774C0_PD_CA53_CPU0>;
  75                         next-level-cache = <&L2_CA53>;
  76                         enable-method = "psci";
  77                         dynamic-power-coefficient = <277>;
  78                         clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
  79                         operating-points-v2 = <&cluster1_opp>;
  80                 };
  81
  82                 a53_1: cpu@1 {
  83                         compatible = "arm,cortex-a53";
  84                         reg = <1>;
  85                         device_type = "cpu";
  86                         power-domains = <&sysc R8A774C0_PD_CA53_CPU1>;
  87                         next-level-cache = <&L2_CA53>;
  88                         enable-method = "psci";
  89                         clocks = <&cpg CPG_CORE R8A774C0_CLK_Z2>;
  90                         operating-points-v2 = <&cluster1_opp>;
  91                 };
  92
  93                 L2_CA53: cache-controller-0 {
  94                         compatible = "cache";
  95                         power-domains = <&sysc R8A774C0_PD_CA53_SCU>;
  96                         cache-unified;
  97                         cache-level = <2>;
  98                 };
  99         };
 100
 101         extal_clk: extal {
 102                 compatible = "fixed-clock";
 103                 #clock-cells = <0>;
 104                 /* This value must be overridden by the board */
 105                 clock-frequency = <0>;
 106         };
 107
 108         /* External PCIe clock - can be overridden by the board */
 109         pcie_bus_clk: pcie_bus {
 110                 compatible = "fixed-clock";
 111                 #clock-cells = <0>;
 112                 clock-frequency = <0>;
 113         };
 114
 115         pmu_a53 {
 116                 compatible = "arm,cortex-a53-pmu";
 117                 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
 118                                       <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 119                 interrupt-affinity = <&a53_0>, <&a53_1>;
 120         };
 121
 122         psci {
 123                 compatible = "arm,psci-1.0", "arm,psci-0.2";
 124                 method = "smc";
 125         };
 126
 127         /* External SCIF clock - to be overridden by boards that provide it */
 128         scif_clk: scif {
 129                 compatible = "fixed-clock";
 130                 #clock-cells = <0>;
 131                 clock-frequency = <0>;
 132         };
 133
 134         soc: soc {
 135                 compatible = "simple-bus";
 136                 interrupt-parent = <&gic>;
 137                 #address-cells = <2>;
 138                 #size-cells = <2>;
 139                 ranges;
 140
 141                 rwdt: watchdog@e6020000 {
 142                         compatible = "renesas,r8a774c0-wdt",
 143                                      "renesas,rcar-gen3-wdt";
 144                         reg = <0 0xe6020000 0 0x0c>;
 145                         interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
 146                         clocks = <&cpg CPG_MOD 402>;
 147                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 148                         resets = <&cpg 402>;
 149                         status = "disabled";
 150                 };
 151
 152                 gpio0: gpio@e6050000 {
 153                         compatible = "renesas,gpio-r8a774c0",
 154                                      "renesas,rcar-gen3-gpio";
 155                         reg = <0 0xe6050000 0 0x50>;
 156                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 157                         #gpio-cells = <2>;
 158                         gpio-controller;
 159                         gpio-ranges = <&pfc 0 0 18>;
 160                         #interrupt-cells = <2>;
 161                         interrupt-controller;
 162                         clocks = <&cpg CPG_MOD 912>;
 163                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 164                         resets = <&cpg 912>;
 165                 };
 166
 167                 gpio1: gpio@e6051000 {
 168                         compatible = "renesas,gpio-r8a774c0",
 169                                      "renesas,rcar-gen3-gpio";
 170                         reg = <0 0xe6051000 0 0x50>;
 171                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 172                         #gpio-cells = <2>;
 173                         gpio-controller;
 174                         gpio-ranges = <&pfc 0 32 23>;
 175                         #interrupt-cells = <2>;
 176                         interrupt-controller;
 177                         clocks = <&cpg CPG_MOD 911>;
 178                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 179                         resets = <&cpg 911>;
 180                 };
 181
 182                 gpio2: gpio@e6052000 {
 183                         compatible = "renesas,gpio-r8a774c0",
 184                                      "renesas,rcar-gen3-gpio";
 185                         reg = <0 0xe6052000 0 0x50>;
 186                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 187                         #gpio-cells = <2>;
 188                         gpio-controller;
 189                         gpio-ranges = <&pfc 0 64 26>;
 190                         #interrupt-cells = <2>;
 191                         interrupt-controller;
 192                         clocks = <&cpg CPG_MOD 910>;
 193                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 194                         resets = <&cpg 910>;
 195                 };
 196
 197                 gpio3: gpio@e6053000 {
 198                         compatible = "renesas,gpio-r8a774c0",
 199                                      "renesas,rcar-gen3-gpio";
 200                         reg = <0 0xe6053000 0 0x50>;
 201                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 202                         #gpio-cells = <2>;
 203                         gpio-controller;
 204                         gpio-ranges = <&pfc 0 96 16>;
 205                         #interrupt-cells = <2>;
 206                         interrupt-controller;
 207                         clocks = <&cpg CPG_MOD 909>;
 208                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 209                         resets = <&cpg 909>;
 210                 };
 211
 212                 gpio4: gpio@e6054000 {
 213                         compatible = "renesas,gpio-r8a774c0",
 214                                      "renesas,rcar-gen3-gpio";
 215                         reg = <0 0xe6054000 0 0x50>;
 216                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 217                         #gpio-cells = <2>;
 218                         gpio-controller;
 219                         gpio-ranges = <&pfc 0 128 11>;
 220                         #interrupt-cells = <2>;
 221                         interrupt-controller;
 222                         clocks = <&cpg CPG_MOD 908>;
 223                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 224                         resets = <&cpg 908>;
 225                 };
 226
 227                 gpio5: gpio@e6055000 {
 228                         compatible = "renesas,gpio-r8a774c0",
 229                                      "renesas,rcar-gen3-gpio";
 230                         reg = <0 0xe6055000 0 0x50>;
 231                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 232                         #gpio-cells = <2>;
 233                         gpio-controller;
 234                         gpio-ranges = <&pfc 0 160 20>;
 235                         #interrupt-cells = <2>;
 236                         interrupt-controller;
 237                         clocks = <&cpg CPG_MOD 907>;
 238                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 239                         resets = <&cpg 907>;
 240                 };
 241
 242                 gpio6: gpio@e6055400 {
 243                         compatible = "renesas,gpio-r8a774c0",
 244                                      "renesas,rcar-gen3-gpio";
 245                         reg = <0 0xe6055400 0 0x50>;
 246                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 247                         #gpio-cells = <2>;
 248                         gpio-controller;
 249                         gpio-ranges = <&pfc 0 192 18>;
 250                         #interrupt-cells = <2>;
 251                         interrupt-controller;
 252                         clocks = <&cpg CPG_MOD 906>;
 253                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 254                         resets = <&cpg 906>;
 255                 };
 256
 257                 pfc: pinctrl@e6060000 {
 258                         compatible = "renesas,pfc-r8a774c0";
 259                         reg = <0 0xe6060000 0 0x508>;
 260                 };
 261
 262                 cmt0: timer@e60f0000 {
 263                         compatible = "renesas,r8a774c0-cmt0",
 264                                      "renesas,rcar-gen3-cmt0";
 265                         reg = <0 0xe60f0000 0 0x1004>;
 266                         interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
 267                                      <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
 268                         clocks = <&cpg CPG_MOD 303>;
 269                         clock-names = "fck";
 270                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 271                         resets = <&cpg 303>;
 272                         status = "disabled";
 273                 };
 274
 275                 cmt1: timer@e6130000 {
 276                         compatible = "renesas,r8a774c0-cmt1",
 277                                      "renesas,rcar-gen3-cmt1";
 278                         reg = <0 0xe6130000 0 0x1004>;
 279                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
 280                                      <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
 281                                      <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
 282                                      <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
 283                                      <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
 284                                      <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
 285                                      <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
 286                                      <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
 287                         clocks = <&cpg CPG_MOD 302>;
 288                         clock-names = "fck";
 289                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 290                         resets = <&cpg 302>;
 291                         status = "disabled";
 292                 };
 293
 294                 cmt2: timer@e6140000 {
 295                         compatible = "renesas,r8a774c0-cmt1",
 296                                      "renesas,rcar-gen3-cmt1";
 297                         reg = <0 0xe6140000 0 0x1004>;
 298                         interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>,
 299                                      <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>,
 300                                      <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>,
 301                                      <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>,
 302                                      <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>,
 303                                      <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>,
 304                                      <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>,
 305                                      <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
 306                         clocks = <&cpg CPG_MOD 301>;
 307                         clock-names = "fck";
 308                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 309                         resets = <&cpg 301>;
 310                         status = "disabled";
 311                 };
 312
 313                 cmt3: timer@e6148000 {
 314                         compatible = "renesas,r8a774c0-cmt1",
 315                                      "renesas,rcar-gen3-cmt1";
 316                         reg = <0 0xe6148000 0 0x1004>;
 317                         interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>,
 318                                      <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>,
 319                                      <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>,
 320                                      <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>,
 321                                      <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>,
 322                                      <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>,
 323                                      <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>,
 324                                      <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>;
 325                         clocks = <&cpg CPG_MOD 300>;
 326                         clock-names = "fck";
 327                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 328                         resets = <&cpg 300>;
 329                         status = "disabled";
 330                 };
 331
 332                 cpg: clock-controller@e6150000 {
 333                         compatible = "renesas,r8a774c0-cpg-mssr";
 334                         reg = <0 0xe6150000 0 0x1000>;
 335                         clocks = <&extal_clk>;
 336                         clock-names = "extal";
 337                         #clock-cells = <2>;
 338                         #power-domain-cells = <0>;
 339                         #reset-cells = <1>;
 340                 };
 341
 342                 rst: reset-controller@e6160000 {
 343                         compatible = "renesas,r8a774c0-rst";
 344                         reg = <0 0xe6160000 0 0x0200>;
 345                 };
 346
 347                 sysc: system-controller@e6180000 {
 348                         compatible = "renesas,r8a774c0-sysc";
 349                         reg = <0 0xe6180000 0 0x0400>;
 350                         #power-domain-cells = <1>;
 351                 };
 352
 353                 thermal: thermal@e6190000 {
 354                         compatible = "renesas,thermal-r8a774c0";
 355                         reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>;
 356                         interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
 357                                      <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
 358                                      <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
 359                         clocks = <&cpg CPG_MOD 522>;
 360                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 361                         resets = <&cpg 522>;
 362                         #thermal-sensor-cells = <0>;
 363                 };
 364
 365                 intc_ex: interrupt-controller@e61c0000 {
 366                         compatible = "renesas,intc-ex-r8a774c0", "renesas,irqc";
 367                         #interrupt-cells = <2>;
 368                         interrupt-controller;
 369                         reg = <0 0xe61c0000 0 0x200>;
 370                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
 371                                      <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
 372                                      <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
 373                                      <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
 374                                      <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
 375                                      <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 376                         clocks = <&cpg CPG_MOD 407>;
 377                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 378                         resets = <&cpg 407>;
 379                 };
 380
 381                 tmu0: timer@e61e0000 {
 382                         compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
 383                         reg = <0 0xe61e0000 0 0x30>;
 384                         interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
 385                                      <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
 386                                      <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
 387                         clocks = <&cpg CPG_MOD 125>;
 388                         clock-names = "fck";
 389                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 390                         resets = <&cpg 125>;
 391                         status = "disabled";
 392                 };
 393
 394                 tmu1: timer@e6fc0000 {
 395                         compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
 396                         reg = <0 0xe6fc0000 0 0x30>;
 397                         interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
 398                                      <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
 399                                      <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
 400                         clocks = <&cpg CPG_MOD 124>;
 401                         clock-names = "fck";
 402                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 403                         resets = <&cpg 124>;
 404                         status = "disabled";
 405                 };
 406
 407                 tmu2: timer@e6fd0000 {
 408                         compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
 409                         reg = <0 0xe6fd0000 0 0x30>;
 410                         interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
 411                                      <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
 412                                      <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 413                         clocks = <&cpg CPG_MOD 123>;
 414                         clock-names = "fck";
 415                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 416                         resets = <&cpg 123>;
 417                         status = "disabled";
 418                 };
 419
 420                 tmu3: timer@e6fe0000 {
 421                         compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
 422                         reg = <0 0xe6fe0000 0 0x30>;
 423                         interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
 424                                      <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
 425                                      <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
 426                         clocks = <&cpg CPG_MOD 122>;
 427                         clock-names = "fck";
 428                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 429                         resets = <&cpg 122>;
 430                         status = "disabled";
 431                 };
 432
 433                 tmu4: timer@ffc00000 {
 434                         compatible = "renesas,tmu-r8a774c0", "renesas,tmu";
 435                         reg = <0 0xffc00000 0 0x30>;
 436                         interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
 437                                      <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
 438                                      <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>;
 439                         clocks = <&cpg CPG_MOD 121>;
 440                         clock-names = "fck";
 441                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 442                         resets = <&cpg 121>;
 443                         status = "disabled";
 444                 };
 445
 446                 i2c0: i2c@e6500000 {
 447                         #address-cells = <1>;
 448                         #size-cells = <0>;
 449                         compatible = "renesas,i2c-r8a774c0",
 450                                      "renesas,rcar-gen3-i2c";
 451                         reg = <0 0xe6500000 0 0x40>;
 452                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 453                         clocks = <&cpg CPG_MOD 931>;
 454                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 455                         resets = <&cpg 931>;
 456                         dmas = <&dmac1 0x91>, <&dmac1 0x90>,
 457                                <&dmac2 0x91>, <&dmac2 0x90>;
 458                         dma-names = "tx", "rx", "tx", "rx";
 459                         i2c-scl-internal-delay-ns = <110>;
 460                         status = "disabled";
 461                 };
 462
 463                 i2c1: i2c@e6508000 {
 464                         #address-cells = <1>;
 465                         #size-cells = <0>;
 466                         compatible = "renesas,i2c-r8a774c0",
 467                                      "renesas,rcar-gen3-i2c";
 468                         reg = <0 0xe6508000 0 0x40>;
 469                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 470                         clocks = <&cpg CPG_MOD 930>;
 471                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 472                         resets = <&cpg 930>;
 473                         dmas = <&dmac1 0x93>, <&dmac1 0x92>,
 474                                <&dmac2 0x93>, <&dmac2 0x92>;
 475                         dma-names = "tx", "rx", "tx", "rx";
 476                         i2c-scl-internal-delay-ns = <6>;
 477                         status = "disabled";
 478                 };
 479
 480                 i2c2: i2c@e6510000 {
 481                         #address-cells = <1>;
 482                         #size-cells = <0>;
 483                         compatible = "renesas,i2c-r8a774c0",
 484                                      "renesas,rcar-gen3-i2c";
 485                         reg = <0 0xe6510000 0 0x40>;
 486                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 487                         clocks = <&cpg CPG_MOD 929>;
 488                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 489                         resets = <&cpg 929>;
 490                         dmas = <&dmac1 0x95>, <&dmac1 0x94>,
 491                                <&dmac2 0x95>, <&dmac2 0x94>;
 492                         dma-names = "tx", "rx", "tx", "rx";
 493                         i2c-scl-internal-delay-ns = <6>;
 494                         status = "disabled";
 495                 };
 496
 497                 i2c3: i2c@e66d0000 {
 498                         #address-cells = <1>;
 499                         #size-cells = <0>;
 500                         compatible = "renesas,i2c-r8a774c0",
 501                                      "renesas,rcar-gen3-i2c";
 502                         reg = <0 0xe66d0000 0 0x40>;
 503                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 504                         clocks = <&cpg CPG_MOD 928>;
 505                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 506                         resets = <&cpg 928>;
 507                         dmas = <&dmac0 0x97>, <&dmac0 0x96>;
 508                         dma-names = "tx", "rx";
 509                         i2c-scl-internal-delay-ns = <110>;
 510                         status = "disabled";
 511                 };
 512
 513                 i2c4: i2c@e66d8000 {
 514                         #address-cells = <1>;
 515                         #size-cells = <0>;
 516                         compatible = "renesas,i2c-r8a774c0",
 517                                      "renesas,rcar-gen3-i2c";
 518                         reg = <0 0xe66d8000 0 0x40>;
 519                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 520                         clocks = <&cpg CPG_MOD 927>;
 521                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 522                         resets = <&cpg 927>;
 523                         dmas = <&dmac0 0x99>, <&dmac0 0x98>;
 524                         dma-names = "tx", "rx";
 525                         i2c-scl-internal-delay-ns = <6>;
 526                         status = "disabled";
 527                 };
 528
 529                 i2c5: i2c@e66e0000 {
 530                         #address-cells = <1>;
 531                         #size-cells = <0>;
 532                         compatible = "renesas,i2c-r8a774c0",
 533                                      "renesas,rcar-gen3-i2c";
 534                         reg = <0 0xe66e0000 0 0x40>;
 535                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 536                         clocks = <&cpg CPG_MOD 919>;
 537                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 538                         resets = <&cpg 919>;
 539                         dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
 540                         dma-names = "tx", "rx";
 541                         i2c-scl-internal-delay-ns = <6>;
 542                         status = "disabled";
 543                 };
 544
 545                 i2c6: i2c@e66e8000 {
 546                         #address-cells = <1>;
 547                         #size-cells = <0>;
 548                         compatible = "renesas,i2c-r8a774c0",
 549                                      "renesas,rcar-gen3-i2c";
 550                         reg = <0 0xe66e8000 0 0x40>;
 551                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 552                         clocks = <&cpg CPG_MOD 918>;
 553                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 554                         resets = <&cpg 918>;
 555                         dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
 556                         dma-names = "tx", "rx";
 557                         i2c-scl-internal-delay-ns = <6>;
 558                         status = "disabled";
 559                 };
 560
 561                 i2c7: i2c@e6690000 {
 562                         #address-cells = <1>;
 563                         #size-cells = <0>;
 564                         compatible = "renesas,i2c-r8a774c0",
 565                                      "renesas,rcar-gen3-i2c";
 566                         reg = <0 0xe6690000 0 0x40>;
 567                         interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
 568                         clocks = <&cpg CPG_MOD 1003>;
 569                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 570                         resets = <&cpg 1003>;
 571                         i2c-scl-internal-delay-ns = <6>;
 572                         status = "disabled";
 573                 };
 574
 575                 iic_pmic: i2c@e60b0000 {
 576                         #address-cells = <1>;
 577                         #size-cells = <0>;
 578                         compatible = "renesas,iic-r8a774c0",
 579                                      "renesas,rcar-gen3-iic",
 580                                      "renesas,rmobile-iic";
 581                         reg = <0 0xe60b0000 0 0x425>;
 582                         interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
 583                         clocks = <&cpg CPG_MOD 926>;
 584                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 585                         resets = <&cpg 926>;
 586                         dmas = <&dmac0 0x11>, <&dmac0 0x10>;
 587                         dma-names = "tx", "rx";
 588                         status = "disabled";
 589                 };
 590
 591                 hscif0: serial@e6540000 {
 592                         compatible = "renesas,hscif-r8a774c0",
 593                                      "renesas,rcar-gen3-hscif",
 594                                      "renesas,hscif";
 595                         reg = <0 0xe6540000 0 0x60>;
 596                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 597                         clocks = <&cpg CPG_MOD 520>,
 598                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 599                                  <&scif_clk>;
 600                         clock-names = "fck", "brg_int", "scif_clk";
 601                         dmas = <&dmac1 0x31>, <&dmac1 0x30>,
 602                                <&dmac2 0x31>, <&dmac2 0x30>;
 603                         dma-names = "tx", "rx", "tx", "rx";
 604                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 605                         resets = <&cpg 520>;
 606                         status = "disabled";
 607                 };
 608
 609                 hscif1: serial@e6550000 {
 610                         compatible = "renesas,hscif-r8a774c0",
 611                                      "renesas,rcar-gen3-hscif",
 612                                      "renesas,hscif";
 613                         reg = <0 0xe6550000 0 0x60>;
 614                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 615                         clocks = <&cpg CPG_MOD 519>,
 616                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 617                                  <&scif_clk>;
 618                         clock-names = "fck", "brg_int", "scif_clk";
 619                         dmas = <&dmac1 0x33>, <&dmac1 0x32>,
 620                                <&dmac2 0x33>, <&dmac2 0x32>;
 621                         dma-names = "tx", "rx", "tx", "rx";
 622                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 623                         resets = <&cpg 519>;
 624                         status = "disabled";
 625                 };
 626
 627                 hscif2: serial@e6560000 {
 628                         compatible = "renesas,hscif-r8a774c0",
 629                                      "renesas,rcar-gen3-hscif",
 630                                      "renesas,hscif";
 631                         reg = <0 0xe6560000 0 0x60>;
 632                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 633                         clocks = <&cpg CPG_MOD 518>,
 634                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 635                                  <&scif_clk>;
 636                         clock-names = "fck", "brg_int", "scif_clk";
 637                         dmas = <&dmac1 0x35>, <&dmac1 0x34>,
 638                                <&dmac2 0x35>, <&dmac2 0x34>;
 639                         dma-names = "tx", "rx", "tx", "rx";
 640                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 641                         resets = <&cpg 518>;
 642                         status = "disabled";
 643                 };
 644
 645                 hscif3: serial@e66a0000 {
 646                         compatible = "renesas,hscif-r8a774c0",
 647                                      "renesas,rcar-gen3-hscif",
 648                                      "renesas,hscif";
 649                         reg = <0 0xe66a0000 0 0x60>;
 650                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 651                         clocks = <&cpg CPG_MOD 517>,
 652                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 653                                  <&scif_clk>;
 654                         clock-names = "fck", "brg_int", "scif_clk";
 655                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 656                         dma-names = "tx", "rx";
 657                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 658                         resets = <&cpg 517>;
 659                         status = "disabled";
 660                 };
 661
 662                 hscif4: serial@e66b0000 {
 663                         compatible = "renesas,hscif-r8a774c0",
 664                                      "renesas,rcar-gen3-hscif",
 665                                      "renesas,hscif";
 666                         reg = <0 0xe66b0000 0 0x60>;
 667                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 668                         clocks = <&cpg CPG_MOD 516>,
 669                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
 670                                  <&scif_clk>;
 671                         clock-names = "fck", "brg_int", "scif_clk";
 672                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 673                         dma-names = "tx", "rx";
 674                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 675                         resets = <&cpg 516>;
 676                         status = "disabled";
 677                 };
 678
 679                 hsusb: usb@e6590000 {
 680                         compatible = "renesas,usbhs-r8a774c0",
 681                                      "renesas,rcar-gen3-usbhs";
 682                         reg = <0 0xe6590000 0 0x200>;
 683                         interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
 684                         clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
 685                         dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
 686                                <&usb_dmac1 0>, <&usb_dmac1 1>;
 687                         dma-names = "ch0", "ch1", "ch2", "ch3";
 688                         renesas,buswait = <11>;
 689                         phys = <&usb2_phy0 3>;
 690                         phy-names = "usb";
 691                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 692                         resets = <&cpg 704>, <&cpg 703>;
 693                         status = "disabled";
 694                 };
 695
 696                 usb_dmac0: dma-controller@e65a0000 {
 697                         compatible = "renesas,r8a774c0-usb-dmac",
 698                                      "renesas,usb-dmac";
 699                         reg = <0 0xe65a0000 0 0x100>;
 700                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
 701                                      <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 702                         interrupt-names = "ch0", "ch1";
 703                         clocks = <&cpg CPG_MOD 330>;
 704                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 705                         resets = <&cpg 330>;
 706                         #dma-cells = <1>;
 707                         dma-channels = <2>;
 708                 };
 709
 710                 usb_dmac1: dma-controller@e65b0000 {
 711                         compatible = "renesas,r8a774c0-usb-dmac",
 712                                      "renesas,usb-dmac";
 713                         reg = <0 0xe65b0000 0 0x100>;
 714                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
 715                                      <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 716                         interrupt-names = "ch0", "ch1";
 717                         clocks = <&cpg CPG_MOD 331>;
 718                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 719                         resets = <&cpg 331>;
 720                         #dma-cells = <1>;
 721                         dma-channels = <2>;
 722                 };
 723
 724                 dmac0: dma-controller@e6700000 {
 725                         compatible = "renesas,dmac-r8a774c0",
 726                                      "renesas,rcar-dmac";
 727                         reg = <0 0xe6700000 0 0x10000>;
 728                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
 729                                      <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
 730                                      <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
 731                                      <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
 732                                      <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
 733                                      <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
 734                                      <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
 735                                      <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
 736                                      <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
 737                                      <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
 738                                      <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
 739                                      <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
 740                                      <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
 741                                      <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
 742                                      <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
 743                                      <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
 744                                      <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 745                         interrupt-names = "error",
 746                                         "ch0", "ch1", "ch2", "ch3",
 747                                         "ch4", "ch5", "ch6", "ch7",
 748                                         "ch8", "ch9", "ch10", "ch11",
 749                                         "ch12", "ch13", "ch14", "ch15";
 750                         clocks = <&cpg CPG_MOD 219>;
 751                         clock-names = "fck";
 752                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 753                         resets = <&cpg 219>;
 754                         #dma-cells = <1>;
 755                         dma-channels = <16>;
 756                         iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>,
 757                                <&ipmmu_ds0 2>, <&ipmmu_ds0 3>,
 758                                <&ipmmu_ds0 4>, <&ipmmu_ds0 5>,
 759                                <&ipmmu_ds0 6>, <&ipmmu_ds0 7>,
 760                                <&ipmmu_ds0 8>, <&ipmmu_ds0 9>,
 761                                <&ipmmu_ds0 10>, <&ipmmu_ds0 11>,
 762                                <&ipmmu_ds0 12>, <&ipmmu_ds0 13>,
 763                                <&ipmmu_ds0 14>, <&ipmmu_ds0 15>;
 764                 };
 765
 766                 dmac1: dma-controller@e7300000 {
 767                         compatible = "renesas,dmac-r8a774c0",
 768                                      "renesas,rcar-dmac";
 769                         reg = <0 0xe7300000 0 0x10000>;
 770                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
 771                                      <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
 772                                      <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
 773                                      <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
 774                                      <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
 775                                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
 776                                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
 777                                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
 778                                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
 779                                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
 780                                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
 781                                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
 782                                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
 783                                      <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
 784                                      <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
 785                                      <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
 786                                      <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 787                         interrupt-names = "error",
 788                                         "ch0", "ch1", "ch2", "ch3",
 789                                         "ch4", "ch5", "ch6", "ch7",
 790                                         "ch8", "ch9", "ch10", "ch11",
 791                                         "ch12", "ch13", "ch14", "ch15";
 792                         clocks = <&cpg CPG_MOD 218>;
 793                         clock-names = "fck";
 794                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 795                         resets = <&cpg 218>;
 796                         #dma-cells = <1>;
 797                         dma-channels = <16>;
 798                         iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
 799                                <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
 800                                <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
 801                                <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
 802                                <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
 803                                <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
 804                                <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
 805                                <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
 806                 };
 807
 808                 dmac2: dma-controller@e7310000 {
 809                         compatible = "renesas,dmac-r8a774c0",
 810                                      "renesas,rcar-dmac";
 811                         reg = <0 0xe7310000 0 0x10000>;
 812                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
 813                                      <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
 814                                      <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>,
 815                                      <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>,
 816                                      <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>,
 817                                      <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>,
 818                                      <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>,
 819                                      <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
 820                                      <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
 821                                      <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>,
 822                                      <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>,
 823                                      <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>,
 824                                      <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>,
 825                                      <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>,
 826                                      <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>,
 827                                      <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>,
 828                                      <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 829                         interrupt-names = "error",
 830                                         "ch0", "ch1", "ch2", "ch3",
 831                                         "ch4", "ch5", "ch6", "ch7",
 832                                         "ch8", "ch9", "ch10", "ch11",
 833                                         "ch12", "ch13", "ch14", "ch15";
 834                         clocks = <&cpg CPG_MOD 217>;
 835                         clock-names = "fck";
 836                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 837                         resets = <&cpg 217>;
 838                         #dma-cells = <1>;
 839                         dma-channels = <16>;
 840                         iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
 841                                <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
 842                                <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
 843                                <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
 844                                <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
 845                                <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
 846                                <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
 847                                <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
 848                 };
 849
 850                 ipmmu_ds0: iommu@e6740000 {
 851                         compatible = "renesas,ipmmu-r8a774c0";
 852                         reg = <0 0xe6740000 0 0x1000>;
 853                         renesas,ipmmu-main = <&ipmmu_mm 0>;
 854                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 855                         #iommu-cells = <1>;
 856                 };
 857
 858                 ipmmu_ds1: iommu@e7740000 {
 859                         compatible = "renesas,ipmmu-r8a774c0";
 860                         reg = <0 0xe7740000 0 0x1000>;
 861                         renesas,ipmmu-main = <&ipmmu_mm 1>;
 862                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 863                         #iommu-cells = <1>;
 864                 };
 865
 866                 ipmmu_hc: iommu@e6570000 {
 867                         compatible = "renesas,ipmmu-r8a774c0";
 868                         reg = <0 0xe6570000 0 0x1000>;
 869                         renesas,ipmmu-main = <&ipmmu_mm 2>;
 870                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 871                         #iommu-cells = <1>;
 872                 };
 873
 874                 ipmmu_mm: iommu@e67b0000 {
 875                         compatible = "renesas,ipmmu-r8a774c0";
 876                         reg = <0 0xe67b0000 0 0x1000>;
 877                         interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
 878                                      <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
 879                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 880                         #iommu-cells = <1>;
 881                 };
 882
 883                 ipmmu_mp: iommu@ec670000 {
 884                         compatible = "renesas,ipmmu-r8a774c0";
 885                         reg = <0 0xec670000 0 0x1000>;
 886                         renesas,ipmmu-main = <&ipmmu_mm 4>;
 887                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 888                         #iommu-cells = <1>;
 889                 };
 890
 891                 ipmmu_pv0: iommu@fd800000 {
 892                         compatible = "renesas,ipmmu-r8a774c0";
 893                         reg = <0 0xfd800000 0 0x1000>;
 894                         renesas,ipmmu-main = <&ipmmu_mm 6>;
 895                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 896                         #iommu-cells = <1>;
 897                 };
 898
 899                 ipmmu_vc0: iommu@fe6b0000 {
 900                         compatible = "renesas,ipmmu-r8a774c0";
 901                         reg = <0 0xfe6b0000 0 0x1000>;
 902                         renesas,ipmmu-main = <&ipmmu_mm 12>;
 903                         power-domains = <&sysc R8A774C0_PD_A3VC>;
 904                         #iommu-cells = <1>;
 905                 };
 906
 907                 ipmmu_vi0: iommu@febd0000 {
 908                         compatible = "renesas,ipmmu-r8a774c0";
 909                         reg = <0 0xfebd0000 0 0x1000>;
 910                         renesas,ipmmu-main = <&ipmmu_mm 14>;
 911                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 912                         #iommu-cells = <1>;
 913                 };
 914
 915                 ipmmu_vp0: iommu@fe990000 {
 916                         compatible = "renesas,ipmmu-r8a774c0";
 917                         reg = <0 0xfe990000 0 0x1000>;
 918                         renesas,ipmmu-main = <&ipmmu_mm 16>;
 919                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 920                         #iommu-cells = <1>;
 921                 };
 922
 923                 avb: ethernet@e6800000 {
 924                         compatible = "renesas,etheravb-r8a774c0",
 925                                      "renesas,etheravb-rcar-gen3";
 926                         reg = <0 0xe6800000 0 0x800>;
 927                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 928                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 929                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 930                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 931                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 932                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 933                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 934                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 935                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 936                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 937                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 938                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 939                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 940                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 941                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 942                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 943                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 944                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 945                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 946                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 947                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 948                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 949                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 950                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 951                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 952                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 953                                           "ch4", "ch5", "ch6", "ch7",
 954                                           "ch8", "ch9", "ch10", "ch11",
 955                                           "ch12", "ch13", "ch14", "ch15",
 956                                           "ch16", "ch17", "ch18", "ch19",
 957                                           "ch20", "ch21", "ch22", "ch23",
 958                                           "ch24";
 959                         clocks = <&cpg CPG_MOD 812>;
 960                         clock-names = "fck";
 961                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 962                         resets = <&cpg 812>;
 963                         phy-mode = "rgmii";
 964                         rx-internal-delay-ps = <0>;
 965                         iommus = <&ipmmu_ds0 16>;
 966                         #address-cells = <1>;
 967                         #size-cells = <0>;
 968                         status = "disabled";
 969                 };
 970
 971                 can0: can@e6c30000 {
 972                         compatible = "renesas,can-r8a774c0",
 973                                      "renesas,rcar-gen3-can";
 974                         reg = <0 0xe6c30000 0 0x1000>;
 975                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 976                         clocks = <&cpg CPG_MOD 916>,
 977                                  <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
 978                                  <&can_clk>;
 979                         clock-names = "clkp1", "clkp2", "can_clk";
 980                         assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
 981                         assigned-clock-rates = <40000000>;
 982                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 983                         resets = <&cpg 916>;
 984                         status = "disabled";
 985                 };
 986
 987                 can1: can@e6c38000 {
 988                         compatible = "renesas,can-r8a774c0",
 989                                      "renesas,rcar-gen3-can";
 990                         reg = <0 0xe6c38000 0 0x1000>;
 991                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 992                         clocks = <&cpg CPG_MOD 915>,
 993                                  <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
 994                                  <&can_clk>;
 995                         clock-names = "clkp1", "clkp2", "can_clk";
 996                         assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
 997                         assigned-clock-rates = <40000000>;
 998                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
 999                         resets = <&cpg 915>;
1000                         status = "disabled";
1001                 };
1002
1003                 canfd: can@e66c0000 {
1004                         compatible = "renesas,r8a774c0-canfd",
1005                                      "renesas,rcar-gen3-canfd";
1006                         reg = <0 0xe66c0000 0 0x8000>;
1007                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
1008                                      <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1009                         interrupt-names = "ch_int", "g_int";
1010                         clocks = <&cpg CPG_MOD 914>,
1011                                  <&cpg CPG_CORE R8A774C0_CLK_CANFD>,
1012                                  <&can_clk>;
1013                         clock-names = "fck", "canfd", "can_clk";
1014                         assigned-clocks = <&cpg CPG_CORE R8A774C0_CLK_CANFD>;
1015                         assigned-clock-rates = <40000000>;
1016                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1017                         resets = <&cpg 914>;
1018                         status = "disabled";
1019
1020                         channel0 {
1021                                 status = "disabled";
1022                         };
1023
1024                         channel1 {
1025                                 status = "disabled";
1026                         };
1027                 };
1028
1029                 pwm0: pwm@e6e30000 {
1030                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1031                         reg = <0 0xe6e30000 0 0x8>;
1032                         clocks = <&cpg CPG_MOD 523>;
1033                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1034                         resets = <&cpg 523>;
1035                         #pwm-cells = <2>;
1036                         status = "disabled";
1037                 };
1038
1039                 pwm1: pwm@e6e31000 {
1040                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1041                         reg = <0 0xe6e31000 0 0x8>;
1042                         clocks = <&cpg CPG_MOD 523>;
1043                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1044                         resets = <&cpg 523>;
1045                         #pwm-cells = <2>;
1046                         status = "disabled";
1047                 };
1048
1049                 pwm2: pwm@e6e32000 {
1050                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1051                         reg = <0 0xe6e32000 0 0x8>;
1052                         clocks = <&cpg CPG_MOD 523>;
1053                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1054                         resets = <&cpg 523>;
1055                         #pwm-cells = <2>;
1056                         status = "disabled";
1057                 };
1058
1059                 pwm3: pwm@e6e33000 {
1060                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1061                         reg = <0 0xe6e33000 0 0x8>;
1062                         clocks = <&cpg CPG_MOD 523>;
1063                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1064                         resets = <&cpg 523>;
1065                         #pwm-cells = <2>;
1066                         status = "disabled";
1067                 };
1068
1069                 pwm4: pwm@e6e34000 {
1070                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1071                         reg = <0 0xe6e34000 0 0x8>;
1072                         clocks = <&cpg CPG_MOD 523>;
1073                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1074                         resets = <&cpg 523>;
1075                         #pwm-cells = <2>;
1076                         status = "disabled";
1077                 };
1078
1079                 pwm5: pwm@e6e35000 {
1080                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1081                         reg = <0 0xe6e35000 0 0x8>;
1082                         clocks = <&cpg CPG_MOD 523>;
1083                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1084                         resets = <&cpg 523>;
1085                         #pwm-cells = <2>;
1086                         status = "disabled";
1087                 };
1088
1089                 pwm6: pwm@e6e36000 {
1090                         compatible = "renesas,pwm-r8a774c0", "renesas,pwm-rcar";
1091                         reg = <0 0xe6e36000 0 0x8>;
1092                         clocks = <&cpg CPG_MOD 523>;
1093                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1094                         resets = <&cpg 523>;
1095                         #pwm-cells = <2>;
1096                         status = "disabled";
1097                 };
1098
1099                 scif0: serial@e6e60000 {
1100                         compatible = "renesas,scif-r8a774c0",
1101                                      "renesas,rcar-gen3-scif", "renesas,scif";
1102                         reg = <0 0xe6e60000 0 64>;
1103                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
1104                         clocks = <&cpg CPG_MOD 207>,
1105                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1106                                  <&scif_clk>;
1107                         clock-names = "fck", "brg_int", "scif_clk";
1108                         dmas = <&dmac1 0x51>, <&dmac1 0x50>,
1109                                <&dmac2 0x51>, <&dmac2 0x50>;
1110                         dma-names = "tx", "rx", "tx", "rx";
1111                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1112                         resets = <&cpg 207>;
1113                         status = "disabled";
1114                 };
1115
1116                 scif1: serial@e6e68000 {
1117                         compatible = "renesas,scif-r8a774c0",
1118                                      "renesas,rcar-gen3-scif", "renesas,scif";
1119                         reg = <0 0xe6e68000 0 64>;
1120                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
1121                         clocks = <&cpg CPG_MOD 206>,
1122                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1123                                  <&scif_clk>;
1124                         clock-names = "fck", "brg_int", "scif_clk";
1125                         dmas = <&dmac1 0x53>, <&dmac1 0x52>,
1126                                <&dmac2 0x53>, <&dmac2 0x52>;
1127                         dma-names = "tx", "rx", "tx", "rx";
1128                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1129                         resets = <&cpg 206>;
1130                         status = "disabled";
1131                 };
1132
1133                 scif2: serial@e6e88000 {
1134                         compatible = "renesas,scif-r8a774c0",
1135                                      "renesas,rcar-gen3-scif", "renesas,scif";
1136                         reg = <0 0xe6e88000 0 64>;
1137                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
1138                         clocks = <&cpg CPG_MOD 310>,
1139                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1140                                  <&scif_clk>;
1141                         clock-names = "fck", "brg_int", "scif_clk";
1142                         dmas = <&dmac1 0x13>, <&dmac1 0x12>,
1143                                <&dmac2 0x13>, <&dmac2 0x12>;
1144                         dma-names = "tx", "rx", "tx", "rx";
1145                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1146                         resets = <&cpg 310>;
1147                         status = "disabled";
1148                 };
1149
1150                 scif3: serial@e6c50000 {
1151                         compatible = "renesas,scif-r8a774c0",
1152                                      "renesas,rcar-gen3-scif", "renesas,scif";
1153                         reg = <0 0xe6c50000 0 64>;
1154                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
1155                         clocks = <&cpg CPG_MOD 204>,
1156                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1157                                  <&scif_clk>;
1158                         clock-names = "fck", "brg_int", "scif_clk";
1159                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
1160                         dma-names = "tx", "rx";
1161                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1162                         resets = <&cpg 204>;
1163                         status = "disabled";
1164                 };
1165
1166                 scif4: serial@e6c40000 {
1167                         compatible = "renesas,scif-r8a774c0",
1168                                      "renesas,rcar-gen3-scif", "renesas,scif";
1169                         reg = <0 0xe6c40000 0 64>;
1170                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
1171                         clocks = <&cpg CPG_MOD 203>,
1172                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1173                                  <&scif_clk>;
1174                         clock-names = "fck", "brg_int", "scif_clk";
1175                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
1176                         dma-names = "tx", "rx";
1177                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1178                         resets = <&cpg 203>;
1179                         status = "disabled";
1180                 };
1181
1182                 scif5: serial@e6f30000 {
1183                         compatible = "renesas,scif-r8a774c0",
1184                                      "renesas,rcar-gen3-scif", "renesas,scif";
1185                         reg = <0 0xe6f30000 0 64>;
1186                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1187                         clocks = <&cpg CPG_MOD 202>,
1188                                  <&cpg CPG_CORE R8A774C0_CLK_S3D1C>,
1189                                  <&scif_clk>;
1190                         clock-names = "fck", "brg_int", "scif_clk";
1191                         dmas = <&dmac0 0x5b>, <&dmac0 0x5a>;
1192                         dma-names = "tx", "rx";
1193                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1194                         resets = <&cpg 202>;
1195                         status = "disabled";
1196                 };
1197
1198                 msiof0: spi@e6e90000 {
1199                         compatible = "renesas,msiof-r8a774c0",
1200                                      "renesas,rcar-gen3-msiof";
1201                         reg = <0 0xe6e90000 0 0x0064>;
1202                         interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1203                         clocks = <&cpg CPG_MOD 211>;
1204                         dmas = <&dmac1 0x41>, <&dmac1 0x40>,
1205                                <&dmac2 0x41>, <&dmac2 0x40>;
1206                         dma-names = "tx", "rx", "tx", "rx";
1207                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1208                         resets = <&cpg 211>;
1209                         #address-cells = <1>;
1210                         #size-cells = <0>;
1211                         status = "disabled";
1212                 };
1213
1214                 msiof1: spi@e6ea0000 {
1215                         compatible = "renesas,msiof-r8a774c0",
1216                                      "renesas,rcar-gen3-msiof";
1217                         reg = <0 0xe6ea0000 0 0x0064>;
1218                         interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1219                         clocks = <&cpg CPG_MOD 210>;
1220                         dmas = <&dmac0 0x43>, <&dmac0 0x42>;
1221                         dma-names = "tx", "rx";
1222                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1223                         resets = <&cpg 210>;
1224                         #address-cells = <1>;
1225                         #size-cells = <0>;
1226                         status = "disabled";
1227                 };
1228
1229                 msiof2: spi@e6c00000 {
1230                         compatible = "renesas,msiof-r8a774c0",
1231                                      "renesas,rcar-gen3-msiof";
1232                         reg = <0 0xe6c00000 0 0x0064>;
1233                         interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1234                         clocks = <&cpg CPG_MOD 209>;
1235                         dmas = <&dmac0 0x45>, <&dmac0 0x44>;
1236                         dma-names = "tx", "rx";
1237                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1238                         resets = <&cpg 209>;
1239                         #address-cells = <1>;
1240                         #size-cells = <0>;
1241                         status = "disabled";
1242                 };
1243
1244                 msiof3: spi@e6c10000 {
1245                         compatible = "renesas,msiof-r8a774c0",
1246                                      "renesas,rcar-gen3-msiof";
1247                         reg = <0 0xe6c10000 0 0x0064>;
1248                         interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1249                         clocks = <&cpg CPG_MOD 208>;
1250                         dmas = <&dmac0 0x47>, <&dmac0 0x46>;
1251                         dma-names = "tx", "rx";
1252                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1253                         resets = <&cpg 208>;
1254                         #address-cells = <1>;
1255                         #size-cells = <0>;
1256                         status = "disabled";
1257                 };
1258
1259                 vin4: video@e6ef4000 {
1260                         compatible = "renesas,vin-r8a774c0";
1261                         reg = <0 0xe6ef4000 0 0x1000>;
1262                         interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
1263                         clocks = <&cpg CPG_MOD 807>;
1264                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1265                         resets = <&cpg 807>;
1266                         renesas,id = <4>;
1267                         status = "disabled";
1268
1269                         ports {
1270                                 #address-cells = <1>;
1271                                 #size-cells = <0>;
1272
1273                                 port@1 {
1274                                         #address-cells = <1>;
1275                                         #size-cells = <0>;
1276
1277                                         reg = <1>;
1278
1279                                         vin4csi40: endpoint@2 {
1280                                                 reg = <2>;
1281                                                 remote-endpoint = <&csi40vin4>;
1282                                         };
1283                                 };
1284                         };
1285                 };
1286
1287                 vin5: video@e6ef5000 {
1288                         compatible = "renesas,vin-r8a774c0";
1289                         reg = <0 0xe6ef5000 0 0x1000>;
1290                         interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
1291                         clocks = <&cpg CPG_MOD 806>;
1292                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1293                         resets = <&cpg 806>;
1294                         renesas,id = <5>;
1295                         status = "disabled";
1296
1297                         ports {
1298                                 #address-cells = <1>;
1299                                 #size-cells = <0>;
1300
1301                                 port@1 {
1302                                         #address-cells = <1>;
1303                                         #size-cells = <0>;
1304
1305                                         reg = <1>;
1306
1307                                         vin5csi40: endpoint@2 {
1308                                                 reg = <2>;
1309                                                 remote-endpoint = <&csi40vin5>;
1310                                         };
1311                                 };
1312                         };
1313                 };
1314
1315                 rcar_sound: sound@ec500000 {
1316                         /*
1317                          * #sound-dai-cells is required if simple-card
1318                          *
1319                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1320                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1321                          */
1322                         /*
1323                          * #clock-cells is required for audio_clkout0/1/2/3
1324                          *
1325                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
1326                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
1327                          */
1328                         compatible = "renesas,rcar_sound-r8a774c0",
1329                                      "renesas,rcar_sound-gen3";
1330                         reg = <0 0xec500000 0 0x1000>, /* SCU */
1331                               <0 0xec5a0000 0 0x100>,  /* ADG */
1332                               <0 0xec540000 0 0x1000>, /* SSIU */
1333                               <0 0xec541000 0 0x280>,  /* SSI */
1334                               <0 0xec760000 0 0x200>;  /* Audio DMAC peri peri*/
1335                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1336
1337                         clocks = <&cpg CPG_MOD 1005>,
1338                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1339                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1340                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1341                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1342                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1343                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1344                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1345                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1346                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1347                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1348                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1349                                  <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1350                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1351                                  <&audio_clk_a>, <&audio_clk_b>,
1352                                  <&audio_clk_c>,
1353                                  <&cpg CPG_MOD 922>;
1354                         clock-names = "ssi-all",
1355                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1356                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1357                                       "ssi.1", "ssi.0",
1358                                       "src.9", "src.8", "src.7", "src.6",
1359                                       "src.5", "src.4", "src.3", "src.2",
1360                                       "src.1", "src.0",
1361                                       "mix.1", "mix.0",
1362                                       "ctu.1", "ctu.0",
1363                                       "dvc.0", "dvc.1",
1364                                       "clk_a", "clk_b", "clk_c", "clk_i";
1365                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1366                         resets = <&cpg 1005>,
1367                                  <&cpg 1006>, <&cpg 1007>,
1368                                  <&cpg 1008>, <&cpg 1009>,
1369                                  <&cpg 1010>, <&cpg 1011>,
1370                                  <&cpg 1012>, <&cpg 1013>,
1371                                  <&cpg 1014>, <&cpg 1015>;
1372                         reset-names = "ssi-all",
1373                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
1374                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
1375                                       "ssi.1", "ssi.0";
1376                         status = "disabled";
1377
1378                         rcar_sound,ctu {
1379                                 ctu00: ctu-0 { };
1380                                 ctu01: ctu-1 { };
1381                                 ctu02: ctu-2 { };
1382                                 ctu03: ctu-3 { };
1383                                 ctu10: ctu-4 { };
1384                                 ctu11: ctu-5 { };
1385                                 ctu12: ctu-6 { };
1386                                 ctu13: ctu-7 { };
1387                         };
1388
1389                         rcar_sound,dvc {
1390                                 dvc0: dvc-0 {
1391                                         dmas = <&audma0 0xbc>;
1392                                         dma-names = "tx";
1393                                 };
1394                                 dvc1: dvc-1 {
1395                                         dmas = <&audma0 0xbe>;
1396                                         dma-names = "tx";
1397                                 };
1398                         };
1399
1400                         rcar_sound,mix {
1401                                 mix0: mix-0 { };
1402                                 mix1: mix-1 { };
1403                         };
1404
1405                         rcar_sound,src {
1406                                 src0: src-0 {
1407                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1408                                         dmas = <&audma0 0x85>, <&audma0 0x9a>;
1409                                         dma-names = "rx", "tx";
1410                                 };
1411                                 src1: src-1 {
1412                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1413                                         dmas = <&audma0 0x87>, <&audma0 0x9c>;
1414                                         dma-names = "rx", "tx";
1415                                 };
1416                                 src2: src-2 {
1417                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1418                                         dmas = <&audma0 0x89>, <&audma0 0x9e>;
1419                                         dma-names = "rx", "tx";
1420                                 };
1421                                 src3: src-3 {
1422                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1423                                         dmas = <&audma0 0x8b>, <&audma0 0xa0>;
1424                                         dma-names = "rx", "tx";
1425                                 };
1426                                 src4: src-4 {
1427                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1428                                         dmas = <&audma0 0x8d>, <&audma0 0xb0>;
1429                                         dma-names = "rx", "tx";
1430                                 };
1431                                 src5: src-5 {
1432                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1433                                         dmas = <&audma0 0x8f>, <&audma0 0xb2>;
1434                                         dma-names = "rx", "tx";
1435                                 };
1436                                 src6: src-6 {
1437                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1438                                         dmas = <&audma0 0x91>, <&audma0 0xb4>;
1439                                         dma-names = "rx", "tx";
1440                                 };
1441                                 src7: src-7 {
1442                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1443                                         dmas = <&audma0 0x93>, <&audma0 0xb6>;
1444                                         dma-names = "rx", "tx";
1445                                 };
1446                                 src8: src-8 {
1447                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1448                                         dmas = <&audma0 0x95>, <&audma0 0xb8>;
1449                                         dma-names = "rx", "tx";
1450                                 };
1451                                 src9: src-9 {
1452                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1453                                         dmas = <&audma0 0x97>, <&audma0 0xba>;
1454                                         dma-names = "rx", "tx";
1455                                 };
1456                         };
1457
1458                         rcar_sound,ssi {
1459                                 ssi0: ssi-0 {
1460                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1461                                         dmas = <&audma0 0x01>, <&audma0 0x02>,
1462                                                <&audma0 0x15>, <&audma0 0x16>;
1463                                         dma-names = "rx", "tx", "rxu", "txu";
1464                                 };
1465                                 ssi1: ssi-1 {
1466                                         interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1467                                         dmas = <&audma0 0x03>, <&audma0 0x04>,
1468                                                <&audma0 0x49>, <&audma0 0x4a>;
1469                                         dma-names = "rx", "tx", "rxu", "txu";
1470                                 };
1471                                 ssi2: ssi-2 {
1472                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1473                                         dmas = <&audma0 0x05>, <&audma0 0x06>,
1474                                                <&audma0 0x63>, <&audma0 0x64>;
1475                                         dma-names = "rx", "tx", "rxu", "txu";
1476                                 };
1477                                 ssi3: ssi-3 {
1478                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1479                                         dmas = <&audma0 0x07>, <&audma0 0x08>,
1480                                                <&audma0 0x6f>, <&audma0 0x70>;
1481                                         dma-names = "rx", "tx", "rxu", "txu";
1482                                 };
1483                                 ssi4: ssi-4 {
1484                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1485                                         dmas = <&audma0 0x09>, <&audma0 0x0a>,
1486                                                <&audma0 0x71>, <&audma0 0x72>;
1487                                         dma-names = "rx", "tx", "rxu", "txu";
1488                                 };
1489                                 ssi5: ssi-5 {
1490                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1491                                         dmas = <&audma0 0x0b>, <&audma0 0x0c>,
1492                                                <&audma0 0x73>, <&audma0 0x74>;
1493                                         dma-names = "rx", "tx", "rxu", "txu";
1494                                 };
1495                                 ssi6: ssi-6 {
1496                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1497                                         dmas = <&audma0 0x0d>, <&audma0 0x0e>,
1498                                                <&audma0 0x75>, <&audma0 0x76>;
1499                                         dma-names = "rx", "tx", "rxu", "txu";
1500                                 };
1501                                 ssi7: ssi-7 {
1502                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1503                                         dmas = <&audma0 0x0f>, <&audma0 0x10>,
1504                                                <&audma0 0x79>, <&audma0 0x7a>;
1505                                         dma-names = "rx", "tx", "rxu", "txu";
1506                                 };
1507                                 ssi8: ssi-8 {
1508                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1509                                         dmas = <&audma0 0x11>, <&audma0 0x12>,
1510                                                <&audma0 0x7b>, <&audma0 0x7c>;
1511                                         dma-names = "rx", "tx", "rxu", "txu";
1512                                 };
1513                                 ssi9: ssi-9 {
1514                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1515                                         dmas = <&audma0 0x13>, <&audma0 0x14>,
1516                                                <&audma0 0x7d>, <&audma0 0x7e>;
1517                                         dma-names = "rx", "tx", "rxu", "txu";
1518                                 };
1519                         };
1520                 };
1521
1522                 audma0: dma-controller@ec700000 {
1523                         compatible = "renesas,dmac-r8a774c0",
1524                                      "renesas,rcar-dmac";
1525                         reg = <0 0xec700000 0 0x10000>;
1526                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,
1527                                      <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>,
1528                                      <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>,
1529                                      <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>,
1530                                      <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>,
1531                                      <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>,
1532                                      <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>,
1533                                      <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>,
1534                                      <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>,
1535                                      <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>,
1536                                      <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>,
1537                                      <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>,
1538                                      <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>,
1539                                      <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>,
1540                                      <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>,
1541                                      <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
1542                                      <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
1543                         interrupt-names = "error",
1544                                         "ch0", "ch1", "ch2", "ch3",
1545                                         "ch4", "ch5", "ch6", "ch7",
1546                                         "ch8", "ch9", "ch10", "ch11",
1547                                         "ch12", "ch13", "ch14", "ch15";
1548                         clocks = <&cpg CPG_MOD 502>;
1549                         clock-names = "fck";
1550                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1551                         resets = <&cpg 502>;
1552                         #dma-cells = <1>;
1553                         dma-channels = <16>;
1554                         iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>,
1555                                  <&ipmmu_mp 2>, <&ipmmu_mp 3>,
1556                                  <&ipmmu_mp 4>, <&ipmmu_mp 5>,
1557                                  <&ipmmu_mp 6>, <&ipmmu_mp 7>,
1558                                  <&ipmmu_mp 8>, <&ipmmu_mp 9>,
1559                                  <&ipmmu_mp 10>, <&ipmmu_mp 11>,
1560                                  <&ipmmu_mp 12>, <&ipmmu_mp 13>,
1561                                  <&ipmmu_mp 14>, <&ipmmu_mp 15>;
1562                 };
1563
1564                 xhci0: usb@ee000000 {
1565                         compatible = "renesas,xhci-r8a774c0",
1566                                      "renesas,rcar-gen3-xhci";
1567                         reg = <0 0xee000000 0 0xc00>;
1568                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1569                         clocks = <&cpg CPG_MOD 328>;
1570                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1571                         resets = <&cpg 328>;
1572                         status = "disabled";
1573                 };
1574
1575                 usb3_peri0: usb@ee020000 {
1576                         compatible = "renesas,r8a774c0-usb3-peri",
1577                                      "renesas,rcar-gen3-usb3-peri";
1578                         reg = <0 0xee020000 0 0x400>;
1579                         interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
1580                         clocks = <&cpg CPG_MOD 328>;
1581                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1582                         resets = <&cpg 328>;
1583                         status = "disabled";
1584                 };
1585
1586                 ohci0: usb@ee080000 {
1587                         compatible = "generic-ohci";
1588                         reg = <0 0xee080000 0 0x100>;
1589                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1590                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1591                         phys = <&usb2_phy0 1>;
1592                         phy-names = "usb";
1593                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1594                         resets = <&cpg 703>, <&cpg 704>;
1595                         status = "disabled";
1596                 };
1597
1598                 ehci0: usb@ee080100 {
1599                         compatible = "generic-ehci";
1600                         reg = <0 0xee080100 0 0x100>;
1601                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1602                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1603                         phys = <&usb2_phy0 2>;
1604                         phy-names = "usb";
1605                         companion = <&ohci0>;
1606                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1607                         resets = <&cpg 703>, <&cpg 704>;
1608                         status = "disabled";
1609                 };
1610
1611                 usb2_phy0: usb-phy@ee080200 {
1612                         compatible = "renesas,usb2-phy-r8a774c0",
1613                                      "renesas,rcar-gen3-usb2-phy";
1614                         reg = <0 0xee080200 0 0x700>;
1615                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1616                         clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1617                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1618                         resets = <&cpg 703>, <&cpg 704>;
1619                         #phy-cells = <1>;
1620                         status = "disabled";
1621                 };
1622
1623                 sdhi0: mmc@ee100000 {
1624                         compatible = "renesas,sdhi-r8a774c0",
1625                                      "renesas,rcar-gen3-sdhi";
1626                         reg = <0 0xee100000 0 0x2000>;
1627                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1628                         clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774C0_CLK_SD0H>;
1629                         clock-names = "core", "clkh";
1630                         max-frequency = <200000000>;
1631                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1632                         resets = <&cpg 314>;
1633                         status = "disabled";
1634                 };
1635
1636                 sdhi1: mmc@ee120000 {
1637                         compatible = "renesas,sdhi-r8a774c0",
1638                                      "renesas,rcar-gen3-sdhi";
1639                         reg = <0 0xee120000 0 0x2000>;
1640                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1641                         clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774C0_CLK_SD1H>;
1642                         clock-names = "core", "clkh";
1643                         max-frequency = <200000000>;
1644                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1645                         resets = <&cpg 313>;
1646                         status = "disabled";
1647                 };
1648
1649                 sdhi3: mmc@ee160000 {
1650                         compatible = "renesas,sdhi-r8a774c0",
1651                                      "renesas,rcar-gen3-sdhi";
1652                         reg = <0 0xee160000 0 0x2000>;
1653                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1654                         clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774C0_CLK_SD3H>;
1655                         clock-names = "core", "clkh";
1656                         max-frequency = <200000000>;
1657                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1658                         resets = <&cpg 311>;
1659                         status = "disabled";
1660                 };
1661
1662                 rpc: spi@ee200000 {
1663                         compatible = "renesas,r8a774c0-rpc-if",
1664                                      "renesas,rcar-gen3-rpc-if";
1665                         reg = <0 0xee200000 0 0x200>,
1666                               <0 0x08000000 0 0x4000000>,
1667                               <0 0xee208000 0 0x100>;
1668                         reg-names = "regs", "dirmap", "wbuf";
1669                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
1670                         clocks = <&cpg CPG_MOD 917>;
1671                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1672                         resets = <&cpg 917>;
1673                         #address-cells = <1>;
1674                         #size-cells = <0>;
1675                         status = "disabled";
1676                 };
1677
1678                 gic: interrupt-controller@f1010000 {
1679                         compatible = "arm,gic-400";
1680                         #interrupt-cells = <3>;
1681                         #address-cells = <0>;
1682                         interrupt-controller;
1683                         reg = <0x0 0xf1010000 0 0x1000>,
1684                               <0x0 0xf1020000 0 0x20000>,
1685                               <0x0 0xf1040000 0 0x20000>,
1686                               <0x0 0xf1060000 0 0x20000>;
1687                         interrupts = <GIC_PPI 9
1688                                         (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
1689                         clocks = <&cpg CPG_MOD 408>;
1690                         clock-names = "clk";
1691                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1692                         resets = <&cpg 408>;
1693                 };
1694
1695                 pciec0: pcie@fe000000 {
1696                         compatible = "renesas,pcie-r8a774c0",
1697                                      "renesas,pcie-rcar-gen3";
1698                         reg = <0 0xfe000000 0 0x80000>;
1699                         #address-cells = <3>;
1700                         #size-cells = <2>;
1701                         bus-range = <0x00 0xff>;
1702                         device_type = "pci";
1703                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>,
1704                                  <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>,
1705                                  <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>,
1706                                  <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1707                         /* Map all possible DDR/IOMMU as inbound ranges */
1708                         dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>;
1709                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1710                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1711                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1712                         #interrupt-cells = <1>;
1713                         interrupt-map-mask = <0 0 0 0>;
1714                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1715                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1716                         clock-names = "pcie", "pcie_bus";
1717                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1718                         resets = <&cpg 319>;
1719                         iommu-map = <0 &ipmmu_hc 0 1>;
1720                         iommu-map-mask = <0>;
1721                         status = "disabled";
1722                 };
1723
1724                 pciec0_ep: pcie-ep@fe000000 {
1725                         compatible = "renesas,r8a774c0-pcie-ep",
1726                                      "renesas,rcar-gen3-pcie-ep";
1727                         reg = <0x0 0xfe000000 0 0x80000>,
1728                               <0x0 0xfe100000 0 0x100000>,
1729                               <0x0 0xfe200000 0 0x200000>,
1730                               <0x0 0x30000000 0 0x8000000>,
1731                               <0x0 0x38000000 0 0x8000000>;
1732                         reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3";
1733                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1734                                      <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1735                                      <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1736                         clocks = <&cpg CPG_MOD 319>;
1737                         clock-names = "pcie";
1738                         resets = <&cpg 319>;
1739                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1740                         status = "disabled";
1741                 };
1742
1743                 vspb0: vsp@fe960000 {
1744                         compatible = "renesas,vsp2";
1745                         reg = <0 0xfe960000 0 0x8000>;
1746                         interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1747                         clocks = <&cpg CPG_MOD 626>;
1748                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1749                         resets = <&cpg 626>;
1750                         renesas,fcp = <&fcpvb0>;
1751                 };
1752
1753                 vspd0: vsp@fea20000 {
1754                         compatible = "renesas,vsp2";
1755                         reg = <0 0xfea20000 0 0x7000>;
1756                         interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1757                         clocks = <&cpg CPG_MOD 623>;
1758                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1759                         resets = <&cpg 623>;
1760                         renesas,fcp = <&fcpvd0>;
1761                 };
1762
1763                 vspd1: vsp@fea28000 {
1764                         compatible = "renesas,vsp2";
1765                         reg = <0 0xfea28000 0 0x7000>;
1766                         interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1767                         clocks = <&cpg CPG_MOD 622>;
1768                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1769                         resets = <&cpg 622>;
1770                         renesas,fcp = <&fcpvd1>;
1771                 };
1772
1773                 vspi0: vsp@fe9a0000 {
1774                         compatible = "renesas,vsp2";
1775                         reg = <0 0xfe9a0000 0 0x8000>;
1776                         interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1777                         clocks = <&cpg CPG_MOD 631>;
1778                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1779                         resets = <&cpg 631>;
1780                         renesas,fcp = <&fcpvi0>;
1781                 };
1782
1783                 fcpvb0: fcp@fe96f000 {
1784                         compatible = "renesas,fcpv";
1785                         reg = <0 0xfe96f000 0 0x200>;
1786                         clocks = <&cpg CPG_MOD 607>;
1787                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1788                         resets = <&cpg 607>;
1789                         iommus = <&ipmmu_vp0 5>;
1790                 };
1791
1792                 fcpvd0: fcp@fea27000 {
1793                         compatible = "renesas,fcpv";
1794                         reg = <0 0xfea27000 0 0x200>;
1795                         clocks = <&cpg CPG_MOD 603>;
1796                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1797                         resets = <&cpg 603>;
1798                         iommus = <&ipmmu_vi0 8>;
1799                 };
1800
1801                 fcpvd1: fcp@fea2f000 {
1802                         compatible = "renesas,fcpv";
1803                         reg = <0 0xfea2f000 0 0x200>;
1804                         clocks = <&cpg CPG_MOD 602>;
1805                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1806                         resets = <&cpg 602>;
1807                         iommus = <&ipmmu_vi0 9>;
1808                 };
1809
1810                 fcpvi0: fcp@fe9af000 {
1811                         compatible = "renesas,fcpv";
1812                         reg = <0 0xfe9af000 0 0x200>;
1813                         clocks = <&cpg CPG_MOD 611>;
1814                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1815                         resets = <&cpg 611>;
1816                         iommus = <&ipmmu_vp0 8>;
1817                 };
1818
1819                 csi40: csi2@feaa0000 {
1820                         compatible = "renesas,r8a774c0-csi2";
1821                         reg = <0 0xfeaa0000 0 0x10000>;
1822                         interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1823                         clocks = <&cpg CPG_MOD 716>;
1824                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1825                         resets = <&cpg 716>;
1826                         status = "disabled";
1827
1828                         ports {
1829                                 #address-cells = <1>;
1830                                 #size-cells = <0>;
1831
1832                                 port@0 {
1833                                         reg = <0>;
1834                                 };
1835
1836                                 port@1 {
1837                                         #address-cells = <1>;
1838                                         #size-cells = <0>;
1839
1840                                         reg = <1>;
1841
1842                                         csi40vin4: endpoint@0 {
1843                                                 reg = <0>;
1844                                                 remote-endpoint = <&vin4csi40>;
1845                                         };
1846                                         csi40vin5: endpoint@1 {
1847                                                 reg = <1>;
1848                                                 remote-endpoint = <&vin5csi40>;
1849                                         };
1850                                 };
1851                         };
1852                 };
1853
1854                 du: display@feb00000 {
1855                         compatible = "renesas,du-r8a774c0";
1856                         reg = <0 0xfeb00000 0 0x40000>;
1857                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1858                                      <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
1859                         clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
1860                         clock-names = "du.0", "du.1";
1861                         resets = <&cpg 724>;
1862                         reset-names = "du.0";
1863                         renesas,vsps = <&vspd0 0>, <&vspd1 0>;
1864
1865                         status = "disabled";
1866
1867                         ports {
1868                                 #address-cells = <1>;
1869                                 #size-cells = <0>;
1870
1871                                 port@0 {
1872                                         reg = <0>;
1873                                 };
1874
1875                                 port@1 {
1876                                         reg = <1>;
1877                                         du_out_lvds0: endpoint {
1878                                                 remote-endpoint = <&lvds0_in>;
1879                                         };
1880                                 };
1881
1882                                 port@2 {
1883                                         reg = <2>;
1884                                         du_out_lvds1: endpoint {
1885                                                 remote-endpoint = <&lvds1_in>;
1886                                         };
1887                                 };
1888                         };
1889                 };
1890
1891                 lvds0: lvds-encoder@feb90000 {
1892                         compatible = "renesas,r8a774c0-lvds";
1893                         reg = <0 0xfeb90000 0 0x20>;
1894                         clocks = <&cpg CPG_MOD 727>;
1895                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1896                         resets = <&cpg 727>;
1897                         status = "disabled";
1898
1899                         renesas,companion = <&lvds1>;
1900
1901                         ports {
1902                                 #address-cells = <1>;
1903                                 #size-cells = <0>;
1904
1905                                 port@0 {
1906                                         reg = <0>;
1907                                         lvds0_in: endpoint {
1908                                                 remote-endpoint = <&du_out_lvds0>;
1909                                         };
1910                                 };
1911
1912                                 port@1 {
1913                                         reg = <1>;
1914                                 };
1915                         };
1916                 };
1917
1918                 lvds1: lvds-encoder@feb90100 {
1919                         compatible = "renesas,r8a774c0-lvds";
1920                         reg = <0 0xfeb90100 0 0x20>;
1921                         clocks = <&cpg CPG_MOD 727>;
1922                         power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>;
1923                         resets = <&cpg 726>;
1924                         status = "disabled";
1925
1926                         ports {
1927                                 #address-cells = <1>;
1928                                 #size-cells = <0>;
1929
1930                                 port@0 {
1931                                         reg = <0>;
1932                                         lvds1_in: endpoint {
1933                                                 remote-endpoint = <&du_out_lvds1>;
1934                                         };
1935                                 };
1936
1937                                 port@1 {
1938                                         reg = <1>;
1939                                 };
1940                         };
1941                 };
1942
1943                 prr: chipid@fff00044 {
1944                         compatible = "renesas,prr";
1945                         reg = <0 0xfff00044 0 4>;
1946                 };
1947         };
1948
1949         thermal-zones {
1950                 cpu-thermal {
1951                         polling-delay-passive = <250>;
1952                         polling-delay = <0>;
1953                         thermal-sensors = <&thermal>;
1954                         sustainable-power = <717>;
1955
1956                         cooling-maps {
1957                                 map0 {
1958                                         trip = <&target>;
1959                                         cooling-device = <&a53_0 0 2>;
1960                                         contribution = <1024>;
1961                                 };
1962                         };
1963
1964                         trips {
1965                                 sensor1_crit: sensor1-crit {
1966                                         temperature = <120000>;
1967                                         hysteresis = <2000>;
1968                                         type = "critical";
1969                                 };
1970
1971                                 target: trip-point1 {
1972                                         temperature = <100000>;
1973                                         hysteresis = <2000>;
1974                                         type = "passive";
1975                                 };
1976                         };
1977                 };
1978         };
1979
1980         timer {
1981                 compatible = "arm,armv8-timer";
1982                 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1983                                       <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1984                                       <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1985                                       <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1986         };
1987
1988         /* External USB clocks - can be overridden by the board */
1989         usb3s0_clk: usb3s0 {
1990                 compatible = "fixed-clock";
1991                 #clock-cells = <0>;
1992                 clock-frequency = <0>;
1993         };
1994
1995         usb_extal_clk: usb_extal {
1996                 compatible = "fixed-clock";
1997                 #clock-cells = <0>;
1998                 clock-frequency = <0>;
1999         };
2000 };