1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Ebisu/Ebisu-4D board
5 * Copyright (C) 2018 Renesas Electronics Corp.
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
12 model = "Renesas Ebisu board";
13 compatible = "renesas,ebisu";
32 bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
33 stdout-path = "serial0:115200n8";
36 audio_clkout: audio-clkout {
38 * This is same as <&rcar_sound 0>
39 * but needed to avoid cs2000/rcar_sound probe dead-lock
41 compatible = "fixed-clock";
43 clock-frequency = <11289600>;
46 backlight: backlight {
47 compatible = "pwm-backlight";
48 pwms = <&pwm3 0 50000>;
50 brightness-levels = <512 511 505 494 473 440 392 327 241 133 0>;
51 default-brightness-level = <10>;
53 power-supply = <®_12p0v>;
57 compatible = "composite-video-connector";
62 remote-endpoint = <&adv7482_ain7>;
68 compatible = "hdmi-connector";
73 hdmi_in_con: endpoint {
74 remote-endpoint = <&adv7482_hdmi>;
80 compatible = "hdmi-connector";
84 hdmi_con_out: endpoint {
85 remote-endpoint = <&adv7511_out>;
91 compatible = "gpio-keys";
93 pinctrl-0 = <&keys_pins>;
94 pinctrl-names = "default";
97 gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
101 debounce-interval = <20>;
104 gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
105 linux,code = <KEY_2>;
108 debounce-interval = <20>;
111 gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
112 linux,code = <KEY_3>;
115 debounce-interval = <20>;
118 gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
119 linux,code = <KEY_4>;
122 debounce-interval = <20>;
127 compatible = "thine,thc63lvd1024";
128 vcc-supply = <®_3p3v>;
131 #address-cells = <1>;
136 thc63lvd1024_in: endpoint {
137 remote-endpoint = <&lvds0_out>;
143 thc63lvd1024_out: endpoint {
144 remote-endpoint = <&adv7511_in>;
151 device_type = "memory";
152 /* first 128MB is reserved for secure area. */
153 reg = <0x0 0x48000000 0x0 0x38000000>;
156 reg_1p8v: regulator-1p8v {
157 compatible = "regulator-fixed";
158 regulator-name = "fixed-1.8V";
159 regulator-min-microvolt = <1800000>;
160 regulator-max-microvolt = <1800000>;
165 reg_3p3v: regulator-3p3v {
166 compatible = "regulator-fixed";
167 regulator-name = "fixed-3.3V";
168 regulator-min-microvolt = <3300000>;
169 regulator-max-microvolt = <3300000>;
174 reg_12p0v: regulator-12p0v {
175 compatible = "regulator-fixed";
176 regulator-name = "D12.0V";
177 regulator-min-microvolt = <12000000>;
178 regulator-max-microvolt = <12000000>;
184 compatible = "simple-audio-card";
186 simple-audio-card,name = "rsnd-ak4613";
187 simple-audio-card,format = "left_j";
188 simple-audio-card,bitclock-master = <&sndcpu>;
189 simple-audio-card,frame-master = <&sndcpu>;
191 sndcodec: simple-audio-card,codec {
192 sound-dai = <&ak4613>;
195 sndcpu: simple-audio-card,cpu {
196 sound-dai = <&rcar_sound>;
200 vbus0_usb2: regulator-vbus0-usb2 {
201 compatible = "regulator-fixed";
203 regulator-name = "USB20_VBUS_CN";
204 regulator-min-microvolt = <5000000>;
205 regulator-max-microvolt = <5000000>;
207 gpio = <&gpio6 4 GPIO_ACTIVE_HIGH>;
211 vcc_sdhi0: regulator-vcc-sdhi0 {
212 compatible = "regulator-fixed";
214 regulator-name = "SDHI0 Vcc";
215 regulator-min-microvolt = <3300000>;
216 regulator-max-microvolt = <3300000>;
218 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
222 vccq_sdhi0: regulator-vccq-sdhi0 {
223 compatible = "regulator-gpio";
225 regulator-name = "SDHI0 VccQ";
226 regulator-min-microvolt = <1800000>;
227 regulator-max-microvolt = <3300000>;
229 gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
231 states = <3300000 1>, <1800000 0>;
234 vcc_sdhi1: regulator-vcc-sdhi1 {
235 compatible = "regulator-fixed";
237 regulator-name = "SDHI1 Vcc";
238 regulator-min-microvolt = <3300000>;
239 regulator-max-microvolt = <3300000>;
241 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
245 vccq_sdhi1: regulator-vccq-sdhi1 {
246 compatible = "regulator-gpio";
248 regulator-name = "SDHI1 VccQ";
249 regulator-min-microvolt = <1800000>;
250 regulator-max-microvolt = <3300000>;
252 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
254 states = <3300000 1>, <1800000 0>;
258 compatible = "vga-connector";
262 remote-endpoint = <&adv7123_out>;
268 compatible = "adi,adv7123";
271 #address-cells = <1>;
276 adv7123_in: endpoint {
277 remote-endpoint = <&du_out_rgb>;
282 adv7123_out: endpoint {
283 remote-endpoint = <&vga_in>;
290 compatible = "fixed-clock";
292 clock-frequency = <24576000>;
296 compatible = "fixed-clock";
298 clock-frequency = <74250000>;
303 clock-frequency = <22579200>;
307 pinctrl-0 = <&avb_pins>;
308 pinctrl-names = "default";
309 phy-handle = <&phy0>;
312 phy0: ethernet-phy@0 {
313 compatible = "ethernet-phy-id0022.1622",
314 "ethernet-phy-ieee802.3-c22";
315 rxc-skew-ps = <1500>;
317 interrupt-parent = <&gpio2>;
318 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
319 reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
321 * TX clock internal delay mode is required for reliable
322 * 1Gbps communication using the KSZ9031RNX phy present on
323 * the Ebisu board, however, TX clock internal delay mode
324 * isn't supported on R-Car E3(e). Thus, limit speed to
325 * 100Mbps for reliable communication.
332 pinctrl-0 = <&canfd0_pins>;
333 pinctrl-names = "default";
349 remote-endpoint = <&adv7482_txa>;
356 pinctrl-0 = <&du_pins>;
357 pinctrl-names = "default";
360 clocks = <&cpg CPG_MOD 724>,
363 clock-names = "du.0", "du.1", "dclkin.0";
367 du_out_rgb: endpoint {
368 remote-endpoint = <&adv7123_in>;
380 clock-frequency = <48000000>;
391 io_expander: gpio@20 {
392 compatible = "onnn,pca9654";
396 interrupt-parent = <&gpio2>;
397 interrupts = <22 IRQ_TYPE_LEVEL_LOW>;
401 compatible = "adi,adv7511w";
403 interrupt-parent = <&gpio1>;
404 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
406 adi,input-depth = <8>;
407 adi,input-colorspace = "rgb";
408 adi,input-clock = "1x";
411 #address-cells = <1>;
416 adv7511_in: endpoint {
417 remote-endpoint = <&thc63lvd1024_out>;
423 adv7511_out: endpoint {
424 remote-endpoint = <&hdmi_con_out>;
431 compatible = "adi,adv7482";
434 interrupt-parent = <&gpio0>;
435 interrupt-names = "intrq1", "intrq2";
436 interrupts = <7 IRQ_TYPE_LEVEL_LOW>,
437 <17 IRQ_TYPE_LEVEL_LOW>;
440 #address-cells = <1>;
446 adv7482_ain7: endpoint {
447 remote-endpoint = <&cvbs_con>;
454 adv7482_hdmi: endpoint {
455 remote-endpoint = <&hdmi_in_con>;
462 adv7482_txa: endpoint {
465 remote-endpoint = <&csi40_in>;
476 compatible = "asahi-kasei,ak4613";
477 #sound-dai-cells = <0>;
479 clocks = <&rcar_sound 3>;
481 asahi-kasei,in1-single-end;
482 asahi-kasei,in2-single-end;
483 asahi-kasei,out1-single-end;
484 asahi-kasei,out2-single-end;
485 asahi-kasei,out3-single-end;
486 asahi-kasei,out4-single-end;
487 asahi-kasei,out5-single-end;
488 asahi-kasei,out6-single-end;
491 cs2000: clk-multiplier@4f {
493 compatible = "cirrus,cs2000-cp";
495 clocks = <&audio_clkout>, <&x12_clk>;
496 clock-names = "clk_in", "ref_clk";
498 assigned-clocks = <&cs2000>;
499 assigned-clock-rates = <24576000>; /* 1/1 divide */
506 clock-frequency = <400000>;
509 pinctrl-0 = <&irq0_pins>;
510 pinctrl-names = "default";
512 compatible = "rohm,bd9571mwv";
514 interrupt-parent = <&intc_ex>;
515 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
516 interrupt-controller;
517 #interrupt-cells = <2>;
520 rohm,ddr-backup-power = <0x1>;
525 compatible = "rohm,br24t01", "atmel,24c01";
534 clocks = <&cpg CPG_MOD 727>,
537 clock-names = "fck", "dclkin.0", "extal";
541 lvds0_out: endpoint {
542 remote-endpoint = <&thc63lvd1024_in>;
550 * Even though the LVDS1 output is not connected, the encoder must be
551 * enabled to supply a pixel clock to the DU for the DPAD output when
556 clocks = <&cpg CPG_MOD 727>,
559 clock-names = "fck", "dclkin.0", "extal";
568 clock-frequency = <100000000>;
577 groups = "avb_link", "avb_mii";
581 canfd0_pins: canfd0 {
582 groups = "canfd0_data";
587 groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
592 groups = "intc_ex_irq0";
593 function = "intc_ex";
597 pins = "GP_5_10", "GP_5_11", "GP_5_12", "GP_5_13";
612 groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
618 groups = "scif2_data_a";
623 groups = "sdhi0_data4", "sdhi0_ctrl";
625 power-source = <3300>;
628 sdhi0_pins_uhs: sd0_uhs {
629 groups = "sdhi0_data4", "sdhi0_ctrl";
631 power-source = <1800>;
635 groups = "sdhi1_data4", "sdhi1_ctrl";
637 power-source = <3300>;
640 sdhi1_pins_uhs: sd1_uhs {
641 groups = "sdhi1_data4", "sdhi1_ctrl";
643 power-source = <1800>;
647 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
649 power-source = <1800>;
652 sound_clk_pins: sound_clk {
653 groups = "audio_clk_a", "audio_clk_b_a", "audio_clk_c_a",
654 "audio_clkout_a", "audio_clkout1_a";
655 function = "audio_clk";
659 groups = "ssi01239_ctrl", "ssi0_data", "ssi1_data";
664 groups = "usb0_b", "usb0_id";
675 pinctrl-0 = <&pwm3_pins>;
676 pinctrl-names = "default";
682 pinctrl-0 = <&pwm5_pins>;
683 pinctrl-names = "default";
689 pinctrl-0 = <&sound_pins>, <&sound_clk_pins>;
690 pinctrl-names = "default";
693 #sound-dai-cells = <0>;
695 /* audio_clkout0/1/2/3 */
697 clock-frequency = <12288000 11289600>;
701 /* update <audio_clk_b> to <cs2000> */
702 clocks = <&cpg CPG_MOD 1005>,
703 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
704 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
705 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
706 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
707 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
708 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
709 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
710 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
711 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
712 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
713 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
714 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
715 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
716 <&audio_clk_a>, <&cs2000>, <&audio_clk_c>,
717 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
721 playback = <&ssi0>, <&src0>, <&dvc0>;
722 capture = <&ssi1>, <&src1>, <&dvc1>;
729 pinctrl-0 = <&rpc_pins>;
730 pinctrl-names = "default";
732 /* Left disabled. To be enabled by firmware when unlocked. */
735 compatible = "cypress,hyperflash", "cfi-flash";
739 compatible = "fixed-partitions";
740 #address-cells = <1>;
744 reg = <0x00000000 0x040000>;
748 reg = <0x00040000 0x140000>;
751 cert_header_sa6@180000 {
752 reg = <0x00180000 0x040000>;
756 reg = <0x001c0000 0x040000>;
760 reg = <0x00200000 0x440000>;
764 reg = <0x00640000 0x100000>;
768 reg = <0x00740000 0x080000>;
771 reg = <0x007c0000 0x1400000>;
774 reg = <0x01bc0000 0x2440000>;
786 pinctrl-0 = <&scif2_pins>;
787 pinctrl-names = "default";
793 pinctrl-0 = <&sdhi0_pins>;
794 pinctrl-1 = <&sdhi0_pins_uhs>;
795 pinctrl-names = "default", "state_uhs";
797 vmmc-supply = <&vcc_sdhi0>;
798 vqmmc-supply = <&vccq_sdhi0>;
799 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
800 wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
808 pinctrl-0 = <&sdhi1_pins>;
809 pinctrl-1 = <&sdhi1_pins_uhs>;
810 pinctrl-names = "default", "state_uhs";
812 vmmc-supply = <&vcc_sdhi1>;
813 vqmmc-supply = <&vccq_sdhi1>;
814 cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
822 /* used for on-board 8bit eMMC */
823 pinctrl-0 = <&sdhi3_pins>;
824 pinctrl-1 = <&sdhi3_pins>;
825 pinctrl-names = "default", "state_uhs";
827 vmmc-supply = <®_3p3v>;
828 vqmmc-supply = <®_1p8v>;
835 full-pwr-cycle-in-suspend;
844 pinctrl-0 = <&usb0_pins>;
845 pinctrl-names = "default";
847 vbus-supply = <&vbus0_usb2>;
852 companion = <&xhci0>;
865 pinctrl-0 = <&usb30_pins>;
866 pinctrl-names = "default";