Linux 6.7-rc7
[linux-modified.git] / arch / arm64 / boot / dts / qcom / sm8350-hdk.dts
1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3  * Copyright (c) 2020-2021, Linaro Limited
4  */
5
6 /dts-v1/;
7
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include "sm8350.dtsi"
10 #include "pm8350.dtsi"
11 #include "pm8350b.dtsi"
12 #include "pm8350c.dtsi"
13 #include "pmk8350.dtsi"
14 #include "pmr735a.dtsi"
15 #include "pmr735b.dtsi"
16
17 / {
18         model = "Qualcomm Technologies, Inc. SM8350 HDK";
19         compatible = "qcom,sm8350-hdk", "qcom,sm8350";
20         chassis-type = "embedded";
21
22         aliases {
23                 serial0 = &uart2;
24         };
25
26         chosen {
27                 stdout-path = "serial0:115200n8";
28         };
29
30         hdmi-connector {
31                 compatible = "hdmi-connector";
32                 type = "a";
33
34                 port {
35                         hdmi_con: endpoint {
36                                 remote-endpoint = <&lt9611_out>;
37                         };
38                 };
39         };
40
41         pmic-glink {
42                 compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink";
43                 #address-cells = <1>;
44                 #size-cells = <0>;
45
46                 connector@0 {
47                         compatible = "usb-c-connector";
48                         reg = <0>;
49                         power-role = "dual";
50                         data-role = "dual";
51
52                         ports {
53                                 #address-cells = <1>;
54                                 #size-cells = <0>;
55
56                                 port@0 {
57                                         reg = <0>;
58
59                                         pmic_glink_hs_in: endpoint {
60                                                 remote-endpoint = <&usb_1_dwc3_hs>;
61                                         };
62                                 };
63
64                                 port@1 {
65                                         reg = <1>;
66
67                                         pmic_glink_ss_in: endpoint {
68                                                 remote-endpoint = <&usb_1_qmpphy_out>;
69                                         };
70                                 };
71
72                                 port@2 {
73                                         reg = <2>;
74
75                                         pmic_glink_sbu: endpoint {
76                                                 remote-endpoint = <&fsa4480_sbu_mux>;
77                                         };
78                                 };
79                         };
80                 };
81         };
82
83         vph_pwr: vph-pwr-regulator {
84                 compatible = "regulator-fixed";
85                 regulator-name = "vph_pwr";
86                 regulator-min-microvolt = <3700000>;
87                 regulator-max-microvolt = <3700000>;
88
89                 regulator-always-on;
90                 regulator-boot-on;
91         };
92
93         lt9611_1v2: lt9611-1v2-regulator {
94                 compatible = "regulator-fixed";
95                 regulator-name = "LT9611_1V2";
96
97                 vin-supply = <&vph_pwr>;
98                 regulator-min-microvolt = <1200000>;
99                 regulator-max-microvolt = <1200000>;
100                 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>;
101                 enable-active-high;
102                 regulator-boot-on;
103         };
104
105         lt9611_3v3: lt9611-3v3-regulator {
106                 compatible = "regulator-fixed";
107                 regulator-name = "LT9611_3V3";
108
109                 vin-supply = <&vreg_bob>;
110                 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>;
111                 regulator-min-microvolt = <3300000>;
112                 regulator-max-microvolt = <3300000>;
113                 enable-active-high;
114                 regulator-boot-on;
115                 regulator-always-on;
116         };
117 };
118
119 &adsp {
120         status = "okay";
121         firmware-name = "/*(DEBLOBBED)*/";
122 };
123
124 &apps_rsc {
125         regulators-0 {
126                 compatible = "qcom,pm8350-rpmh-regulators";
127                 qcom,pmic-id = "b";
128
129                 vdd-s1-supply = <&vph_pwr>;
130                 vdd-s2-supply = <&vph_pwr>;
131                 vdd-s3-supply = <&vph_pwr>;
132                 vdd-s4-supply = <&vph_pwr>;
133                 vdd-s5-supply = <&vph_pwr>;
134                 vdd-s6-supply = <&vph_pwr>;
135                 vdd-s7-supply = <&vph_pwr>;
136                 vdd-s8-supply = <&vph_pwr>;
137                 vdd-s9-supply = <&vph_pwr>;
138                 vdd-s10-supply = <&vph_pwr>;
139                 vdd-s11-supply = <&vph_pwr>;
140                 vdd-s12-supply = <&vph_pwr>;
141
142                 vdd-l1-l4-supply = <&vreg_s11b_0p95>;
143                 vdd-l2-l7-supply = <&vreg_bob>;
144                 vdd-l3-l5-supply = <&vreg_bob>;
145                 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>;
146
147                 vreg_s10b_1p8: smps10 {
148                         regulator-name = "vreg_s10b_1p8";
149                         regulator-min-microvolt = <1800000>;
150                         regulator-max-microvolt = <1800000>;
151                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
152                 };
153
154                 vreg_s11b_0p95: smps11 {
155                         regulator-name = "vreg_s11b_0p95";
156                         regulator-min-microvolt = <952000>;
157                         regulator-max-microvolt = <952000>;
158                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
159                 };
160
161                 vreg_s12b_1p25: smps12 {
162                         regulator-name = "vreg_s12b_1p25";
163                         regulator-min-microvolt = <1256000>;
164                         regulator-max-microvolt = <1256000>;
165                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
166                 };
167
168                 vreg_l1b_0p88: ldo1 {
169                         regulator-name = "vreg_l1b_0p88";
170                         regulator-min-microvolt = <912000>;
171                         regulator-max-microvolt = <920000>;
172                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
173                 };
174
175                 vreg_l2b_3p07: ldo2 {
176                         regulator-name = "vreg_l2b_3p07";
177                         regulator-min-microvolt = <3072000>;
178                         regulator-max-microvolt = <3072000>;
179                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
180                 };
181
182                 vreg_l3b_0p9: ldo3 {
183                         regulator-name = "vreg_l3b_0p9";
184                         regulator-min-microvolt = <904000>;
185                         regulator-max-microvolt = <904000>;
186                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
187                 };
188
189                 vreg_l5b_0p88: ldo5 {
190                         regulator-name = "vreg_l5b_0p88";
191                         regulator-min-microvolt = <880000>;
192                         regulator-max-microvolt = <888000>;
193                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
194                         regulator-allow-set-load;
195                         regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
196                                                    RPMH_REGULATOR_MODE_HPM>;
197                 };
198
199                 vreg_l6b_1p2: ldo6 {
200                         regulator-name = "vreg_l6b_1p2";
201                         regulator-min-microvolt = <1200000>;
202                         regulator-max-microvolt = <1208000>;
203                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
204                         regulator-allow-set-load;
205                         regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
206                                                    RPMH_REGULATOR_MODE_HPM>;
207                 };
208
209                 vreg_l7b_2p96: ldo7 {
210                         regulator-name = "vreg_l7b_2p96";
211                         regulator-min-microvolt = <2504000>;
212                         regulator-max-microvolt = <2504000>;
213                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
214                         regulator-allow-set-load;
215                         regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
216                                                    RPMH_REGULATOR_MODE_HPM>;
217                 };
218
219                 vreg_l9b_1p2: ldo9 {
220                         regulator-name = "vreg_l9b_1p2";
221                         regulator-min-microvolt = <1200000>;
222                         regulator-max-microvolt = <1200000>;
223                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
224                         regulator-allow-set-load;
225                         regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM
226                                                    RPMH_REGULATOR_MODE_HPM>;
227                 };
228         };
229
230         regulators-1 {
231                 compatible = "qcom,pm8350c-rpmh-regulators";
232                 qcom,pmic-id = "c";
233
234                 vdd-s1-supply = <&vph_pwr>;
235                 vdd-s2-supply = <&vph_pwr>;
236                 vdd-s3-supply = <&vph_pwr>;
237                 vdd-s4-supply = <&vph_pwr>;
238                 vdd-s5-supply = <&vph_pwr>;
239                 vdd-s6-supply = <&vph_pwr>;
240                 vdd-s7-supply = <&vph_pwr>;
241                 vdd-s8-supply = <&vph_pwr>;
242                 vdd-s9-supply = <&vph_pwr>;
243                 vdd-s10-supply = <&vph_pwr>;
244
245                 vdd-l1-l12-supply = <&vreg_s1c_1p86>;
246                 vdd-l2-l8-supply = <&vreg_s1c_1p86>;
247                 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
248                 vdd-l6-l9-l11-supply = <&vreg_bob>;
249                 vdd-l10-supply = <&vreg_s12b_1p25>;
250
251                 vdd-bob-supply = <&vph_pwr>;
252
253                 vreg_s1c_1p86: smps1 {
254                         regulator-name = "vreg_s1c_1p86";
255                         regulator-min-microvolt = <1856000>;
256                         regulator-max-microvolt = <1880000>;
257                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
258                 };
259
260                 vreg_bob: bob {
261                         regulator-name = "vreg_bob";
262                         regulator-min-microvolt = <3008000>;
263                         regulator-max-microvolt = <3960000>;
264                         regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
265                 };
266
267                 vreg_l1c_1p8: ldo1 {
268                         regulator-name = "vreg_l1c_1p8";
269                         regulator-min-microvolt = <1800000>;
270                         regulator-max-microvolt = <1800000>;
271                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
272                 };
273
274                 vreg_l2c_1p8: ldo2 {
275                         regulator-name = "vreg_l2c_1p8";
276                         regulator-min-microvolt = <1800000>;
277                         regulator-max-microvolt = <1800000>;
278                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
279                 };
280
281                 vreg_l6c_1p8: ldo6 {
282                         regulator-name = "vreg_l6c_1p8";
283                         regulator-min-microvolt = <1800000>;
284                         regulator-max-microvolt = <2960000>;
285                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
286                 };
287
288                 vreg_l9c_2p96: ldo9 {
289                         regulator-name = "vreg_l9c_2p96";
290                         regulator-min-microvolt = <2960000>;
291                         regulator-max-microvolt = <3008000>;
292                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
293                 };
294
295                 vreg_l10c_1p2: ldo10 {
296                         regulator-name = "vreg_l10c_1p2";
297                         regulator-min-microvolt = <1200000>;
298                         regulator-max-microvolt = <1200000>;
299                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
300                 };
301         };
302
303         regulators-2 {
304                 compatible = "qcom,pmr735a-rpmh-regulators";
305                 qcom,pmic-id = "e";
306
307                 vdd-s1-supply = <&vph_pwr>;
308                 vdd-s2-supply = <&vph_pwr>;
309                 vdd-s3-supply = <&vph_pwr>;
310
311                 vdd-l1-l2-supply = <&vreg_s2e_0p85>;
312                 vdd-l3-supply = <&vreg_s1e_1p25>;
313                 vdd-l4-supply = <&vreg_s1c_1p86>;
314                 vdd-l5-l6-supply = <&vreg_s1c_1p86>;
315                 vdd-l7-bob-supply = <&vreg_bob>;
316
317                 vreg_s1e_1p25: smps1 {
318                         regulator-name = "vreg_s1e_1p25";
319                         regulator-min-microvolt = <1200000>;
320                         regulator-max-microvolt = <1280000>;
321                 };
322
323                 vreg_s2e_0p85: smps2 {
324                         regulator-name = "vreg_s2e_0p85";
325                         regulator-min-microvolt = <950000>;
326                         regulator-max-microvolt = <976000>;
327                 };
328
329                 vreg_s3e_2p20: smps3 {
330                         regulator-name = "vreg_s3e_2p20";
331                         regulator-min-microvolt = <2200000>;
332                         regulator-max-microvolt = <2352000>;
333                 };
334
335                 vreg_l1e_0p9: ldo1 {
336                         regulator-name = "vreg_l1e_0p9";
337                         regulator-min-microvolt = <912000>;
338                         regulator-max-microvolt = <912000>;
339                 };
340
341                 vreg_l2e_1p2: ldo2 {
342                         regulator-name = "vreg_l2e_0p8";
343                         regulator-min-microvolt = <1200000>;
344                         regulator-max-microvolt = <1200000>;
345                 };
346
347                 vreg_l3e_1p2: ldo3 {
348                         regulator-name = "vreg_l3e_1p2";
349                         regulator-min-microvolt = <1200000>;
350                         regulator-max-microvolt = <1200000>;
351                 };
352
353                 vreg_l4e_1p7: ldo4 {
354                         regulator-name = "vreg_l4e_1p7";
355                         regulator-min-microvolt = <1776000>;
356                         regulator-max-microvolt = <1872000>;
357                 };
358
359                 vreg_l5e_0p8: ldo5 {
360                         regulator-name = "vreg_l5e_0p8";
361                         regulator-min-microvolt = <800000>;
362                         regulator-max-microvolt = <800000>;
363                 };
364
365                 vreg_l6e_0p8: ldo6 {
366                         regulator-name = "vreg_l6e_0p8";
367                         regulator-min-microvolt = <480000>;
368                         regulator-max-microvolt = <904000>;
369                 };
370
371                 vreg_l7e_2p8: ldo7 {
372                         regulator-name = "vreg_l7e_2p8";
373                         regulator-min-microvolt = <2800000>;
374                         regulator-max-microvolt = <2800000>;
375                 };
376         };
377 };
378
379 &cdsp {
380         status = "okay";
381         firmware-name = "/*(DEBLOBBED)*/";
382 };
383
384 &dispcc {
385         status = "okay";
386 };
387
388 &mdss_dsi0 {
389         vdda-supply = <&vreg_l6b_1p2>;
390         status = "okay";
391
392         ports {
393                 port@1 {
394                         endpoint {
395                                 remote-endpoint = <&lt9611_a>;
396                                 data-lanes = <0 1 2 3>;
397                         };
398                 };
399         };
400 };
401
402 &mdss_dsi0_phy  {
403         vdds-supply = <&vreg_l5b_0p88>;
404         status = "okay";
405 };
406
407 &gpi_dma1 {
408         status = "okay";
409 };
410
411 &gpu {
412         status = "okay";
413
414         zap-shader {
415                 firmware-name = "/*(DEBLOBBED)*/";
416         };
417 };
418
419 &i2c13 {
420         clock-frequency = <100000>;
421
422         status = "okay";
423
424         typec-mux@42 {
425                 compatible = "fcs,fsa4480";
426                 reg = <0x42>;
427
428                 interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
429
430                 vcc-supply = <&vreg_bob>;
431                 mode-switch;
432                 orientation-switch;
433
434                 port {
435                         fsa4480_sbu_mux: endpoint {
436                                 remote-endpoint = <&pmic_glink_sbu>;
437                         };
438                 };
439         };
440 };
441
442 &i2c15 {
443         clock-frequency = <400000>;
444         status = "okay";
445
446         lt9611_codec: hdmi-bridge@2b {
447                 compatible = "lontium,lt9611uxc";
448                 reg = <0x2b>;
449
450                 interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>;
451                 reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
452
453                 vdd-supply = <&lt9611_1v2>;
454                 vcc-supply = <&lt9611_3v3>;
455
456                 pinctrl-names = "default";
457                 pinctrl-0 = <&lt9611_state>;
458
459                 ports {
460                         #address-cells = <1>;
461                         #size-cells = <0>;
462
463                         port@0 {
464                                 reg = <0>;
465
466                                 lt9611_a: endpoint {
467                                         remote-endpoint = <&mdss_dsi0_out>;
468                                 };
469                         };
470
471                         port@2 {
472                                 reg = <2>;
473
474                                 lt9611_out: endpoint {
475                                         remote-endpoint = <&hdmi_con>;
476                                 };
477                         };
478                 };
479         };
480 };
481
482 &mdss {
483         status = "okay";
484 };
485
486 &mdss_dp {
487         status = "okay";
488
489         ports {
490                 port@1 {
491                         reg = <1>;
492
493                         mdss_dp0_out: endpoint {
494                                 data-lanes = <0 1>;
495                                 remote-endpoint = <&usb_1_qmpphy_dp_in>;
496                         };
497                 };
498         };
499 };
500
501 &mpss {
502         status = "okay";
503         firmware-name = "/*(DEBLOBBED)*/";
504 };
505
506 &pcie0 {
507         pinctrl-names = "default";
508         pinctrl-0 = <&pcie0_default_state>;
509
510         perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;
511         wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
512
513         status = "okay";
514 };
515
516 &pcie0_phy {
517         vdda-phy-supply = <&vreg_l5b_0p88>;
518         vdda-pll-supply = <&vreg_l6b_1p2>;
519
520         status = "okay";
521 };
522
523 &pcie1 {
524         perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;
525         wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;
526
527         pinctrl-names = "default";
528         pinctrl-0 = <&pcie1_default_state>;
529
530         status = "okay";
531 };
532
533 &pcie1_phy {
534         status = "okay";
535         vdda-phy-supply = <&vreg_l5b_0p88>;
536         vdda-pll-supply = <&vreg_l6b_1p2>;
537 };
538
539 &qupv3_id_0 {
540         status = "okay";
541 };
542
543 &qupv3_id_1 {
544         status = "okay";
545 };
546
547 &qupv3_id_2 {
548         status = "okay";
549 };
550
551 &sdhc_2 {
552         cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
553         pinctrl-names = "default", "sleep";
554         pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
555         pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>;
556         vmmc-supply = <&vreg_l9c_2p96>;
557         vqmmc-supply = <&vreg_l6c_1p8>;
558         no-sdio;
559         no-mmc;
560         status = "okay";
561 };
562
563 &slpi {
564         status = "okay";
565         firmware-name = "/*(DEBLOBBED)*/";
566 };
567
568 &tlmm {
569         gpio-reserved-ranges = <52 8>;
570
571         gpio-line-names =
572                 "APPS_I2C_SDA", /* GPIO_0 */
573                 "APPS_I2C_SCL",
574                 "FSA_INT_N",
575                 "USER_LED3_EN",
576                 "SMBUS_SDA_1P8",
577                 "SMBUS_SCL_1P8",
578                 "2M2_3P3_EN",
579                 "ALERT_DUAL_M2_N",
580                 "EXP_UART_CTS",
581                 "EXP_UART_RFR",
582                 "EXP_UART_TX", /* GPIO_10 */
583                 "EXP_UART_RX",
584                 "NC",
585                 "NC",
586                 "RCM_MARKER1",
587                 "WSA0_EN",
588                 "CAM1_RESET_N",
589                 "CAM0_RESET_N",
590                 "DEBUG_UART_TX",
591                 "DEBUG_UART_RX",
592                 "TS_I2C_SDA", /* GPIO_20 */
593                 "TS_I2C_SCL",
594                 "TS_RESET_N",
595                 "TS_INT_N",
596                 "DISP0_RESET_N",
597                 "DISP1_RESET_N",
598                 "ETH_RESET",
599                 "RCM_MARKER2",
600                 "CAM_DC_MIPI_MUX_EN",
601                 "CAM_DC_MIPI_MUX_SEL",
602                 "AFC_PHY_TA_D_PLUS", /* GPIO_30 */
603                 "AFC_PHY_TA_D_MINUS",
604                 "PM8008_1_IRQ",
605                 "PM8008_1_RESET_N",
606                 "PM8008_2_IRQ",
607                 "PM8008_2_RESET_N",
608                 "CAM_DC_I3C_SDA",
609                 "CAM_DC_I3C_SCL",
610                 "FP_INT_N",
611                 "FP_WUHB_INT_N",
612                 "SMB_SPMI_DATA", /* GPIO_40 */
613                 "SMB_SPMI_CLK",
614                 "USB_HUB_RESET",
615                 "FORCE_USB_BOOT",
616                 "LRF_IRQ",
617                 "NC",
618                 "IMU2_INT",
619                 "HDMI_3P3_EN",
620                 "HDMI_RSTN",
621                 "HDMI_1P2_EN",
622                 "HDMI_INT", /* GPIO_50 */
623                 "USB1_ID",
624                 "FP_SPI_MISO",
625                 "FP_SPI_MOSI",
626                 "FP_SPI_CLK",
627                 "FP_SPI_CS_N",
628                 "NFC_ESE_SPI_MISO",
629                 "NFC_ESE_SPI_MOSI",
630                 "NFC_ESE_SPI_CLK",
631                 "NFC_ESE_SPI_CS",
632                 "NFC_I2C_SDA", /* GPIO_60 */
633                 "NFC_I2C_SCLC",
634                 "NFC_EN",
635                 "NFC_CLK_REQ",
636                 "HST_WLAN_EN",
637                 "HST_BT_EN",
638                 "HST_SW_CTRL",
639                 "NC",
640                 "HST_BT_UART_CTS",
641                 "HST_BT_UART_RFR",
642                 "HST_BT_UART_TX", /* GPIO_70 */
643                 "HST_BT_UART_RX",
644                 "CAM_DC_SPI0_MISO",
645                 "CAM_DC_SPI0_MOSI",
646                 "CAM_DC_SPI0_CLK",
647                 "CAM_DC_SPI0_CS_N",
648                 "CAM_DC_SPI1_MISO",
649                 "CAM_DC_SPI1_MOSI",
650                 "CAM_DC_SPI1_CLK",
651                 "CAM_DC_SPI1_CS_N",
652                 "HALL_INT_N", /* GPIO_80 */
653                 "USB_PHY_PS",
654                 "MDP_VSYNC_P",
655                 "MDP_VSYNC_S",
656                 "ETH_3P3_EN",
657                 "RADAR_INT",
658                 "NFC_DWL_REQ",
659                 "SM_GPIO_87",
660                 "WCD_RESET_N",
661                 "ALSP_INT_N",
662                 "PRESS_INT", /* GPIO_90 */
663                 "SAR_INT_N",
664                 "SD_CARD_DET_N",
665                 "NC",
666                 "PCIE0_RESET_N",
667                 "PCIE0_CLK_REQ_N",
668                 "PCIE0_WAKE_N",
669                 "PCIE1_RESET_N",
670                 "PCIE1_CLK_REQ_N",
671                 "PCIE1_WAKE_N",
672                 "CAM_MCLK0", /* GPIO_100 */
673                 "CAM_MCLK1",
674                 "CAM_MCLK2",
675                 "CAM_MCLK3",
676                 "CAM_MCLK4",
677                 "CAM_MCLK5",
678                 "CAM2_RESET_N",
679                 "CCI_I2C0_SDA",
680                 "CCI_I2C0_SCL",
681                 "CCI_I2C1_SDA",
682                 "CCI_I2C1_SCL", /* GPIO_110 */
683                 "CCI_I2C2_SDA",
684                 "CCI_I2C2_SCL",
685                 "CCI_I2C3_SDA",
686                 "CCI_I2C3_SCL",
687                 "CAM5_RESET_N",
688                 "CAM4_RESET_N",
689                 "CAM3_RESET_N",
690                 "IMU1_INT",
691                 "MAG_INT_N",
692                 "MI2S2_I2S_SCK", /* GPIO_120 */
693                 "MI2S2_I2S_DAT0",
694                 "MI2S2_I2S_WS",
695                 "HIFI_DAC_I2S_MCLK",
696                 "MI2S2_I2S_DAT1",
697                 "HIFI_DAC_I2S_SCK",
698                 "HIFI_DAC_I2S_DAT0",
699                 "NC",
700                 "HIFI_DAC_I2S_WS",
701                 "HST_BT_WLAN_SLIMBUS_CLK",
702                 "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */
703                 "BT_LED_EN",
704                 "WLAN_LED_EN",
705                 "NC",
706                 "NC",
707                 "NC",
708                 "UIM2_PRESENT",
709                 "NC",
710                 "NC",
711                 "NC",
712                 "UIM1_PRESENT", /* GPIO_140 */
713                 "NC",
714                 "SM_RFFE0_DATA",
715                 "NC",
716                 "SM_RFFE1_DATA",
717                 "SM_MSS_GRFC4",
718                 "SM_MSS_GRFC5",
719                 "SM_MSS_GRFC6",
720                 "SM_MSS_GRFC7",
721                 "SM_RFFE4_CLK",
722                 "SM_RFFE4_DATA", /* GPIO_150 */
723                 "WLAN_COEX_UART1_RX",
724                 "WLAN_COEX_UART1_TX",
725                 "HST_SW_CTRL",
726                 "DSI0_STATUS",
727                 "DSI1_STATUS",
728                 "APPS_PBL_BOOT_SPEED_1",
729                 "APPS_BOOT_FROM_ROM",
730                 "APPS_PBL_BOOT_SPEED_0",
731                 "QLINK0_REQ",
732                 "QLINK0_EN", /* GPIO_160 */
733                 "QLINK0_WMSS_RESET_N",
734                 "NC",
735                 "NC",
736                 "NC",
737                 "NC",
738                 "NC",
739                 "NC",
740                 "WCD_SWR_TX_CLK",
741                 "WCD_SWR_TX_DATA0",
742                 "WCD_SWR_TX_DATA1", /* GPIO_170 */
743                 "WCD_SWR_RX_CLK",
744                 "WCD_SWR_RX_DATA0",
745                 "WCD_SWR_RX_DATA1",
746                 "DMIC01_CLK",
747                 "DMIC01_DATA",
748                 "DMIC23_CLK",
749                 "DMIC23_DATA",
750                 "WSA_SWR_CLK",
751                 "WSA_SWR_DATA",
752                 "DMIC45_CLK", /* GPIO_180 */
753                 "DMIC45_DATA",
754                 "WCD_SWR_TX_DATA2",
755                 "SENSOR_I3C_SDA",
756                 "SENSOR_I3C_SCL",
757                 "CAM_OIS0_I3C_SDA",
758                 "CAM_OIS0_I3C_SCL",
759                 "IMU_SPI_MISO",
760                 "IMU_SPI_MOSI",
761                 "IMU_SPI_CLK",
762                 "IMU_SPI_CS_N", /* GPIO_190 */
763                 "MAG_I2C_SDA",
764                 "MAG_I2C_SCL",
765                 "SENSOR_I2C_SDA",
766                 "SENSOR_I2C_SCL",
767                 "RADAR_SPI_MISO",
768                 "RADAR_SPI_MOSI",
769                 "RADAR_SPI_CLK",
770                 "RADAR_SPI_CS_N",
771                 "HST_BLE_UART_TX",
772                 "HST_BLE_UART_RX", /* GPIO_200 */
773                 "HST_WLAN_UART_TX",
774                 "HST_WLAN_UART_RX";
775
776         pcie0_default_state: pcie0-default-state {
777                 perst-pins {
778                         pins = "gpio94";
779                         function = "gpio";
780                         drive-strength = <2>;
781                         bias-pull-down;
782                 };
783
784                 clkreq-pins {
785                         pins = "gpio95";
786                         function = "pcie0_clkreqn";
787                         drive-strength = <2>;
788                         bias-pull-up;
789                 };
790
791                 wake-pins {
792                         pins = "gpio96";
793                         function = "gpio";
794                         drive-strength = <2>;
795                         bias-pull-up;
796                 };
797         };
798
799         pcie1_default_state: pcie1-default-state {
800                 perst-pins {
801                         pins = "gpio97";
802                         function = "gpio";
803                         drive-strength = <2>;
804                         bias-pull-down;
805                 };
806
807                 clkreq-pins {
808                         pins = "gpio98";
809                         function = "pcie1_clkreqn";
810                         drive-strength = <2>;
811                         bias-pull-up;
812                 };
813
814                 wake-pins {
815                         pins = "gpio99";
816                         function = "gpio";
817                         drive-strength = <2>;
818                         bias-pull-up;
819                 };
820         };
821
822         sdc2_card_det_n: sd-card-det-n-state {
823                 pins = "gpio92";
824                 function = "gpio";
825                 drive-strength = <2>;
826                 bias-pull-up;
827         };
828 };
829
830 &uart2 {
831         status = "okay";
832 };
833
834 &ufs_mem_hc {
835         status = "okay";
836
837         reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>;
838
839         vcc-supply = <&vreg_l7b_2p96>;
840         vcc-max-microamp = <800000>;
841         vccq-supply = <&vreg_l9b_1p2>;
842         vccq-max-microamp = <900000>;
843         vdd-hba-supply = <&vreg_l9b_1p2>;
844 };
845
846 &ufs_mem_phy {
847         status = "okay";
848
849         vdda-phy-supply = <&vreg_l5b_0p88>;
850         vdda-pll-supply = <&vreg_l6b_1p2>;
851 };
852
853 &usb_1 {
854         status = "okay";
855 };
856
857 &usb_1_dwc3 {
858         dr_mode = "otg";
859         usb-role-switch;
860 };
861
862 &usb_1_dwc3_hs {
863         remote-endpoint = <&pmic_glink_hs_in>;
864 };
865
866 &usb_1_dwc3_ss {
867         remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
868 };
869
870 &usb_1_hsphy {
871         status = "okay";
872
873         vdda-pll-supply = <&vreg_l5b_0p88>;
874         vdda18-supply = <&vreg_l1c_1p8>;
875         vdda33-supply = <&vreg_l2b_3p07>;
876 };
877
878 &usb_1_qmpphy {
879         status = "okay";
880
881         vdda-phy-supply = <&vreg_l6b_1p2>;
882         vdda-pll-supply = <&vreg_l1b_0p88>;
883
884         orientation-switch;
885 };
886
887 &usb_1_qmpphy_dp_in {
888         remote-endpoint = <&mdss_dp0_out>;
889 };
890
891 &usb_1_qmpphy_out {
892         remote-endpoint = <&pmic_glink_ss_in>;
893 };
894
895 &usb_1_qmpphy_usb_ss_in {
896         remote-endpoint = <&usb_1_dwc3_ss>;
897 };
898
899 &usb_2 {
900         status = "okay";
901 };
902
903 &usb_2_dwc3 {
904         dr_mode = "host";
905
906         pinctrl-names = "default";
907         pinctrl-0 = <&usb_hub_enabled_state>;
908 };
909
910 &usb_2_hsphy {
911         status = "okay";
912
913         vdda-pll-supply = <&vreg_l5b_0p88>;
914         vdda18-supply = <&vreg_l1c_1p8>;
915         vdda33-supply = <&vreg_l2b_3p07>;
916 };
917
918 &usb_2_qmpphy {
919         status = "okay";
920
921         vdda-phy-supply = <&vreg_l6b_1p2>;
922         vdda-pll-supply = <&vreg_l5b_0p88>;
923 };
924
925 /* PINCTRL - additions to nodes defined in sm8350.dtsi */
926
927 &tlmm {
928         usb_hub_enabled_state: usb-hub-enabled-state {
929                 pins = "gpio42";
930                 function = "gpio";
931
932                 drive-strength = <2>;
933                 output-low;
934         };
935
936         lt9611_state: lt9611-state {
937                 rst-pins {
938                         pins = "gpio48";
939                         function = "gpio";
940
941                         output-high;
942                         input-disable;
943                 };
944
945                 irq-pins {
946                         pins = "gpio50";
947                         function = "gpio";
948                         bias-disable;
949                 };
950         };
951 };