Linux 6.7-rc7
[linux-modified.git] / arch / arm64 / boot / dts / qcom / sdm850-lenovo-yoga-c630.dts
1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3  * Lenovo Yoga C630
4  *
5  * Copyright (c) 2019, Linaro Ltd.
6  */
7
8 /dts-v1/;
9
10 #include <dt-bindings/input/gpio-keys.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
15 #include "sdm850.dtsi"
16 #include "sdm845-wcd9340.dtsi"
17 #include "pm8998.dtsi"
18
19 /*
20  * Update following upstream (sdm845.dtsi) reserved
21  * memory mappings for firmware loading to succeed
22  * and enable the IPA device.
23  */
24 /delete-node/ &ipa_fw_mem;
25 /delete-node/ &ipa_gsi_mem;
26 /delete-node/ &gpu_mem;
27 /delete-node/ &adsp_mem;
28 /delete-node/ &wlan_msa_mem;
29
30 / {
31         model = "Lenovo Yoga C630";
32         compatible = "lenovo,yoga-c630", "qcom,sdm845";
33         chassis-type = "convertible";
34
35         aliases {
36                 serial0 = &uart9;
37                 serial1 = &uart6;
38         };
39
40         gpio-keys {
41                 compatible = "gpio-keys";
42
43                 pinctrl-names = "default";
44                 pinctrl-0 = <&lid_pin_active>, <&mode_pin_active>;
45
46                 switch-lid {
47                         gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;
48                         linux,input-type = <EV_SW>;
49                         linux,code = <SW_LID>;
50                         wakeup-source;
51                         wakeup-event-action = <EV_ACT_DEASSERTED>;
52                 };
53
54                 switch-mode {
55                         gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
56                         linux,input-type = <EV_SW>;
57                         linux,code = <SW_TABLET_MODE>;
58                 };
59         };
60
61         /* Reserved memory changes for IPA */
62         reserved-memory {
63                 wlan_msa_mem: memory@8c400000 {
64                         reg = <0 0x8c400000 0 0x100000>;
65                         no-map;
66                 };
67
68                 gpu_mem: memory@8c515000 {
69                         reg = <0 0x8c515000 0 0x2000>;
70                         no-map;
71                 };
72
73                 ipa_fw_mem: memory@8c517000 {
74                         reg = <0 0x8c517000 0 0x5a000>;
75                         no-map;
76                 };
77
78                 adsp_mem: memory@8c600000 {
79                         reg = <0 0x8c600000 0 0x1a00000>;
80                         no-map;
81                 };
82         };
83
84         sw_edp_1p2: edp-1p2-regulator {
85                 compatible = "regulator-fixed";
86                 regulator-name = "sw_edp_1p2";
87
88                 regulator-min-microvolt = <1200000>;
89                 regulator-max-microvolt = <1200000>;
90
91                 pinctrl-0 = <&sw_edp_1p2_en>;
92                 pinctrl-names = "default";
93
94                 gpio = <&pm8998_gpios 9 GPIO_ACTIVE_HIGH>;
95                 enable-active-high;
96
97                 vin-supply = <&vreg_l2a_1p2>;
98         };
99
100         sn65dsi86_refclk: sn65dsi86-refclk {
101                 compatible = "fixed-clock";
102                 #clock-cells = <0>;
103
104                 clock-frequency = <19200000>;
105         };
106
107         vph_pwr: regulator-vph-pwr {
108                 compatible = "regulator-fixed";
109                 regulator-name = "vph_pwr";
110                 regulator-min-microvolt = <3700000>;
111                 regulator-max-microvolt = <3700000>;
112         };
113
114         vlcm_3v3: regulator-vlcm-3v3 {
115                 compatible = "regulator-fixed";
116                 regulator-name = "vlcm_3v3";
117
118                 vin-supply = <&vph_pwr>;
119                 regulator-min-microvolt = <3300000>;
120                 regulator-max-microvolt = <3300000>;
121
122                 gpio = <&tlmm 88 GPIO_ACTIVE_HIGH>;
123                 enable-active-high;
124         };
125
126         backlight: backlight {
127                 compatible = "pwm-backlight";
128                 pwms = <&sn65dsi86 1000000>;
129                 enable-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
130         };
131 };
132
133 &adsp_pas {
134         firmware-name = "/*(DEBLOBBED)*/";
135         status = "okay";
136 };
137
138 &apps_rsc {
139         regulators-0 {
140                 compatible = "qcom,pm8998-rpmh-regulators";
141                 qcom,pmic-id = "a";
142
143                 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
144                 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
145
146                 vreg_s2a_1p125: smps2 {
147                 };
148
149                 vreg_s3a_1p35: smps3 {
150                         regulator-min-microvolt = <1352000>;
151                         regulator-max-microvolt = <1352000>;
152                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
153                 };
154
155                 vreg_s4a_1p8: smps4 {
156                         regulator-min-microvolt = <1800000>;
157                         regulator-max-microvolt = <1800000>;
158                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
159                 };
160
161                 vreg_s5a_2p04: smps5 {
162                         regulator-min-microvolt = <2040000>;
163                         regulator-max-microvolt = <2040000>;
164                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
165                 };
166
167                 vreg_s7a_1p025: smps7 {
168                 };
169
170                 vdd_qusb_hs0:
171                 vdda_hp_pcie_core:
172                 vdda_mipi_csi0_0p9:
173                 vdda_mipi_csi1_0p9:
174                 vdda_mipi_csi2_0p9:
175                 vdda_mipi_dsi0_pll:
176                 vdda_mipi_dsi1_pll:
177                 vdda_qlink_lv:
178                 vdda_qlink_lv_ck:
179                 vdda_qrefs_0p875:
180                 vdda_pcie_core:
181                 vdda_pll_cc_ebi01:
182                 vdda_pll_cc_ebi23:
183                 vdda_sp_sensor:
184                 vdda_ufs1_core:
185                 vdda_ufs2_core:
186                 vdda_usb1_ss_core:
187                 vdda_usb2_ss_core:
188                 vreg_l1a_0p875: ldo1 {
189                         regulator-min-microvolt = <880000>;
190                         regulator-max-microvolt = <880000>;
191                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
192                 };
193
194                 vddpx_10:
195                 vreg_l2a_1p2: ldo2 {
196                         regulator-min-microvolt = <1200000>;
197                         regulator-max-microvolt = <1200000>;
198                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199                         regulator-always-on;
200                 };
201
202                 vreg_l3a_1p0: ldo3 {
203                 };
204
205                 vdd_wcss_cx:
206                 vdd_wcss_mx:
207                 vdda_wcss_pll:
208                 vreg_l5a_0p8: ldo5 {
209                         regulator-min-microvolt = <800000>;
210                         regulator-max-microvolt = <800000>;
211                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
212                 };
213
214                 vddpx_13:
215                 vreg_l6a_1p8: ldo6 {
216                         regulator-min-microvolt = <1800000>;
217                         regulator-max-microvolt = <1800000>;
218                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
219                 };
220
221                 vreg_l7a_1p8: ldo7 {
222                         regulator-min-microvolt = <1800000>;
223                         regulator-max-microvolt = <1800000>;
224                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
225                 };
226
227                 vreg_l8a_1p2: ldo8 {
228                 };
229
230                 vreg_l9a_1p8: ldo9 {
231                 };
232
233                 vreg_l10a_1p8: ldo10 {
234                 };
235
236                 vreg_l11a_1p0: ldo11 {
237                 };
238
239                 vdd_qfprom:
240                 vdd_qfprom_sp:
241                 vdda_apc1_cs_1p8:
242                 vdda_gfx_cs_1p8:
243                 vdda_qrefs_1p8:
244                 vdda_qusb_hs0_1p8:
245                 vddpx_11:
246                 vreg_l12a_1p8: ldo12 {
247                         regulator-min-microvolt = <1800000>;
248                         regulator-max-microvolt = <1800000>;
249                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
250                 };
251
252                 vddpx_2:
253                 vreg_l13a_2p95: ldo13 {
254                 };
255
256                 vreg_l14a_1p88: ldo14 {
257                         regulator-min-microvolt = <1880000>;
258                         regulator-max-microvolt = <1880000>;
259                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
260                         regulator-always-on;
261                 };
262
263                 vreg_l15a_1p8: ldo15 {
264                 };
265
266                 vreg_l16a_2p7: ldo16 {
267                 };
268
269                 vreg_l17a_1p3: ldo17 {
270                         regulator-min-microvolt = <1304000>;
271                         regulator-max-microvolt = <1304000>;
272                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
273                 };
274
275                 vreg_l18a_2p7: ldo18 {
276                 };
277
278                 vreg_l19a_3p0: ldo19 {
279                         regulator-min-microvolt = <3100000>;
280                         regulator-max-microvolt = <3108000>;
281                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
282                 };
283
284                 vreg_l20a_2p95: ldo20 {
285                         regulator-min-microvolt = <2960000>;
286                         regulator-max-microvolt = <2960000>;
287                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
288                 };
289
290                 vreg_l21a_2p95: ldo21 {
291                 };
292
293                 vreg_l22a_2p85: ldo22 {
294                 };
295
296                 vreg_l23a_3p3: ldo23 {
297                         regulator-min-microvolt = <3300000>;
298                         regulator-max-microvolt = <3312000>;
299                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
300                 };
301
302                 vdda_qusb_hs0_3p1:
303                 vreg_l24a_3p075: ldo24 {
304                         regulator-min-microvolt = <3075000>;
305                         regulator-max-microvolt = <3083000>;
306                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
307                 };
308
309                 vreg_l25a_3p3: ldo25 {
310                         regulator-min-microvolt = <3104000>;
311                         regulator-max-microvolt = <3112000>;
312                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
313                 };
314
315                 vdda_hp_pcie_1p2:
316                 vdda_hv_ebi0:
317                 vdda_hv_ebi1:
318                 vdda_hv_ebi2:
319                 vdda_hv_ebi3:
320                 vdda_mipi_csi_1p25:
321                 vdda_mipi_dsi0_1p2:
322                 vdda_mipi_dsi1_1p2:
323                 vdda_pcie_1p2:
324                 vdda_ufs1_1p2:
325                 vdda_ufs2_1p2:
326                 vdda_usb1_ss_1p2:
327                 vdda_usb2_ss_1p2:
328                 vreg_l26a_1p2: ldo26 {
329                         regulator-min-microvolt = <1200000>;
330                         regulator-max-microvolt = <1208000>;
331                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
332                 };
333
334                 vreg_l28a_3p0: ldo28 {
335                 };
336
337                 vreg_lvs1a_1p8: lvs1 {
338                 };
339
340                 vreg_lvs2a_1p8: lvs2 {
341                 };
342         };
343 };
344
345 &cdsp_pas {
346         firmware-name = "/*(DEBLOBBED)*/";
347         status = "okay";
348 };
349
350 &gcc {
351         protected-clocks = <GCC_QSPI_CORE_CLK>,
352                            <GCC_QSPI_CORE_CLK_SRC>,
353                            <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
354                            <GCC_LPASS_Q6_AXI_CLK>,
355                            <GCC_LPASS_SWAY_CLK>;
356 };
357
358 &gmu {
359         status = "okay";
360 };
361
362 &gpu {
363         status = "okay";
364         zap-shader {
365                 memory-region = <&gpu_mem>;
366                 firmware-name = "/*(DEBLOBBED)*/";
367         };
368 };
369
370 &i2c1 {
371         status = "okay";
372         clock-frequency = <400000>;
373 };
374
375 &i2c3 {
376         status = "okay";
377         clock-frequency = <400000>;
378         /* Overwrite pinctrl-0 from sdm845.dtsi */
379         pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
380
381         tsel: hid@15 {
382                 compatible = "hid-over-i2c";
383                 reg = <0x15>;
384                 hid-descr-addr = <0x1>;
385
386                 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
387         };
388
389         tsc2: hid@2c {
390                 compatible = "hid-over-i2c";
391                 reg = <0x2c>;
392                 hid-descr-addr = <0x20>;
393
394                 interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
395         };
396 };
397
398 &i2c5 {
399         status = "okay";
400         clock-frequency = <400000>;
401
402         tsc1: hid@10 {
403                 compatible = "hid-over-i2c";
404                 reg = <0x10>;
405                 hid-descr-addr = <0x1>;
406
407                 interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>;
408
409                 pinctrl-names = "default";
410                 pinctrl-0 = <&i2c5_hid_active>;
411         };
412 };
413
414 &i2c10 {
415         status = "okay";
416         clock-frequency = <400000>;
417
418         sn65dsi86: bridge@2c {
419                 compatible = "ti,sn65dsi86";
420                 reg = <0x2c>;
421                 pinctrl-names = "default";
422                 pinctrl-0 = <&sn65dsi86_pin_active>;
423
424                 enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
425
426                 vcca-supply = <&sw_edp_1p2>;
427                 vcc-supply = <&sw_edp_1p2>;
428                 vpll-supply = <&vreg_l14a_1p88>;
429                 vccio-supply = <&vreg_l14a_1p88>;
430
431                 clocks = <&sn65dsi86_refclk>;
432                 clock-names = "refclk";
433
434                 no-hpd;
435                 #pwm-cells = <1>;
436
437                 ports {
438                         #address-cells = <1>;
439                         #size-cells = <0>;
440
441                         port@0 {
442                                 reg = <0>;
443                                 sn65dsi86_in_a: endpoint {
444                                         remote-endpoint = <&mdss_dsi0_out>;
445                                 };
446                         };
447
448                         port@1 {
449                                 reg = <1>;
450                                 sn65dsi86_out: endpoint {
451                                         remote-endpoint = <&panel_in_edp>;
452                                 };
453                         };
454                 };
455
456                 aux-bus {
457                         panel: panel {
458                                 compatible = "boe,nv133fhm-n61";
459                                 backlight = <&backlight>;
460                                 power-supply = <&vlcm_3v3>;
461
462                                 port {
463                                         panel_in_edp: endpoint {
464                                                 remote-endpoint = <&sn65dsi86_out>;
465                                         };
466                                 };
467                         };
468                 };
469         };
470 };
471
472 &i2c11 {
473         status = "okay";
474         clock-frequency = <400000>;
475
476         ecsh: hid@5c {
477                 compatible = "hid-over-i2c";
478                 reg = <0x5c>;
479                 hid-descr-addr = <0x1>;
480
481                 interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
482
483                 pinctrl-names = "default";
484                 pinctrl-0 = <&i2c11_hid_active>;
485         };
486 };
487
488 &ipa {
489         qcom,gsi-loader = "self";
490         memory-region = <&ipa_fw_mem>;
491         status = "okay";
492 };
493
494 &mdss {
495         status = "okay";
496 };
497
498 &mdss_dsi0 {
499         status = "okay";
500         vdda-supply = <&vreg_l26a_1p2>;
501
502         ports {
503                 port@1 {
504                         endpoint {
505                                 remote-endpoint = <&sn65dsi86_in_a>;
506                                 data-lanes = <0 1 2 3>;
507                         };
508                 };
509         };
510 };
511
512 &mdss_dsi0_phy {
513         status = "okay";
514         vdds-supply = <&vreg_l1a_0p875>;
515 };
516
517 &mss_pil {
518         status = "okay";
519         firmware-name = "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/";
520 };
521
522 &pm8998_gpios {
523         /* This pin is pulled down by a fixed resistor */
524         sw_edp_1p2_en: pm8998-gpio9-state {
525                 pins = "gpio9";
526                 function = "normal";
527                 bias-disable;
528                 qcom,drive-strength = <0>;
529         };
530 };
531
532 &qup_i2c10_default {
533         drive-strength = <2>;
534         bias-disable;
535 };
536
537 &qup_i2c12_default {
538         drive-strength = <2>;
539         bias-disable;
540 };
541
542 &qupv3_id_0 {
543         status = "okay";
544 };
545
546 &qupv3_id_1 {
547         status = "okay";
548 };
549
550 &q6asmdai {
551         dai@0 {
552                 reg = <0>;
553         };
554
555         dai@1 {
556                 reg = <1>;
557         };
558
559         dai@2 {
560                 reg = <2>;
561         };
562 };
563
564 &sound {
565         compatible = "lenovo,yoga-c630-sndcard", "qcom,sdm845-sndcard";
566         model = "Lenovo-YOGA-C630-13Q50";
567
568         audio-routing =
569                 "RX_BIAS", "MCLK",
570                 "AMIC2", "MIC BIAS2",
571                 "SpkrLeft IN", "SPK1 OUT",
572                 "SpkrRight IN", "SPK2 OUT",
573                 "MM_DL1",  "MultiMedia1 Playback",
574                 "MM_DL3",  "MultiMedia3 Playback",
575                 "MultiMedia2 Capture", "MM_UL2";
576
577         mm1-dai-link {
578                 link-name = "MultiMedia1";
579                 cpu {
580                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
581                 };
582         };
583
584         mm2-dai-link {
585                 link-name = "MultiMedia2";
586                 cpu {
587                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
588                 };
589         };
590
591         mm3-dai-link {
592                 link-name = "MultiMedia3";
593                 cpu {
594                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
595                 };
596         };
597
598         slim-dai-link {
599                 link-name = "SLIM Playback";
600                 cpu {
601                         sound-dai = <&q6afedai SLIMBUS_0_RX>;
602                 };
603
604                 platform {
605                         sound-dai = <&q6routing>;
606                 };
607
608                 codec {
609                         sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
610                 };
611         };
612
613         slimcap-dai-link {
614                 link-name = "SLIM Capture";
615                 cpu {
616                         sound-dai = <&q6afedai SLIMBUS_0_TX>;
617                 };
618
619                 platform {
620                         sound-dai = <&q6routing>;
621                 };
622
623                 codec {
624                         sound-dai = <&wcd9340 1>;
625                 };
626         };
627
628         slim-wcd-dai-link {
629                 link-name = "SLIM WCD Playback";
630                 cpu {
631                         sound-dai = <&q6afedai SLIMBUS_1_RX>;
632                 };
633
634                 platform {
635                         sound-dai = <&q6routing>;
636                 };
637
638                 codec {
639                         sound-dai = <&wcd9340 2>;
640                 };
641         };
642 };
643
644 &tlmm {
645         gpio-reserved-ranges = <0 4>, <81 4>;
646
647         sn65dsi86_pin_active: sn65dsi86-enable-state {
648                 pins = "gpio96";
649                 function = "gpio";
650                 drive-strength = <2>;
651                 bias-disable;
652         };
653
654         i2c3_hid_active: i2c2-hid-active-state {
655                 pins = "gpio37";
656                 function = "gpio";
657
658                 bias-pull-up;
659                 drive-strength = <2>;
660         };
661
662         i2c5_hid_active: i2c5-hid-active-state {
663                 pins = "gpio125";
664                 function = "gpio";
665
666                 bias-pull-up;
667                 drive-strength = <2>;
668         };
669
670         i2c11_hid_active: i2c11-hid-active-state {
671                 pins = "gpio92";
672                 function = "gpio";
673
674                 bias-pull-up;
675                 drive-strength = <2>;
676         };
677
678         lid_pin_active: lid-pin-state {
679                 pins = "gpio124";
680                 function = "gpio";
681
682                 bias-disable;
683         };
684
685         mode_pin_active: mode-pin-state {
686                 pins = "gpio95";
687                 function = "gpio";
688
689                 bias-disable;
690         };
691 };
692
693 &uart6 {
694         pinctrl-names = "default";
695         pinctrl-0 = <&qup_uart6_4pin>;
696         status = "okay";
697
698         bluetooth {
699                 compatible = "qcom,wcn3990-bt";
700
701                 vddio-supply = <&vreg_s4a_1p8>;
702                 vddxo-supply = <&vreg_l7a_1p8>;
703                 vddrf-supply = <&vreg_l17a_1p3>;
704                 vddch0-supply = <&vreg_l25a_3p3>;
705                 vddch1-supply = <&vreg_l23a_3p3>;
706                 max-speed = <3200000>;
707         };
708 };
709
710 &uart9 {
711         status = "okay";
712 };
713
714 &ufs_mem_hc {
715         status = "okay";
716
717         reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
718
719         vcc-supply = <&vreg_l20a_2p95>;
720         vcc-max-microamp = <600000>;
721 };
722
723 &ufs_mem_phy {
724         status = "okay";
725
726         vdda-phy-supply = <&vdda_ufs1_core>;
727         vdda-pll-supply = <&vdda_ufs1_1p2>;
728 };
729
730 &usb_1 {
731         status = "okay";
732 };
733
734 &usb_1_dwc3 {
735         dr_mode = "host";
736 };
737
738 &usb_1_hsphy {
739         status = "okay";
740
741         vdd-supply = <&vdda_usb1_ss_core>;
742         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
743         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
744
745         qcom,imp-res-offset-value = <8>;
746         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
747         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
748         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
749 };
750
751 &usb_1_qmpphy {
752         status = "okay";
753
754         vdda-phy-supply = <&vdda_usb1_ss_1p2>;
755         vdda-pll-supply = <&vdda_usb1_ss_core>;
756 };
757
758 &usb_2 {
759         status = "okay";
760 };
761
762 &usb_2_dwc3 {
763         dr_mode = "host";
764 };
765
766 &usb_2_hsphy {
767         status = "okay";
768
769         vdd-supply = <&vdda_usb2_ss_core>;
770         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
771         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
772
773         qcom,imp-res-offset-value = <8>;
774         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
775 };
776
777 &usb_2_qmpphy {
778         status = "okay";
779
780         vdda-phy-supply = <&vdda_usb2_ss_1p2>;
781         vdda-pll-supply = <&vdda_usb2_ss_core>;
782 };
783
784 &venus {
785         firmware-name = "/*(DEBLOBBED)*/";
786         status = "okay";
787 };
788
789 &wcd9340 {
790         reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
791         vdd-buck-supply = <&vreg_s4a_1p8>;
792         vdd-buck-sido-supply = <&vreg_s4a_1p8>;
793         vdd-tx-supply = <&vreg_s4a_1p8>;
794         vdd-rx-supply = <&vreg_s4a_1p8>;
795         vdd-io-supply = <&vreg_s4a_1p8>;
796         qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
797         qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
798         qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
799
800         swm: swm@c85 {
801                 left_spkr: speaker@0,3 {
802                         compatible = "sdw10217211000";
803                         reg = <0 3>;
804                         powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_LOW>;
805                         #thermal-sensor-cells = <0>;
806                         sound-name-prefix = "SpkrLeft";
807                         #sound-dai-cells = <0>;
808                 };
809
810                 right_spkr: speaker@0,4 {
811                         compatible = "sdw10217211000";
812                         powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_LOW>;
813                         reg = <0 4>;
814                         #thermal-sensor-cells = <0>;
815                         sound-name-prefix = "SpkrRight";
816                         #sound-dai-cells = <0>;
817                 };
818         };
819 };
820
821 &wifi {
822         status = "okay";
823
824         vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
825         vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
826         vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
827         vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
828         vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
829
830         qcom,snoc-host-cap-8bit-quirk;
831 };
832
833 &crypto {
834         /* FIXME: qce_start triggers an SError */
835         status = "disabled";
836 };